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Merge branch 'for-4.8/core' of git://git.kernel.dk/linux-block
[karo-tx-linux.git] / drivers / regulator / qcom_smd-regulator.c
1 /*
2  * Copyright (c) 2015, Sony Mobile Communications AB.
3  * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
4  *
5  * This program is free software; you can redistribute it and/or modify
6  * it under the terms of the GNU General Public License version 2 and
7  * only version 2 as published by the Free Software Foundation.
8  *
9  * This program is distributed in the hope that it will be useful,
10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12  * GNU General Public License for more details.
13  */
14
15 #include <linux/module.h>
16 #include <linux/of.h>
17 #include <linux/of_device.h>
18 #include <linux/platform_device.h>
19 #include <linux/regulator/driver.h>
20 #include <linux/regulator/machine.h>
21 #include <linux/regulator/of_regulator.h>
22 #include <linux/soc/qcom/smd-rpm.h>
23
24 struct qcom_rpm_reg {
25         struct device *dev;
26
27         struct qcom_smd_rpm *rpm;
28
29         u32 type;
30         u32 id;
31
32         struct regulator_desc desc;
33
34         int is_enabled;
35         int uV;
36 };
37
38 struct rpm_regulator_req {
39         __le32 key;
40         __le32 nbytes;
41         __le32 value;
42 };
43
44 #define RPM_KEY_SWEN    0x6e657773 /* "swen" */
45 #define RPM_KEY_UV      0x00007675 /* "uv" */
46 #define RPM_KEY_MA      0x0000616d /* "ma" */
47
48 static int rpm_reg_write_active(struct qcom_rpm_reg *vreg,
49                                 struct rpm_regulator_req *req,
50                                 size_t size)
51 {
52         return qcom_rpm_smd_write(vreg->rpm,
53                                   QCOM_SMD_RPM_ACTIVE_STATE,
54                                   vreg->type,
55                                   vreg->id,
56                                   req, size);
57 }
58
59 static int rpm_reg_enable(struct regulator_dev *rdev)
60 {
61         struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
62         struct rpm_regulator_req req;
63         int ret;
64
65         req.key = cpu_to_le32(RPM_KEY_SWEN);
66         req.nbytes = cpu_to_le32(sizeof(u32));
67         req.value = cpu_to_le32(1);
68
69         ret = rpm_reg_write_active(vreg, &req, sizeof(req));
70         if (!ret)
71                 vreg->is_enabled = 1;
72
73         return ret;
74 }
75
76 static int rpm_reg_is_enabled(struct regulator_dev *rdev)
77 {
78         struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
79
80         return vreg->is_enabled;
81 }
82
83 static int rpm_reg_disable(struct regulator_dev *rdev)
84 {
85         struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
86         struct rpm_regulator_req req;
87         int ret;
88
89         req.key = cpu_to_le32(RPM_KEY_SWEN);
90         req.nbytes = cpu_to_le32(sizeof(u32));
91         req.value = 0;
92
93         ret = rpm_reg_write_active(vreg, &req, sizeof(req));
94         if (!ret)
95                 vreg->is_enabled = 0;
96
97         return ret;
98 }
99
100 static int rpm_reg_get_voltage(struct regulator_dev *rdev)
101 {
102         struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
103
104         return vreg->uV;
105 }
106
107 static int rpm_reg_set_voltage(struct regulator_dev *rdev,
108                                int min_uV,
109                                int max_uV,
110                                unsigned *selector)
111 {
112         struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
113         struct rpm_regulator_req req;
114         int ret = 0;
115
116         req.key = cpu_to_le32(RPM_KEY_UV);
117         req.nbytes = cpu_to_le32(sizeof(u32));
118         req.value = cpu_to_le32(min_uV);
119
120         ret = rpm_reg_write_active(vreg, &req, sizeof(req));
121         if (!ret)
122                 vreg->uV = min_uV;
123
124         return ret;
125 }
126
127 static int rpm_reg_set_load(struct regulator_dev *rdev, int load_uA)
128 {
129         struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
130         struct rpm_regulator_req req;
131
132         req.key = cpu_to_le32(RPM_KEY_MA);
133         req.nbytes = cpu_to_le32(sizeof(u32));
134         req.value = cpu_to_le32(load_uA / 1000);
135
136         return rpm_reg_write_active(vreg, &req, sizeof(req));
137 }
138
139 static const struct regulator_ops rpm_smps_ldo_ops = {
140         .enable = rpm_reg_enable,
141         .disable = rpm_reg_disable,
142         .is_enabled = rpm_reg_is_enabled,
143         .list_voltage = regulator_list_voltage_linear_range,
144
145         .get_voltage = rpm_reg_get_voltage,
146         .set_voltage = rpm_reg_set_voltage,
147
148         .set_load = rpm_reg_set_load,
149 };
150
151 static const struct regulator_ops rpm_smps_ldo_ops_fixed = {
152         .enable = rpm_reg_enable,
153         .disable = rpm_reg_disable,
154         .is_enabled = rpm_reg_is_enabled,
155
156         .get_voltage = rpm_reg_get_voltage,
157         .set_voltage = rpm_reg_set_voltage,
158
159         .set_load = rpm_reg_set_load,
160 };
161
162 static const struct regulator_ops rpm_switch_ops = {
163         .enable = rpm_reg_enable,
164         .disable = rpm_reg_disable,
165         .is_enabled = rpm_reg_is_enabled,
166 };
167
168 static const struct regulator_desc pma8084_hfsmps = {
169         .linear_ranges = (struct regulator_linear_range[]) {
170                 REGULATOR_LINEAR_RANGE(375000,  0,  95, 12500),
171                 REGULATOR_LINEAR_RANGE(1550000, 96, 158, 25000),
172         },
173         .n_linear_ranges = 2,
174         .n_voltages = 159,
175         .ops = &rpm_smps_ldo_ops,
176 };
177
178 static const struct regulator_desc pma8084_ftsmps = {
179         .linear_ranges = (struct regulator_linear_range[]) {
180                 REGULATOR_LINEAR_RANGE(350000,  0, 184, 5000),
181                 REGULATOR_LINEAR_RANGE(700000, 185, 339, 10000),
182         },
183         .n_linear_ranges = 2,
184         .n_voltages = 340,
185         .ops = &rpm_smps_ldo_ops,
186 };
187
188 static const struct regulator_desc pma8084_pldo = {
189         .linear_ranges = (struct regulator_linear_range[]) {
190                 REGULATOR_LINEAR_RANGE(750000,  0,  30, 25000),
191                 REGULATOR_LINEAR_RANGE(1500000, 31, 99, 50000),
192         },
193         .n_linear_ranges = 2,
194         .n_voltages = 100,
195         .ops = &rpm_smps_ldo_ops,
196 };
197
198 static const struct regulator_desc pma8084_nldo = {
199         .linear_ranges = (struct regulator_linear_range[]) {
200                 REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500),
201         },
202         .n_linear_ranges = 1,
203         .n_voltages = 64,
204         .ops = &rpm_smps_ldo_ops,
205 };
206
207 static const struct regulator_desc pma8084_switch = {
208         .ops = &rpm_switch_ops,
209 };
210
211 static const struct regulator_desc pm8x41_hfsmps = {
212         .linear_ranges = (struct regulator_linear_range[]) {
213                 REGULATOR_LINEAR_RANGE( 375000,  0,  95, 12500),
214                 REGULATOR_LINEAR_RANGE(1550000, 96, 158, 25000),
215         },
216         .n_linear_ranges = 2,
217         .n_voltages = 159,
218         .ops = &rpm_smps_ldo_ops,
219 };
220
221 static const struct regulator_desc pm8841_ftsmps = {
222         .linear_ranges = (struct regulator_linear_range[]) {
223                 REGULATOR_LINEAR_RANGE(350000,  0, 184, 5000),
224                 REGULATOR_LINEAR_RANGE(700000, 185, 339, 10000),
225         },
226         .n_linear_ranges = 2,
227         .n_voltages = 340,
228         .ops = &rpm_smps_ldo_ops,
229 };
230
231 static const struct regulator_desc pm8941_boost = {
232         .linear_ranges = (struct regulator_linear_range[]) {
233                 REGULATOR_LINEAR_RANGE(4000000, 0, 15, 100000),
234         },
235         .n_linear_ranges = 1,
236         .n_voltages = 16,
237         .ops = &rpm_smps_ldo_ops,
238 };
239
240 static const struct regulator_desc pm8941_pldo = {
241         .linear_ranges = (struct regulator_linear_range[]) {
242                 REGULATOR_LINEAR_RANGE( 750000,  0,  30, 25000),
243                 REGULATOR_LINEAR_RANGE(1500000, 31, 99, 50000),
244         },
245         .n_linear_ranges = 2,
246         .n_voltages = 100,
247         .ops = &rpm_smps_ldo_ops,
248 };
249
250 static const struct regulator_desc pm8941_nldo = {
251         .linear_ranges = (struct regulator_linear_range[]) {
252                 REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500),
253         },
254         .n_linear_ranges = 1,
255         .n_voltages = 64,
256         .ops = &rpm_smps_ldo_ops,
257 };
258
259 static const struct regulator_desc pm8941_lnldo = {
260         .fixed_uV = 1740000,
261         .n_voltages = 1,
262         .ops = &rpm_smps_ldo_ops_fixed,
263 };
264
265 static const struct regulator_desc pm8941_switch = {
266         .ops = &rpm_switch_ops,
267 };
268
269 static const struct regulator_desc pm8916_pldo = {
270         .linear_ranges = (struct regulator_linear_range[]) {
271                 REGULATOR_LINEAR_RANGE(750000, 0, 208, 12500),
272         },
273         .n_linear_ranges = 1,
274         .n_voltages = 209,
275         .ops = &rpm_smps_ldo_ops,
276 };
277
278 static const struct regulator_desc pm8916_nldo = {
279         .linear_ranges = (struct regulator_linear_range[]) {
280                 REGULATOR_LINEAR_RANGE(375000, 0, 93, 12500),
281         },
282         .n_linear_ranges = 1,
283         .n_voltages = 94,
284         .ops = &rpm_smps_ldo_ops,
285 };
286
287 static const struct regulator_desc pm8916_buck_lvo_smps = {
288         .linear_ranges = (struct regulator_linear_range[]) {
289                 REGULATOR_LINEAR_RANGE(375000, 0, 95, 12500),
290                 REGULATOR_LINEAR_RANGE(750000, 96, 127, 25000),
291         },
292         .n_linear_ranges = 2,
293         .n_voltages = 128,
294         .ops = &rpm_smps_ldo_ops,
295 };
296
297 static const struct regulator_desc pm8916_buck_hvo_smps = {
298         .linear_ranges = (struct regulator_linear_range[]) {
299                 REGULATOR_LINEAR_RANGE(1550000, 0, 31, 25000),
300         },
301         .n_linear_ranges = 1,
302         .n_voltages = 32,
303         .ops = &rpm_smps_ldo_ops,
304 };
305
306 struct rpm_regulator_data {
307         const char *name;
308         u32 type;
309         u32 id;
310         const struct regulator_desc *desc;
311         const char *supply;
312 };
313
314 static const struct rpm_regulator_data rpm_pm8841_regulators[] = {
315         { "s1", QCOM_SMD_RPM_SMPB, 1, &pm8x41_hfsmps, "vdd_s1" },
316         { "s2", QCOM_SMD_RPM_SMPB, 2, &pm8841_ftsmps, "vdd_s2" },
317         { "s3", QCOM_SMD_RPM_SMPB, 3, &pm8x41_hfsmps, "vdd_s3" },
318         { "s4", QCOM_SMD_RPM_SMPB, 4, &pm8841_ftsmps, "vdd_s4" },
319         { "s5", QCOM_SMD_RPM_SMPB, 5, &pm8841_ftsmps, "vdd_s5" },
320         { "s6", QCOM_SMD_RPM_SMPB, 6, &pm8841_ftsmps, "vdd_s6" },
321         { "s7", QCOM_SMD_RPM_SMPB, 7, &pm8841_ftsmps, "vdd_s7" },
322         { "s8", QCOM_SMD_RPM_SMPB, 8, &pm8841_ftsmps, "vdd_s8" },
323         {}
324 };
325
326 static const struct rpm_regulator_data rpm_pm8916_regulators[] = {
327         { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8916_buck_lvo_smps, "vdd_s1" },
328         { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8916_buck_lvo_smps, "vdd_s2" },
329         { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8916_buck_lvo_smps, "vdd_s3" },
330         { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8916_buck_hvo_smps, "vdd_s4" },
331         { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8916_nldo, "vdd_l1_l2_l3" },
332         { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8916_nldo, "vdd_l1_l2_l3" },
333         { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8916_nldo, "vdd_l1_l2_l3" },
334         { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8916_pldo, "vdd_l4_l5_l6" },
335         { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8916_pldo, "vdd_l4_l5_l6" },
336         { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8916_pldo, "vdd_l4_l5_l6" },
337         { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8916_pldo, "vdd_l7" },
338         { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18" },
339         { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18" },
340         { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
341         { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
342         { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
343         { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
344         { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
345         { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
346         { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
347         { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
348         { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
349         {}
350 };
351
352 static const struct rpm_regulator_data rpm_pm8941_regulators[] = {
353         { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8x41_hfsmps, "vdd_s1" },
354         { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8x41_hfsmps, "vdd_s2" },
355         { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8x41_hfsmps, "vdd_s3" },
356         { "s4", QCOM_SMD_RPM_BOOST, 1, &pm8941_boost },
357
358         { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8941_nldo, "vdd_l1_l3" },
359         { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8941_nldo, "vdd_l2_lvs1_2_3" },
360         { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8941_nldo, "vdd_l1_l3" },
361         { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8941_nldo, "vdd_l4_l11" },
362         { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8941_lnldo, "vdd_l5_l7" },
363         { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8941_pldo, "vdd_l6_l12_l14_l15" },
364         { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8941_lnldo, "vdd_l5_l7" },
365         { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8941_pldo, "vdd_l8_l16_l18_l19" },
366         { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8941_pldo, "vdd_l9_l10_l17_l22" },
367         { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8941_pldo, "vdd_l9_l10_l17_l22" },
368         { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8941_nldo, "vdd_l4_l11" },
369         { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8941_pldo, "vdd_l6_l12_l14_l15" },
370         { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8941_pldo, "vdd_l13_l20_l23_l24" },
371         { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8941_pldo, "vdd_l6_l12_l14_l15" },
372         { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8941_pldo, "vdd_l6_l12_l14_l15" },
373         { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8941_pldo, "vdd_l8_l16_l18_l19" },
374         { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8941_pldo, "vdd_l9_l10_l17_l22" },
375         { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8941_pldo, "vdd_l8_l16_l18_l19" },
376         { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8941_pldo, "vdd_l8_l16_l18_l19" },
377         { "l20", QCOM_SMD_RPM_LDOA, 20, &pm8941_pldo, "vdd_l13_l20_l23_l24" },
378         { "l21", QCOM_SMD_RPM_LDOA, 21, &pm8941_pldo, "vdd_l21" },
379         { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8941_pldo, "vdd_l9_l10_l17_l22" },
380         { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8941_pldo, "vdd_l13_l20_l23_l24" },
381         { "l24", QCOM_SMD_RPM_LDOA, 24, &pm8941_pldo, "vdd_l13_l20_l23_l24" },
382
383         { "lvs1", QCOM_SMD_RPM_VSA, 1, &pm8941_switch, "vdd_l2_lvs1_2_3" },
384         { "lvs2", QCOM_SMD_RPM_VSA, 2, &pm8941_switch, "vdd_l2_lvs1_2_3" },
385         { "lvs3", QCOM_SMD_RPM_VSA, 3, &pm8941_switch, "vdd_l2_lvs1_2_3" },
386
387         { "5vs1", QCOM_SMD_RPM_VSA, 4, &pm8941_switch, "vin_5vs" },
388         { "5vs2", QCOM_SMD_RPM_VSA, 5, &pm8941_switch, "vin_5vs" },
389
390         {}
391 };
392
393 static const struct rpm_regulator_data rpm_pma8084_regulators[] = {
394         { "s1", QCOM_SMD_RPM_SMPA, 1, &pma8084_ftsmps, "vdd_s1" },
395         { "s2", QCOM_SMD_RPM_SMPA, 2, &pma8084_ftsmps, "vdd_s2" },
396         { "s3", QCOM_SMD_RPM_SMPA, 3, &pma8084_hfsmps, "vdd_s3" },
397         { "s4", QCOM_SMD_RPM_SMPA, 4, &pma8084_hfsmps, "vdd_s4" },
398         { "s5", QCOM_SMD_RPM_SMPA, 5, &pma8084_hfsmps, "vdd_s5" },
399         { "s6", QCOM_SMD_RPM_SMPA, 6, &pma8084_ftsmps, "vdd_s6" },
400         { "s7", QCOM_SMD_RPM_SMPA, 7, &pma8084_ftsmps, "vdd_s7" },
401         { "s8", QCOM_SMD_RPM_SMPA, 8, &pma8084_ftsmps, "vdd_s8" },
402         { "s9", QCOM_SMD_RPM_SMPA, 9, &pma8084_ftsmps, "vdd_s9" },
403         { "s10", QCOM_SMD_RPM_SMPA, 10, &pma8084_ftsmps, "vdd_s10" },
404         { "s11", QCOM_SMD_RPM_SMPA, 11, &pma8084_ftsmps, "vdd_s11" },
405         { "s12", QCOM_SMD_RPM_SMPA, 12, &pma8084_ftsmps, "vdd_s12" },
406
407         { "l1", QCOM_SMD_RPM_LDOA, 1, &pma8084_nldo, "vdd_l1_l11" },
408         { "l2", QCOM_SMD_RPM_LDOA, 2, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
409         { "l3", QCOM_SMD_RPM_LDOA, 3, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
410         { "l4", QCOM_SMD_RPM_LDOA, 4, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
411         { "l5", QCOM_SMD_RPM_LDOA, 5, &pma8084_pldo, "vdd_l5_l7" },
412         { "l6", QCOM_SMD_RPM_LDOA, 6, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
413         { "l7", QCOM_SMD_RPM_LDOA, 7, &pma8084_pldo, "vdd_l5_l7" },
414         { "l8", QCOM_SMD_RPM_LDOA, 8, &pma8084_pldo, "vdd_l8" },
415         { "l9", QCOM_SMD_RPM_LDOA, 9, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
416         { "l10", QCOM_SMD_RPM_LDOA, 10, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
417         { "l11", QCOM_SMD_RPM_LDOA, 11, &pma8084_nldo, "vdd_l1_l11" },
418         { "l12", QCOM_SMD_RPM_LDOA, 12, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
419         { "l13", QCOM_SMD_RPM_LDOA, 13, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
420         { "l14", QCOM_SMD_RPM_LDOA, 14, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
421         { "l15", QCOM_SMD_RPM_LDOA, 15, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
422         { "l16", QCOM_SMD_RPM_LDOA, 16, &pma8084_pldo, "vdd_l16_l25" },
423         { "l17", QCOM_SMD_RPM_LDOA, 17, &pma8084_pldo, "vdd_l17" },
424         { "l18", QCOM_SMD_RPM_LDOA, 18, &pma8084_pldo, "vdd_l18" },
425         { "l19", QCOM_SMD_RPM_LDOA, 19, &pma8084_pldo, "vdd_l19" },
426         { "l20", QCOM_SMD_RPM_LDOA, 20, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
427         { "l21", QCOM_SMD_RPM_LDOA, 21, &pma8084_pldo, "vdd_l21" },
428         { "l22", QCOM_SMD_RPM_LDOA, 22, &pma8084_pldo, "vdd_l22" },
429         { "l23", QCOM_SMD_RPM_LDOA, 23, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
430         { "l24", QCOM_SMD_RPM_LDOA, 24, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
431         { "l25", QCOM_SMD_RPM_LDOA, 25, &pma8084_pldo, "vdd_l16_l25" },
432         { "l26", QCOM_SMD_RPM_LDOA, 26, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
433         { "l27", QCOM_SMD_RPM_LDOA, 27, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
434
435         { "lvs1", QCOM_SMD_RPM_VSA, 1, &pma8084_switch },
436         { "lvs2", QCOM_SMD_RPM_VSA, 2, &pma8084_switch },
437         { "lvs3", QCOM_SMD_RPM_VSA, 3, &pma8084_switch },
438         { "lvs4", QCOM_SMD_RPM_VSA, 4, &pma8084_switch },
439         { "5vs1", QCOM_SMD_RPM_VSA, 5, &pma8084_switch },
440
441         {}
442 };
443
444 static const struct of_device_id rpm_of_match[] = {
445         { .compatible = "qcom,rpm-pm8841-regulators", .data = &rpm_pm8841_regulators },
446         { .compatible = "qcom,rpm-pm8916-regulators", .data = &rpm_pm8916_regulators },
447         { .compatible = "qcom,rpm-pm8941-regulators", .data = &rpm_pm8941_regulators },
448         { .compatible = "qcom,rpm-pma8084-regulators", .data = &rpm_pma8084_regulators },
449         {}
450 };
451 MODULE_DEVICE_TABLE(of, rpm_of_match);
452
453 static int rpm_reg_probe(struct platform_device *pdev)
454 {
455         const struct rpm_regulator_data *reg;
456         const struct of_device_id *match;
457         struct regulator_config config = { };
458         struct regulator_dev *rdev;
459         struct qcom_rpm_reg *vreg;
460         struct qcom_smd_rpm *rpm;
461
462         rpm = dev_get_drvdata(pdev->dev.parent);
463         if (!rpm) {
464                 dev_err(&pdev->dev, "unable to retrieve handle to rpm\n");
465                 return -ENODEV;
466         }
467
468         match = of_match_device(rpm_of_match, &pdev->dev);
469         for (reg = match->data; reg->name; reg++) {
470                 vreg = devm_kzalloc(&pdev->dev, sizeof(*vreg), GFP_KERNEL);
471                 if (!vreg)
472                         return -ENOMEM;
473
474                 vreg->dev = &pdev->dev;
475                 vreg->type = reg->type;
476                 vreg->id = reg->id;
477                 vreg->rpm = rpm;
478
479                 memcpy(&vreg->desc, reg->desc, sizeof(vreg->desc));
480
481                 vreg->desc.id = -1;
482                 vreg->desc.owner = THIS_MODULE;
483                 vreg->desc.type = REGULATOR_VOLTAGE;
484                 vreg->desc.name = reg->name;
485                 vreg->desc.supply_name = reg->supply;
486                 vreg->desc.of_match = reg->name;
487
488                 config.dev = &pdev->dev;
489                 config.driver_data = vreg;
490                 rdev = devm_regulator_register(&pdev->dev, &vreg->desc, &config);
491                 if (IS_ERR(rdev)) {
492                         dev_err(&pdev->dev, "failed to register %s\n", reg->name);
493                         return PTR_ERR(rdev);
494                 }
495         }
496
497         return 0;
498 }
499
500 static struct platform_driver rpm_reg_driver = {
501         .probe = rpm_reg_probe,
502         .driver = {
503                 .name  = "qcom_rpm_smd_regulator",
504                 .of_match_table = rpm_of_match,
505         },
506 };
507
508 static int __init rpm_reg_init(void)
509 {
510         return platform_driver_register(&rpm_reg_driver);
511 }
512 subsys_initcall(rpm_reg_init);
513
514 static void __exit rpm_reg_exit(void)
515 {
516         platform_driver_unregister(&rpm_reg_driver);
517 }
518 module_exit(rpm_reg_exit)
519
520 MODULE_DESCRIPTION("Qualcomm RPM regulator driver");
521 MODULE_LICENSE("GPL v2");