drivers/staging/media/lirc/lirc_serial.c

   1 /*
   2  * lirc_serial.c
   3  *
   4  * lirc_serial - Device driver that records pulse- and pause-lengths
   5  *             (space-lengths) between DDCD event on a serial port.
   6  *
   7  * Copyright (C) 1996,97 Ralph Metzler <rjkm@thp.uni-koeln.de>
   8  * Copyright (C) 1998 Trent Piepho <xyzzy@u.washington.edu>
   9  * Copyright (C) 1998 Ben Pfaff <blp@gnu.org>
  10  * Copyright (C) 1999 Christoph Bartelmus <lirc@bartelmus.de>
  11  * Copyright (C) 2007 Andrei Tanas <andrei@tanas.ca> (suspend/resume support)
  12  *  This program is free software; you can redistribute it and/or modify
  13  *  it under the terms of the GNU General Public License as published by
  14  *  the Free Software Foundation; either version 2 of the License, or
  15  *  (at your option) any later version.
  16  *
  17  *  This program is distributed in the hope that it will be useful,
  18  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  19  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  20  *  GNU General Public License for more details.
  21  *
  22  *  You should have received a copy of the GNU General Public License
  23  *  along with this program; if not, write to the Free Software
  24  *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  25  *
  26  */
  27
  28 /*
  29  * Steve's changes to improve transmission fidelity:
  30  *   - for systems with the rdtsc instruction and the clock counter, a
  31  *     send_pule that times the pulses directly using the counter.
  32  *     This means that the LIRC_SERIAL_TRANSMITTER_LATENCY fudge is
  33  *     not needed. Measurement shows very stable waveform, even where
  34  *     PCI activity slows the access to the UART, which trips up other
  35  *     versions.
  36  *   - For other system, non-integer-microsecond pulse/space lengths,
  37  *     done using fixed point binary. So, much more accurate carrier
  38  *     frequency.
  39  *   - fine tuned transmitter latency, taking advantage of fractional
  40  *     microseconds in previous change
  41  *   - Fixed bug in the way transmitter latency was accounted for by
  42  *     tuning the pulse lengths down - the send_pulse routine ignored
  43  *     this overhead as it timed the overall pulse length - so the
  44  *     pulse frequency was right but overall pulse length was too
  45  *     long. Fixed by accounting for latency on each pulse/space
  46  *     iteration.
  47  *
  48  * Steve Davies <steve@daviesfam.org>  July 2001
  49  */
  50
  51 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  52
  53 #include <linux/module.h>
  54 #include <linux/errno.h>
  55 #include <linux/signal.h>
  56 #include <linux/sched.h>
  57 #include <linux/fs.h>
  58 #include <linux/interrupt.h>
  59 #include <linux/ioport.h>
  60 #include <linux/kernel.h>
  61 #include <linux/serial_reg.h>
  62 #include <linux/time.h>
  63 #include <linux/string.h>
  64 #include <linux/types.h>
  65 #include <linux/wait.h>
  66 #include <linux/mm.h>
  67 #include <linux/delay.h>
  68 #include <linux/poll.h>
  69 #include <linux/platform_device.h>
  70 #include <linux/gpio.h>
  71 #include <linux/io.h>
  72 #include <linux/irq.h>
  73 #include <linux/fcntl.h>
  74 #include <linux/spinlock.h>
  75
  76 /* From Intel IXP42X Developer's Manual (#252480-005): */
  77 /* ftp://download.intel.com/design/network/manuals/25248005.pdf */
  78 #define UART_IE_IXP42X_UUE   0x40 /* IXP42X UART Unit enable */
  79 #define UART_IE_IXP42X_RTOIE 0x10 /* IXP42X Receiver Data Timeout int.enable */
  80
  81 #include <media/lirc.h>
  82 #include <media/lirc_dev.h>
  83
  84 #define LIRC_DRIVER_NAME "lirc_serial"
  85
  86 struct lirc_serial {
  87         int signal_pin;
  88         int signal_pin_change;
  89         u8 on;
  90         u8 off;
  91         long (*send_pulse)(unsigned long length);
  92         void (*send_space)(long length);
  93         int features;
  94         spinlock_t lock;
  95 };
  96
  97 #define LIRC_HOMEBREW           0
  98 #define LIRC_IRDEO              1
  99 #define LIRC_IRDEO_REMOTE       2
 100 #define LIRC_ANIMAX             3
 101 #define LIRC_IGOR               4
 102 #define LIRC_NSLU2              5
 103
 104 /*** module parameters ***/
 105 static int type;
 106 static int io;
 107 static int irq;
 108 static bool iommap;
 109 static int ioshift;
 110 static bool softcarrier = true;
 111 static bool share_irq;
 112 static int sense = -1;  /* -1 = auto, 0 = active high, 1 = active low */
 113 static bool txsense;    /* 0 = active high, 1 = active low */
 114
 115 /* forward declarations */
 116 static long send_pulse_irdeo(unsigned long length);
 117 static long send_pulse_homebrew(unsigned long length);
 118 static void send_space_irdeo(long length);
 119 static void send_space_homebrew(long length);
 120
 121 static struct lirc_serial hardware[] = {
 122         [LIRC_HOMEBREW] = {
 123                 .lock = __SPIN_LOCK_UNLOCKED(hardware[LIRC_HOMEBREW].lock),
 124                 .signal_pin        = UART_MSR_DCD,
 125                 .signal_pin_change = UART_MSR_DDCD,
 126                 .on  = (UART_MCR_RTS | UART_MCR_OUT2 | UART_MCR_DTR),
 127                 .off = (UART_MCR_RTS | UART_MCR_OUT2),
 128                 .send_pulse = send_pulse_homebrew,
 129                 .send_space = send_space_homebrew,
 130 #ifdef CONFIG_LIRC_SERIAL_TRANSMITTER
 131                 .features    = (LIRC_CAN_SET_SEND_DUTY_CYCLE |
 132                                 LIRC_CAN_SET_SEND_CARRIER |
 133                                 LIRC_CAN_SEND_PULSE | LIRC_CAN_REC_MODE2)
 134 #else
 135                 .features    = LIRC_CAN_REC_MODE2
 136 #endif
 137         },
 138
 139         [LIRC_IRDEO] = {
 140                 .lock = __SPIN_LOCK_UNLOCKED(hardware[LIRC_IRDEO].lock),
 141                 .signal_pin        = UART_MSR_DSR,
 142                 .signal_pin_change = UART_MSR_DDSR,
 143                 .on  = UART_MCR_OUT2,
 144                 .off = (UART_MCR_RTS | UART_MCR_DTR | UART_MCR_OUT2),
 145                 .send_pulse  = send_pulse_irdeo,
 146                 .send_space  = send_space_irdeo,
 147                 .features    = (LIRC_CAN_SET_SEND_DUTY_CYCLE |
 148                                 LIRC_CAN_SEND_PULSE | LIRC_CAN_REC_MODE2)
 149         },
 150
 151         [LIRC_IRDEO_REMOTE] = {
 152                 .lock = __SPIN_LOCK_UNLOCKED(hardware[LIRC_IRDEO_REMOTE].lock),
 153                 .signal_pin        = UART_MSR_DSR,
 154                 .signal_pin_change = UART_MSR_DDSR,
 155                 .on  = (UART_MCR_RTS | UART_MCR_DTR | UART_MCR_OUT2),
 156                 .off = (UART_MCR_RTS | UART_MCR_DTR | UART_MCR_OUT2),
 157                 .send_pulse  = send_pulse_irdeo,
 158                 .send_space  = send_space_irdeo,
 159                 .features    = (LIRC_CAN_SET_SEND_DUTY_CYCLE |
 160                                 LIRC_CAN_SEND_PULSE | LIRC_CAN_REC_MODE2)
 161         },
 162
 163         [LIRC_ANIMAX] = {
 164                 .lock = __SPIN_LOCK_UNLOCKED(hardware[LIRC_ANIMAX].lock),
 165                 .signal_pin        = UART_MSR_DCD,
 166                 .signal_pin_change = UART_MSR_DDCD,
 167                 .on  = 0,
 168                 .off = (UART_MCR_RTS | UART_MCR_DTR | UART_MCR_OUT2),
 169                 .send_pulse = NULL,
 170                 .send_space = NULL,
 171                 .features   = LIRC_CAN_REC_MODE2
 172         },
 173
 174         [LIRC_IGOR] = {
 175                 .lock = __SPIN_LOCK_UNLOCKED(hardware[LIRC_IGOR].lock),
 176                 .signal_pin        = UART_MSR_DSR,
 177                 .signal_pin_change = UART_MSR_DDSR,
 178                 .on  = (UART_MCR_RTS | UART_MCR_OUT2 | UART_MCR_DTR),
 179                 .off = (UART_MCR_RTS | UART_MCR_OUT2),
 180                 .send_pulse = send_pulse_homebrew,
 181                 .send_space = send_space_homebrew,
 182 #ifdef CONFIG_LIRC_SERIAL_TRANSMITTER
 183                 .features    = (LIRC_CAN_SET_SEND_DUTY_CYCLE |
 184                                 LIRC_CAN_SET_SEND_CARRIER |
 185                                 LIRC_CAN_SEND_PULSE | LIRC_CAN_REC_MODE2)
 186 #else
 187                 .features    = LIRC_CAN_REC_MODE2
 188 #endif
 189         },
 190 };
 191
 192 #define RS_ISR_PASS_LIMIT 256
 193
 194 /*
 195  * A long pulse code from a remote might take up to 300 bytes.  The
 196  * daemon should read the bytes as soon as they are generated, so take
 197  * the number of keys you think you can push before the daemon runs
 198  * and multiply by 300.  The driver will warn you if you overrun this
 199  * buffer.  If you have a slow computer or non-busmastering IDE disks,
 200  * maybe you will need to increase this.
 201  */
 202
 203 /* This MUST be a power of two!  It has to be larger than 1 as well. */
 204
 205 #define RBUF_LEN 256
 206
 207 static struct timeval lasttv = {0, 0};
 208
 209 static struct lirc_buffer rbuf;
 210
 211 static unsigned int freq = 38000;
 212 static unsigned int duty_cycle = 50;
 213
 214 /* Initialized in init_timing_params() */
 215 static unsigned long period;
 216 static unsigned long pulse_width;
 217 static unsigned long space_width;
 218
 219 #if defined(__i386__)
 220 /*
 221  * From:
 222  * Linux I/O port programming mini-HOWTO
 223  * Author: Riku Saikkonen <Riku.Saikkonen@hut.fi>
 224  * v, 28 December 1997
 225  *
 226  * [...]
 227  * Actually, a port I/O instruction on most ports in the 0-0x3ff range
 228  * takes almost exactly 1 microsecond, so if you're, for example, using
 229  * the parallel port directly, just do additional inb()s from that port
 230  * to delay.
 231  * [...]
 232  */
 233 /* transmitter latency 1.5625us 0x1.90 - this figure arrived at from
 234  * comment above plus trimming to match actual measured frequency.
 235  * This will be sensitive to cpu speed, though hopefully most of the 1.5us
 236  * is spent in the uart access.  Still - for reference test machine was a
 237  * 1.13GHz Athlon system - Steve
 238  */
 239
 240 /*
 241  * changed from 400 to 450 as this works better on slower machines;
 242  * faster machines will use the rdtsc code anyway
 243  */
 244 #define LIRC_SERIAL_TRANSMITTER_LATENCY 450
 245
 246 #else
 247
 248 /* does anybody have information on other platforms ? */
 249 /* 256 = 1<<8 */
 250 #define LIRC_SERIAL_TRANSMITTER_LATENCY 256
 251
 252 #endif  /* __i386__ */
 253 /*
 254  * FIXME: should we be using hrtimers instead of this
 255  * LIRC_SERIAL_TRANSMITTER_LATENCY nonsense?
 256  */
 257
 258 /* fetch serial input packet (1 byte) from register offset */
 259 static u8 sinp(int offset)
 260 {
 261         if (iommap)
 262                 /* the register is memory-mapped */
 263                 offset <<= ioshift;
 264
 265         return inb(io + offset);
 266 }
 267
 268 /* write serial output packet (1 byte) of value to register offset */
 269 static void soutp(int offset, u8 value)
 270 {
 271         if (iommap)
 272                 /* the register is memory-mapped */
 273                 offset <<= ioshift;
 274
 275         outb(value, io + offset);
 276 }
 277
 278 static void on(void)
 279 {
 280         if (txsense)
 281                 soutp(UART_MCR, hardware[type].off);
 282         else
 283                 soutp(UART_MCR, hardware[type].on);
 284 }
 285
 286 static void off(void)
 287 {
 288         if (txsense)
 289                 soutp(UART_MCR, hardware[type].on);
 290         else
 291                 soutp(UART_MCR, hardware[type].off);
 292 }
 293
 294 #ifndef MAX_UDELAY_MS
 295 #define MAX_UDELAY_US 5000
 296 #else
 297 #define MAX_UDELAY_US (MAX_UDELAY_MS*1000)
 298 #endif
 299
 300 static void safe_udelay(unsigned long usecs)
 301 {
 302         while (usecs > MAX_UDELAY_US) {
 303                 udelay(MAX_UDELAY_US);
 304                 usecs -= MAX_UDELAY_US;
 305         }
 306         udelay(usecs);
 307 }
 308
 309 #ifdef USE_RDTSC
 310 /*
 311  * This is an overflow/precision juggle, complicated in that we can't
 312  * do long long divide in the kernel
 313  */
 314
 315 /*
 316  * When we use the rdtsc instruction to measure clocks, we keep the
 317  * pulse and space widths as clock cycles.  As this is CPU speed
 318  * dependent, the widths must be calculated in init_port and ioctl
 319  * time
 320  */
 321
 322 static int init_timing_params(unsigned int new_duty_cycle,
 323                 unsigned int new_freq)
 324 {
 325         __u64 loops_per_sec, work;
 326
 327         duty_cycle = new_duty_cycle;
 328         freq = new_freq;
 329
 330         loops_per_sec = __this_cpu_read(cpu.info.loops_per_jiffy);
 331         loops_per_sec *= HZ;
 332
 333         /* How many clocks in a microsecond?, avoiding long long divide */
 334         work = loops_per_sec;
 335         work *= 4295;  /* 4295 = 2^32 / 1e6 */
 336
 337         /*
 338          * Carrier period in clocks, approach good up to 32GHz clock,
 339          * gets carrier frequency within 8Hz
 340          */
 341         period = loops_per_sec >> 3;
 342         period /= (freq >> 3);
 343
 344         /* Derive pulse and space from the period */
 345         pulse_width = period * duty_cycle / 100;
 346         space_width = period - pulse_width;
 347         pr_debug("in init_timing_params, freq=%d, duty_cycle=%d, clk/jiffy=%ld, pulse=%ld, space=%ld, conv_us_to_clocks=%ld\n",
 348                  freq, duty_cycle, __this_cpu_read(cpu_info.loops_per_jiffy),
 349                  pulse_width, space_width, conv_us_to_clocks);
 350         return 0;
 351 }
 352 #else /* ! USE_RDTSC */
 353 static int init_timing_params(unsigned int new_duty_cycle,
 354                 unsigned int new_freq)
 355 {
 356 /*
 357  * period, pulse/space width are kept with 8 binary places -
 358  * IE multiplied by 256.
 359  */
 360         if (256 * 1000000L / new_freq * new_duty_cycle / 100 <=
 361             LIRC_SERIAL_TRANSMITTER_LATENCY)
 362                 return -EINVAL;
 363         if (256 * 1000000L / new_freq * (100 - new_duty_cycle) / 100 <=
 364             LIRC_SERIAL_TRANSMITTER_LATENCY)
 365                 return -EINVAL;
 366         duty_cycle = new_duty_cycle;
 367         freq = new_freq;
 368         period = 256 * 1000000L / freq;
 369         pulse_width = period * duty_cycle / 100;
 370         space_width = period - pulse_width;
 371         pr_debug("in init_timing_params, freq=%d pulse=%ld, space=%ld\n",
 372                  freq, pulse_width, space_width);
 373         return 0;
 374 }
 375 #endif /* USE_RDTSC */
 376
 377
 378 /* return value: space length delta */
 379
 380 static long send_pulse_irdeo(unsigned long length)
 381 {
 382         long rawbits, ret;
 383         int i;
 384         unsigned char output;
 385         unsigned char chunk, shifted;
 386
 387         /* how many bits have to be sent ? */
 388         rawbits = length * 1152 / 10000;
 389         if (duty_cycle > 50)
 390                 chunk = 3;
 391         else
 392                 chunk = 1;
 393         for (i = 0, output = 0x7f; rawbits > 0; rawbits -= 3) {
 394                 shifted = chunk << (i * 3);
 395                 shifted >>= 1;
 396                 output &= (~shifted);
 397                 i++;
 398                 if (i == 3) {
 399                         soutp(UART_TX, output);
 400                         while (!(sinp(UART_LSR) & UART_LSR_THRE))
 401                                 ;
 402                         output = 0x7f;
 403                         i = 0;
 404                 }
 405         }
 406         if (i != 0) {
 407                 soutp(UART_TX, output);
 408                 while (!(sinp(UART_LSR) & UART_LSR_TEMT))
 409                         ;
 410         }
 411
 412         if (i == 0)
 413                 ret = (-rawbits) * 10000 / 1152;
 414         else
 415                 ret = (3 - i) * 3 * 10000 / 1152 + (-rawbits) * 10000 / 1152;
 416
 417         return ret;
 418 }
 419
 420 /* Version using udelay() */
 421
 422 /*
 423  * here we use fixed point arithmetic, with 8
 424  * fractional bits.  that gets us within 0.1% or so of the right average
 425  * frequency, albeit with some jitter in pulse length - Steve
 426  *
 427  * This should use ndelay instead.
 428  */
 429
 430 /* To match 8 fractional bits used for pulse/space length */
 431
 432 static long send_pulse_homebrew_softcarrier(unsigned long length)
 433 {
 434         int flag;
 435         unsigned long actual, target, d;
 436
 437         length <<= 8;
 438
 439         actual = 0; target = 0; flag = 0;
 440         while (actual < length) {
 441                 if (flag) {
 442                         off();
 443                         target += space_width;
 444                 } else {
 445                         on();
 446                         target += pulse_width;
 447                 }
 448                 d = (target - actual -
 449                      LIRC_SERIAL_TRANSMITTER_LATENCY + 128) >> 8;
 450                 /*
 451                  * Note - we've checked in ioctl that the pulse/space
 452                  * widths are big enough so that d is > 0
 453                  */
 454                 udelay(d);
 455                 actual += (d << 8) + LIRC_SERIAL_TRANSMITTER_LATENCY;
 456                 flag = !flag;
 457         }
 458         return (actual-length) >> 8;
 459 }
 460
 461 static long send_pulse_homebrew(unsigned long length)
 462 {
 463         if (length <= 0)
 464                 return 0;
 465
 466         if (softcarrier)
 467                 return send_pulse_homebrew_softcarrier(length);
 468
 469         on();
 470         safe_udelay(length);
 471         return 0;
 472 }
 473
 474 static void send_space_irdeo(long length)
 475 {
 476         if (length <= 0)
 477                 return;
 478
 479         safe_udelay(length);
 480 }
 481
 482 static void send_space_homebrew(long length)
 483 {
 484         off();
 485         if (length <= 0)
 486                 return;
 487         safe_udelay(length);
 488 }
 489
 490 static void rbwrite(int l)
 491 {
 492         if (lirc_buffer_full(&rbuf)) {
 493                 /* no new signals will be accepted */
 494                 pr_debug("Buffer overrun\n");
 495                 return;
 496         }
 497         lirc_buffer_write(&rbuf, (void *)&l);
 498 }
 499
 500 static void frbwrite(int l)
 501 {
 502         /* simple noise filter */
 503         static int pulse, space;
 504         static unsigned int ptr;
 505
 506         if (ptr > 0 && (l & PULSE_BIT)) {
 507                 pulse += l & PULSE_MASK;
 508                 if (pulse > 250) {
 509                         rbwrite(space);
 510                         rbwrite(pulse | PULSE_BIT);
 511                         ptr = 0;
 512                         pulse = 0;
 513                 }
 514                 return;
 515         }
 516         if (!(l & PULSE_BIT)) {
 517                 if (ptr == 0) {
 518                         if (l > 20000) {
 519                                 space = l;
 520                                 ptr++;
 521                                 return;
 522                         }
 523                 } else {
 524                         if (l > 20000) {
 525                                 space += pulse;
 526                                 if (space > PULSE_MASK)
 527                                         space = PULSE_MASK;
 528                                 space += l;
 529                                 if (space > PULSE_MASK)
 530                                         space = PULSE_MASK;
 531                                 pulse = 0;
 532                                 return;
 533                         }
 534                         rbwrite(space);
 535                         rbwrite(pulse | PULSE_BIT);
 536                         ptr = 0;
 537                         pulse = 0;
 538                 }
 539         }
 540         rbwrite(l);
 541 }
 542
 543 static irqreturn_t lirc_irq_handler(int i, void *blah)
 544 {
 545         struct timeval tv;
 546         int counter, dcd;
 547         u8 status;
 548         long deltv;
 549         int data;
 550         static int last_dcd = -1;
 551
 552         if ((sinp(UART_IIR) & UART_IIR_NO_INT)) {
 553                 /* not our interrupt */
 554                 return IRQ_NONE;
 555         }
 556
 557         counter = 0;
 558         do {
 559                 counter++;
 560                 status = sinp(UART_MSR);
 561                 if (counter > RS_ISR_PASS_LIMIT) {
 562                         pr_warn("AIEEEE: We're caught!\n");
 563                         break;
 564                 }
 565                 if ((status & hardware[type].signal_pin_change)
 566                     && sense != -1) {
 567                         /* get current time */
 568                         do_gettimeofday(&tv);
 569
 570                         /* New mode, written by Trent Piepho
 571                            <xyzzy@u.washington.edu>. */
 572
 573                         /*
 574                          * The old format was not very portable.
 575                          * We now use an int to pass pulses
 576                          * and spaces to user space.
 577                          *
 578                          * If PULSE_BIT is set a pulse has been
 579                          * received, otherwise a space has been
 580                          * received.  The driver needs to know if your
 581                          * receiver is active high or active low, or
 582                          * the space/pulse sense could be
 583                          * inverted. The bits denoted by PULSE_MASK are
 584                          * the length in microseconds. Lengths greater
 585                          * than or equal to 16 seconds are clamped to
 586                          * PULSE_MASK.  All other bits are unused.
 587                          * This is a much simpler interface for user
 588                          * programs, as well as eliminating "out of
 589                          * phase" errors with space/pulse
 590                          * autodetection.
 591                          */
 592
 593                         /* calc time since last interrupt in microseconds */
 594                         dcd = (status & hardware[type].signal_pin) ? 1 : 0;
 595
 596                         if (dcd == last_dcd) {
 597                                 pr_warn("ignoring spike: %d %d %lx %lx %lx %lx\n",
 598                                         dcd, sense,
 599                                         tv.tv_sec, lasttv.tv_sec,
 600                                         (unsigned long)tv.tv_usec,
 601                                         (unsigned long)lasttv.tv_usec);
 602                                 continue;
 603                         }
 604
 605                         deltv = tv.tv_sec-lasttv.tv_sec;
 606                         if (tv.tv_sec < lasttv.tv_sec ||
 607                             (tv.tv_sec == lasttv.tv_sec &&
 608                              tv.tv_usec < lasttv.tv_usec)) {
 609                                 pr_warn("AIEEEE: your clock just jumped backwards\n");
 610                                 pr_warn("%d %d %lx %lx %lx %lx\n",
 611                                         dcd, sense,
 612                                         tv.tv_sec, lasttv.tv_sec,
 613                                         (unsigned long)tv.tv_usec,
 614                                         (unsigned long)lasttv.tv_usec);
 615                                 data = PULSE_MASK;
 616                         } else if (deltv > 15) {
 617                                 data = PULSE_MASK; /* really long time */
 618                                 if (!(dcd^sense)) {
 619                                         /* sanity check */
 620                                         pr_warn("AIEEEE: %d %d %lx %lx %lx %lx\n",
 621                                                 dcd, sense,
 622                                                 tv.tv_sec, lasttv.tv_sec,
 623                                                 (unsigned long)tv.tv_usec,
 624                                                 (unsigned long)lasttv.tv_usec);
 625                                         /*
 626                                          * detecting pulse while this
 627                                          * MUST be a space!
 628                                          */
 629                                         sense = sense ? 0 : 1;
 630                                 }
 631                         } else
 632                                 data = (int) (deltv*1000000 +
 633                                                tv.tv_usec -
 634                                                lasttv.tv_usec);
 635                         frbwrite(dcd^sense ? data : (data|PULSE_BIT));
 636                         lasttv = tv;
 637                         last_dcd = dcd;
 638                         wake_up_interruptible(&rbuf.wait_poll);
 639                 }
 640         } while (!(sinp(UART_IIR) & UART_IIR_NO_INT)); /* still pending ? */
 641         return IRQ_HANDLED;
 642 }
 643
 644
 645 static int hardware_init_port(void)
 646 {
 647         u8 scratch, scratch2, scratch3;
 648
 649         /*
 650          * This is a simple port existence test, borrowed from the autoconfig
 651          * function in drivers/serial/8250.c
 652          */
 653         scratch = sinp(UART_IER);
 654         soutp(UART_IER, 0);
 655 #ifdef __i386__
 656         outb(0xff, 0x080);
 657 #endif
 658         scratch2 = sinp(UART_IER) & 0x0f;
 659         soutp(UART_IER, 0x0f);
 660 #ifdef __i386__
 661         outb(0x00, 0x080);
 662 #endif
 663         scratch3 = sinp(UART_IER) & 0x0f;
 664         soutp(UART_IER, scratch);
 665         if (scratch2 != 0 || scratch3 != 0x0f) {
 666                 /* we fail, there's nothing here */
 667                 pr_err("port existence test failed, cannot continue\n");
 668                 return -ENODEV;
 669         }
 670
 671
 672
 673         /* Set DLAB 0. */
 674         soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB));
 675
 676         /* First of all, disable all interrupts */
 677         soutp(UART_IER, sinp(UART_IER) &
 678               (~(UART_IER_MSI|UART_IER_RLSI|UART_IER_THRI|UART_IER_RDI)));
 679
 680         /* Clear registers. */
 681         sinp(UART_LSR);
 682         sinp(UART_RX);
 683         sinp(UART_IIR);
 684         sinp(UART_MSR);
 685
 686         /* Set line for power source */
 687         off();
 688
 689         /* Clear registers again to be sure. */
 690         sinp(UART_LSR);
 691         sinp(UART_RX);
 692         sinp(UART_IIR);
 693         sinp(UART_MSR);
 694
 695         switch (type) {
 696         case LIRC_IRDEO:
 697         case LIRC_IRDEO_REMOTE:
 698                 /* setup port to 7N1 @ 115200 Baud */
 699                 /* 7N1+start = 9 bits at 115200 ~ 3 bits at 38kHz */
 700
 701                 /* Set DLAB 1. */
 702                 soutp(UART_LCR, sinp(UART_LCR) | UART_LCR_DLAB);
 703                 /* Set divisor to 1 => 115200 Baud */
 704                 soutp(UART_DLM, 0);
 705                 soutp(UART_DLL, 1);
 706                 /* Set DLAB 0 +  7N1 */
 707                 soutp(UART_LCR, UART_LCR_WLEN7);
 708                 /* THR interrupt already disabled at this point */
 709                 break;
 710         default:
 711                 break;
 712         }
 713
 714         return 0;
 715 }
 716
 717 static int lirc_serial_probe(struct platform_device *dev)
 718 {
 719         int i, nlow, nhigh, result;
 720
 721         result = devm_request_irq(&dev->dev, irq, lirc_irq_handler,
 722                              (share_irq ? IRQF_SHARED : 0),
 723                              LIRC_DRIVER_NAME, &hardware);
 724         if (result < 0) {
 725                 if (result == -EBUSY)
 726                         dev_err(&dev->dev, "IRQ %d busy\n", irq);
 727                 else if (result == -EINVAL)
 728                         dev_err(&dev->dev, "Bad irq number or handler\n");
 729                 return result;
 730         }
 731
 732         /* Reserve io region. */
 733         /*
 734          * Future MMAP-Developers: Attention!
 735          * For memory mapped I/O you *might* need to use ioremap() first,
 736          * for the NSLU2 it's done in boot code.
 737          */
 738         if (((iommap)
 739              && (devm_request_mem_region(&dev->dev, iommap, 8 << ioshift,
 740                                          LIRC_DRIVER_NAME) == NULL))
 741            || ((!iommap)
 742                && (devm_request_region(&dev->dev, io, 8,
 743                                        LIRC_DRIVER_NAME) == NULL))) {
 744                 dev_err(&dev->dev, "port %04x already in use\n", io);
 745                 dev_warn(&dev->dev, "use 'setserial /dev/ttySX uart none'\n");
 746                 dev_warn(&dev->dev,
 747                          "or compile the serial port driver as module and\n");
 748                 dev_warn(&dev->dev, "make sure this module is loaded first\n");
 749                 return -EBUSY;
 750         }
 751
 752         result = hardware_init_port();
 753         if (result < 0)
 754                 return result;
 755
 756         /* Initialize pulse/space widths */
 757         init_timing_params(duty_cycle, freq);
 758
 759         /* If pin is high, then this must be an active low receiver. */
 760         if (sense == -1) {
 761                 /* wait 1/2 sec for the power supply */
 762                 msleep(500);
 763
 764                 /*
 765                  * probe 9 times every 0.04s, collect "votes" for
 766                  * active high/low
 767                  */
 768                 nlow = 0;
 769                 nhigh = 0;
 770                 for (i = 0; i < 9; i++) {
 771                         if (sinp(UART_MSR) & hardware[type].signal_pin)
 772                                 nlow++;
 773                         else
 774                                 nhigh++;
 775                         msleep(40);
 776                 }
 777                 sense = nlow >= nhigh ? 1 : 0;
 778                 dev_info(&dev->dev, "auto-detected active %s receiver\n",
 779                          sense ? "low" : "high");
 780         } else
 781                 dev_info(&dev->dev, "Manually using active %s receiver\n",
 782                          sense ? "low" : "high");
 783
 784         dev_dbg(&dev->dev, "Interrupt %d, port %04x obtained\n", irq, io);
 785         return 0;
 786 }
 787
 788 static int set_use_inc(void *data)
 789 {
 790         unsigned long flags;
 791
 792         /* initialize timestamp */
 793         do_gettimeofday(&lasttv);
 794
 795         spin_lock_irqsave(&hardware[type].lock, flags);
 796
 797         /* Set DLAB 0. */
 798         soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB));
 799
 800         soutp(UART_IER, sinp(UART_IER)|UART_IER_MSI);
 801
 802         spin_unlock_irqrestore(&hardware[type].lock, flags);
 803
 804         return 0;
 805 }
 806
 807 static void set_use_dec(void *data)
 808 {       unsigned long flags;
 809
 810         spin_lock_irqsave(&hardware[type].lock, flags);
 811
 812         /* Set DLAB 0. */
 813         soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB));
 814
 815         /* First of all, disable all interrupts */
 816         soutp(UART_IER, sinp(UART_IER) &
 817               (~(UART_IER_MSI|UART_IER_RLSI|UART_IER_THRI|UART_IER_RDI)));
 818         spin_unlock_irqrestore(&hardware[type].lock, flags);
 819 }
 820
 821 static ssize_t lirc_write(struct file *file, const char __user *buf,
 822                          size_t n, loff_t *ppos)
 823 {
 824         int i, count;
 825         unsigned long flags;
 826         long delta = 0;
 827         int *wbuf;
 828
 829         if (!(hardware[type].features & LIRC_CAN_SEND_PULSE))
 830                 return -EPERM;
 831
 832         count = n / sizeof(int);
 833         if (n % sizeof(int) || count % 2 == 0)
 834                 return -EINVAL;
 835         wbuf = memdup_user(buf, n);
 836         if (IS_ERR(wbuf))
 837                 return PTR_ERR(wbuf);
 838         spin_lock_irqsave(&hardware[type].lock, flags);
 839         if (type == LIRC_IRDEO) {
 840                 /* DTR, RTS down */
 841                 on();
 842         }
 843         for (i = 0; i < count; i++) {
 844                 if (i%2)
 845                         hardware[type].send_space(wbuf[i] - delta);
 846                 else
 847                         delta = hardware[type].send_pulse(wbuf[i]);
 848         }
 849         off();
 850         spin_unlock_irqrestore(&hardware[type].lock, flags);
 851         kfree(wbuf);
 852         return n;
 853 }
 854
 855 static long lirc_ioctl(struct file *filep, unsigned int cmd, unsigned long arg)
 856 {
 857         int result;
 858         u32 __user *uptr = (u32 __user *)arg;
 859         u32 value;
 860
 861         switch (cmd) {
 862         case LIRC_GET_SEND_MODE:
 863                 if (!(hardware[type].features&LIRC_CAN_SEND_MASK))
 864                         return -ENOIOCTLCMD;
 865
 866                 result = put_user(LIRC_SEND2MODE
 867                                   (hardware[type].features&LIRC_CAN_SEND_MASK),
 868                                   uptr);
 869                 if (result)
 870                         return result;
 871                 break;
 872
 873         case LIRC_SET_SEND_MODE:
 874                 if (!(hardware[type].features&LIRC_CAN_SEND_MASK))
 875                         return -ENOIOCTLCMD;
 876
 877                 result = get_user(value, uptr);
 878                 if (result)
 879                         return result;
 880                 /* only LIRC_MODE_PULSE supported */
 881                 if (value != LIRC_MODE_PULSE)
 882                         return -EINVAL;
 883                 break;
 884
 885         case LIRC_GET_LENGTH:
 886                 return -ENOIOCTLCMD;
 887
 888         case LIRC_SET_SEND_DUTY_CYCLE:
 889                 pr_debug("SET_SEND_DUTY_CYCLE\n");
 890                 if (!(hardware[type].features&LIRC_CAN_SET_SEND_DUTY_CYCLE))
 891                         return -ENOIOCTLCMD;
 892
 893                 result = get_user(value, uptr);
 894                 if (result)
 895                         return result;
 896                 if (value <= 0 || value > 100)
 897                         return -EINVAL;
 898                 return init_timing_params(value, freq);
 899
 900         case LIRC_SET_SEND_CARRIER:
 901                 pr_debug("SET_SEND_CARRIER\n");
 902                 if (!(hardware[type].features&LIRC_CAN_SET_SEND_CARRIER))
 903                         return -ENOIOCTLCMD;
 904
 905                 result = get_user(value, uptr);
 906                 if (result)
 907                         return result;
 908                 if (value > 500000 || value < 20000)
 909                         return -EINVAL;
 910                 return init_timing_params(duty_cycle, value);
 911
 912         default:
 913                 return lirc_dev_fop_ioctl(filep, cmd, arg);
 914         }
 915         return 0;
 916 }
 917
 918 static const struct file_operations lirc_fops = {
 919         .owner          = THIS_MODULE,
 920         .write          = lirc_write,
 921         .unlocked_ioctl = lirc_ioctl,
 922 #ifdef CONFIG_COMPAT
 923         .compat_ioctl   = lirc_ioctl,
 924 #endif
 925         .read           = lirc_dev_fop_read,
 926         .poll           = lirc_dev_fop_poll,
 927         .open           = lirc_dev_fop_open,
 928         .release        = lirc_dev_fop_close,
 929         .llseek         = no_llseek,
 930 };
 931
 932 static struct lirc_driver driver = {
 933         .name           = LIRC_DRIVER_NAME,
 934         .minor          = -1,
 935         .code_length    = 1,
 936         .sample_rate    = 0,
 937         .data           = NULL,
 938         .add_to_buf     = NULL,
 939         .rbuf           = &rbuf,
 940         .set_use_inc    = set_use_inc,
 941         .set_use_dec    = set_use_dec,
 942         .fops           = &lirc_fops,
 943         .dev            = NULL,
 944         .owner          = THIS_MODULE,
 945 };
 946
 947 static struct platform_device *lirc_serial_dev;
 948
 949 static int lirc_serial_suspend(struct platform_device *dev,
 950                                pm_message_t state)
 951 {
 952         /* Set DLAB 0. */
 953         soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB));
 954
 955         /* Disable all interrupts */
 956         soutp(UART_IER, sinp(UART_IER) &
 957               (~(UART_IER_MSI|UART_IER_RLSI|UART_IER_THRI|UART_IER_RDI)));
 958
 959         /* Clear registers. */
 960         sinp(UART_LSR);
 961         sinp(UART_RX);
 962         sinp(UART_IIR);
 963         sinp(UART_MSR);
 964
 965         return 0;
 966 }
 967
 968 /* twisty maze... need a forward-declaration here... */
 969 static void lirc_serial_exit(void);
 970
 971 static int lirc_serial_resume(struct platform_device *dev)
 972 {
 973         unsigned long flags;
 974         int result;
 975
 976         result = hardware_init_port();
 977         if (result < 0)
 978                 return result;
 979
 980         spin_lock_irqsave(&hardware[type].lock, flags);
 981         /* Enable Interrupt */
 982         do_gettimeofday(&lasttv);
 983         soutp(UART_IER, sinp(UART_IER)|UART_IER_MSI);
 984         off();
 985
 986         lirc_buffer_clear(&rbuf);
 987
 988         spin_unlock_irqrestore(&hardware[type].lock, flags);
 989
 990         return 0;
 991 }
 992
 993 static struct platform_driver lirc_serial_driver = {
 994         .probe          = lirc_serial_probe,
 995         .suspend        = lirc_serial_suspend,
 996         .resume         = lirc_serial_resume,
 997         .driver         = {
 998                 .name   = "lirc_serial",
 999         },
1000 };
1001
1002 static int __init lirc_serial_init(void)
1003 {
1004         int result;
1005
1006         /* Init read buffer. */
1007         result = lirc_buffer_init(&rbuf, sizeof(int), RBUF_LEN);
1008         if (result < 0)
1009                 return result;
1010
1011         result = platform_driver_register(&lirc_serial_driver);
1012         if (result) {
1013                 printk("lirc register returned %d\n", result);
1014                 goto exit_buffer_free;
1015         }
1016
1017         lirc_serial_dev = platform_device_alloc("lirc_serial", 0);
1018         if (!lirc_serial_dev) {
1019                 result = -ENOMEM;
1020                 goto exit_driver_unregister;
1021         }
1022
1023         result = platform_device_add(lirc_serial_dev);
1024         if (result)
1025                 goto exit_device_put;
1026
1027         return 0;
1028
1029 exit_device_put:
1030         platform_device_put(lirc_serial_dev);
1031 exit_driver_unregister:
1032         platform_driver_unregister(&lirc_serial_driver);
1033 exit_buffer_free:
1034         lirc_buffer_free(&rbuf);
1035         return result;
1036 }
1037
1038 static void lirc_serial_exit(void)
1039 {
1040         platform_device_unregister(lirc_serial_dev);
1041         platform_driver_unregister(&lirc_serial_driver);
1042         lirc_buffer_free(&rbuf);
1043 }
1044
1045 static int __init lirc_serial_init_module(void)
1046 {
1047         int result;
1048
1049         switch (type) {
1050         case LIRC_HOMEBREW:
1051         case LIRC_IRDEO:
1052         case LIRC_IRDEO_REMOTE:
1053         case LIRC_ANIMAX:
1054         case LIRC_IGOR:
1055                 /* if nothing specified, use ttyS0/com1 and irq 4 */
1056                 io = io ? io : 0x3f8;
1057                 irq = irq ? irq : 4;
1058                 break;
1059         default:
1060                 return -EINVAL;
1061         }
1062         if (!softcarrier) {
1063                 switch (type) {
1064                 case LIRC_HOMEBREW:
1065                 case LIRC_IGOR:
1066                         hardware[type].features &=
1067                                 ~(LIRC_CAN_SET_SEND_DUTY_CYCLE|
1068                                   LIRC_CAN_SET_SEND_CARRIER);
1069                         break;
1070                 }
1071         }
1072
1073         /* make sure sense is either -1, 0, or 1 */
1074         if (sense != -1)
1075                 sense = !!sense;
1076
1077         result = lirc_serial_init();
1078         if (result)
1079                 return result;
1080
1081         driver.features = hardware[type].features;
1082         driver.dev = &lirc_serial_dev->dev;
1083         driver.minor = lirc_register_driver(&driver);
1084         if (driver.minor < 0) {
1085                 pr_err("register_chrdev failed!\n");
1086                 lirc_serial_exit();
1087                 return driver.minor;
1088         }
1089         return 0;
1090 }
1091
1092 static void __exit lirc_serial_exit_module(void)
1093 {
1094         lirc_unregister_driver(driver.minor);
1095         lirc_serial_exit();
1096         pr_debug("cleaned up module\n");
1097 }
1098
1099
1100 module_init(lirc_serial_init_module);
1101 module_exit(lirc_serial_exit_module);
1102
1103 MODULE_DESCRIPTION("Infra-red receiver driver for serial ports.");
1104 MODULE_AUTHOR("Ralph Metzler, Trent Piepho, Ben Pfaff, "
1105               "Christoph Bartelmus, Andrei Tanas");
1106 MODULE_LICENSE("GPL");
1107
1108 module_param(type, int, S_IRUGO);
1109 MODULE_PARM_DESC(type, "Hardware type (0 = home-brew, 1 = IRdeo,"
1110                  " 2 = IRdeo Remote, 3 = AnimaX, 4 = IgorPlug,"
1111                  " 5 = NSLU2 RX:CTS2/TX:GreenLED)");
1112
1113 module_param(io, int, S_IRUGO);
1114 MODULE_PARM_DESC(io, "I/O address base (0x3f8 or 0x2f8)");
1115
1116 /* some architectures (e.g. intel xscale) have memory mapped registers */
1117 module_param(iommap, bool, S_IRUGO);
1118 MODULE_PARM_DESC(iommap, "physical base for memory mapped I/O"
1119                 " (0 = no memory mapped io)");
1120
1121 /*
1122  * some architectures (e.g. intel xscale) align the 8bit serial registers
1123  * on 32bit word boundaries.
1124  * See linux-kernel/drivers/tty/serial/8250/8250.c serial_in()/out()
1125  */
1126 module_param(ioshift, int, S_IRUGO);
1127 MODULE_PARM_DESC(ioshift, "shift I/O register offset (0 = no shift)");
1128
1129 module_param(irq, int, S_IRUGO);
1130 MODULE_PARM_DESC(irq, "Interrupt (4 or 3)");
1131
1132 module_param(share_irq, bool, S_IRUGO);
1133 MODULE_PARM_DESC(share_irq, "Share interrupts (0 = off, 1 = on)");
1134
1135 module_param(sense, int, S_IRUGO);
1136 MODULE_PARM_DESC(sense, "Override autodetection of IR receiver circuit"
1137                  " (0 = active high, 1 = active low )");
1138
1139 #ifdef CONFIG_LIRC_SERIAL_TRANSMITTER
1140 module_param(txsense, bool, S_IRUGO);
1141 MODULE_PARM_DESC(txsense, "Sense of transmitter circuit"
1142                  " (0 = active high, 1 = active low )");
1143 #endif
1144
1145 module_param(softcarrier, bool, S_IRUGO);
1146 MODULE_PARM_DESC(softcarrier, "Software carrier (0 = off, 1 = on, default on)");