drivers/staging/media/lirc/lirc_serial.c

   1 /*
   2  * lirc_serial.c
   3  *
   4  * lirc_serial - Device driver that records pulse- and pause-lengths
   5  *             (space-lengths) between DDCD event on a serial port.
   6  *
   7  * Copyright (C) 1996,97 Ralph Metzler <rjkm@thp.uni-koeln.de>
   8  * Copyright (C) 1998 Trent Piepho <xyzzy@u.washington.edu>
   9  * Copyright (C) 1998 Ben Pfaff <blp@gnu.org>
  10  * Copyright (C) 1999 Christoph Bartelmus <lirc@bartelmus.de>
  11  * Copyright (C) 2007 Andrei Tanas <andrei@tanas.ca> (suspend/resume support)
  12  *  This program is free software; you can redistribute it and/or modify
  13  *  it under the terms of the GNU General Public License as published by
  14  *  the Free Software Foundation; either version 2 of the License, or
  15  *  (at your option) any later version.
  16  *
  17  *  This program is distributed in the hope that it will be useful,
  18  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  19  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  20  *  GNU General Public License for more details.
  21  *
  22  *  You should have received a copy of the GNU General Public License
  23  *  along with this program; if not, write to the Free Software
  24  *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  25  *
  26  */
  27
  28 /*
  29  * Steve's changes to improve transmission fidelity:
  30  *   - for systems with the rdtsc instruction and the clock counter, a
  31  *     send_pule that times the pulses directly using the counter.
  32  *     This means that the LIRC_SERIAL_TRANSMITTER_LATENCY fudge is
  33  *     not needed. Measurement shows very stable waveform, even where
  34  *     PCI activity slows the access to the UART, which trips up other
  35  *     versions.
  36  *   - For other system, non-integer-microsecond pulse/space lengths,
  37  *     done using fixed point binary. So, much more accurate carrier
  38  *     frequency.
  39  *   - fine tuned transmitter latency, taking advantage of fractional
  40  *     microseconds in previous change
  41  *   - Fixed bug in the way transmitter latency was accounted for by
  42  *     tuning the pulse lengths down - the send_pulse routine ignored
  43  *     this overhead as it timed the overall pulse length - so the
  44  *     pulse frequency was right but overall pulse length was too
  45  *     long. Fixed by accounting for latency on each pulse/space
  46  *     iteration.
  47  *
  48  * Steve Davies <steve@daviesfam.org>  July 2001
  49  */
  50
  51 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  52
  53 #include <linux/module.h>
  54 #include <linux/errno.h>
  55 #include <linux/signal.h>
  56 #include <linux/sched.h>
  57 #include <linux/fs.h>
  58 #include <linux/interrupt.h>
  59 #include <linux/ioport.h>
  60 #include <linux/kernel.h>
  61 #include <linux/serial_reg.h>
  62 #include <linux/time.h>
  63 #include <linux/string.h>
  64 #include <linux/types.h>
  65 #include <linux/wait.h>
  66 #include <linux/mm.h>
  67 #include <linux/delay.h>
  68 #include <linux/poll.h>
  69 #include <linux/platform_device.h>
  70 #include <linux/gpio.h>
  71 #include <linux/io.h>
  72 #include <linux/irq.h>
  73 #include <linux/fcntl.h>
  74 #include <linux/spinlock.h>
  75
  76 /* From Intel IXP42X Developer's Manual (#252480-005): */
  77 /* ftp://download.intel.com/design/network/manuals/25248005.pdf */
  78 #define UART_IE_IXP42X_UUE   0x40 /* IXP42X UART Unit enable */
  79 #define UART_IE_IXP42X_RTOIE 0x10 /* IXP42X Receiver Data Timeout int.enable */
  80
  81 #include <media/lirc.h>
  82 #include <media/lirc_dev.h>
  83
  84 #define LIRC_DRIVER_NAME "lirc_serial"
  85
  86 struct lirc_serial {
  87         int signal_pin;
  88         int signal_pin_change;
  89         u8 on;
  90         u8 off;
  91         long (*send_pulse)(unsigned long length);
  92         void (*send_space)(long length);
  93         int features;
  94         spinlock_t lock;
  95 };
  96
  97 #define LIRC_HOMEBREW           0
  98 #define LIRC_IRDEO              1
  99 #define LIRC_IRDEO_REMOTE       2
 100 #define LIRC_ANIMAX             3
 101 #define LIRC_IGOR               4
 102 #define LIRC_NSLU2              5
 103
 104 /*** module parameters ***/
 105 static int type;
 106 static int io;
 107 static int irq;
 108 static bool iommap;
 109 static int ioshift;
 110 static bool softcarrier = true;
 111 static bool share_irq;
 112 static bool debug;
 113 static int sense = -1;  /* -1 = auto, 0 = active high, 1 = active low */
 114 static bool txsense;    /* 0 = active high, 1 = active low */
 115
 116 #define dprintk(fmt, args...)                                   \
 117         do {                                                    \
 118                 if (debug)                                      \
 119                         printk(KERN_DEBUG LIRC_DRIVER_NAME ": " \
 120                                fmt, ## args);                   \
 121         } while (0)
 122
 123 /* forward declarations */
 124 static long send_pulse_irdeo(unsigned long length);
 125 static long send_pulse_homebrew(unsigned long length);
 126 static void send_space_irdeo(long length);
 127 static void send_space_homebrew(long length);
 128
 129 static struct lirc_serial hardware[] = {
 130         [LIRC_HOMEBREW] = {
 131                 .lock = __SPIN_LOCK_UNLOCKED(hardware[LIRC_HOMEBREW].lock),
 132                 .signal_pin        = UART_MSR_DCD,
 133                 .signal_pin_change = UART_MSR_DDCD,
 134                 .on  = (UART_MCR_RTS | UART_MCR_OUT2 | UART_MCR_DTR),
 135                 .off = (UART_MCR_RTS | UART_MCR_OUT2),
 136                 .send_pulse = send_pulse_homebrew,
 137                 .send_space = send_space_homebrew,
 138 #ifdef CONFIG_LIRC_SERIAL_TRANSMITTER
 139                 .features    = (LIRC_CAN_SET_SEND_DUTY_CYCLE |
 140                                 LIRC_CAN_SET_SEND_CARRIER |
 141                                 LIRC_CAN_SEND_PULSE | LIRC_CAN_REC_MODE2)
 142 #else
 143                 .features    = LIRC_CAN_REC_MODE2
 144 #endif
 145         },
 146
 147         [LIRC_IRDEO] = {
 148                 .lock = __SPIN_LOCK_UNLOCKED(hardware[LIRC_IRDEO].lock),
 149                 .signal_pin        = UART_MSR_DSR,
 150                 .signal_pin_change = UART_MSR_DDSR,
 151                 .on  = UART_MCR_OUT2,
 152                 .off = (UART_MCR_RTS | UART_MCR_DTR | UART_MCR_OUT2),
 153                 .send_pulse  = send_pulse_irdeo,
 154                 .send_space  = send_space_irdeo,
 155                 .features    = (LIRC_CAN_SET_SEND_DUTY_CYCLE |
 156                                 LIRC_CAN_SEND_PULSE | LIRC_CAN_REC_MODE2)
 157         },
 158
 159         [LIRC_IRDEO_REMOTE] = {
 160                 .lock = __SPIN_LOCK_UNLOCKED(hardware[LIRC_IRDEO_REMOTE].lock),
 161                 .signal_pin        = UART_MSR_DSR,
 162                 .signal_pin_change = UART_MSR_DDSR,
 163                 .on  = (UART_MCR_RTS | UART_MCR_DTR | UART_MCR_OUT2),
 164                 .off = (UART_MCR_RTS | UART_MCR_DTR | UART_MCR_OUT2),
 165                 .send_pulse  = send_pulse_irdeo,
 166                 .send_space  = send_space_irdeo,
 167                 .features    = (LIRC_CAN_SET_SEND_DUTY_CYCLE |
 168                                 LIRC_CAN_SEND_PULSE | LIRC_CAN_REC_MODE2)
 169         },
 170
 171         [LIRC_ANIMAX] = {
 172                 .lock = __SPIN_LOCK_UNLOCKED(hardware[LIRC_ANIMAX].lock),
 173                 .signal_pin        = UART_MSR_DCD,
 174                 .signal_pin_change = UART_MSR_DDCD,
 175                 .on  = 0,
 176                 .off = (UART_MCR_RTS | UART_MCR_DTR | UART_MCR_OUT2),
 177                 .send_pulse = NULL,
 178                 .send_space = NULL,
 179                 .features   = LIRC_CAN_REC_MODE2
 180         },
 181
 182         [LIRC_IGOR] = {
 183                 .lock = __SPIN_LOCK_UNLOCKED(hardware[LIRC_IGOR].lock),
 184                 .signal_pin        = UART_MSR_DSR,
 185                 .signal_pin_change = UART_MSR_DDSR,
 186                 .on  = (UART_MCR_RTS | UART_MCR_OUT2 | UART_MCR_DTR),
 187                 .off = (UART_MCR_RTS | UART_MCR_OUT2),
 188                 .send_pulse = send_pulse_homebrew,
 189                 .send_space = send_space_homebrew,
 190 #ifdef CONFIG_LIRC_SERIAL_TRANSMITTER
 191                 .features    = (LIRC_CAN_SET_SEND_DUTY_CYCLE |
 192                                 LIRC_CAN_SET_SEND_CARRIER |
 193                                 LIRC_CAN_SEND_PULSE | LIRC_CAN_REC_MODE2)
 194 #else
 195                 .features    = LIRC_CAN_REC_MODE2
 196 #endif
 197         },
 198 };
 199
 200 #define RS_ISR_PASS_LIMIT 256
 201
 202 /*
 203  * A long pulse code from a remote might take up to 300 bytes.  The
 204  * daemon should read the bytes as soon as they are generated, so take
 205  * the number of keys you think you can push before the daemon runs
 206  * and multiply by 300.  The driver will warn you if you overrun this
 207  * buffer.  If you have a slow computer or non-busmastering IDE disks,
 208  * maybe you will need to increase this.
 209  */
 210
 211 /* This MUST be a power of two!  It has to be larger than 1 as well. */
 212
 213 #define RBUF_LEN 256
 214
 215 static struct timeval lasttv = {0, 0};
 216
 217 static struct lirc_buffer rbuf;
 218
 219 static unsigned int freq = 38000;
 220 static unsigned int duty_cycle = 50;
 221
 222 /* Initialized in init_timing_params() */
 223 static unsigned long period;
 224 static unsigned long pulse_width;
 225 static unsigned long space_width;
 226
 227 #if defined(__i386__)
 228 /*
 229  * From:
 230  * Linux I/O port programming mini-HOWTO
 231  * Author: Riku Saikkonen <Riku.Saikkonen@hut.fi>
 232  * v, 28 December 1997
 233  *
 234  * [...]
 235  * Actually, a port I/O instruction on most ports in the 0-0x3ff range
 236  * takes almost exactly 1 microsecond, so if you're, for example, using
 237  * the parallel port directly, just do additional inb()s from that port
 238  * to delay.
 239  * [...]
 240  */
 241 /* transmitter latency 1.5625us 0x1.90 - this figure arrived at from
 242  * comment above plus trimming to match actual measured frequency.
 243  * This will be sensitive to cpu speed, though hopefully most of the 1.5us
 244  * is spent in the uart access.  Still - for reference test machine was a
 245  * 1.13GHz Athlon system - Steve
 246  */
 247
 248 /*
 249  * changed from 400 to 450 as this works better on slower machines;
 250  * faster machines will use the rdtsc code anyway
 251  */
 252 #define LIRC_SERIAL_TRANSMITTER_LATENCY 450
 253
 254 #else
 255
 256 /* does anybody have information on other platforms ? */
 257 /* 256 = 1<<8 */
 258 #define LIRC_SERIAL_TRANSMITTER_LATENCY 256
 259
 260 #endif  /* __i386__ */
 261 /*
 262  * FIXME: should we be using hrtimers instead of this
 263  * LIRC_SERIAL_TRANSMITTER_LATENCY nonsense?
 264  */
 265
 266 /* fetch serial input packet (1 byte) from register offset */
 267 static u8 sinp(int offset)
 268 {
 269         if (iommap)
 270                 /* the register is memory-mapped */
 271                 offset <<= ioshift;
 272
 273         return inb(io + offset);
 274 }
 275
 276 /* write serial output packet (1 byte) of value to register offset */
 277 static void soutp(int offset, u8 value)
 278 {
 279         if (iommap)
 280                 /* the register is memory-mapped */
 281                 offset <<= ioshift;
 282
 283         outb(value, io + offset);
 284 }
 285
 286 static void on(void)
 287 {
 288         if (txsense)
 289                 soutp(UART_MCR, hardware[type].off);
 290         else
 291                 soutp(UART_MCR, hardware[type].on);
 292 }
 293
 294 static void off(void)
 295 {
 296         if (txsense)
 297                 soutp(UART_MCR, hardware[type].on);
 298         else
 299                 soutp(UART_MCR, hardware[type].off);
 300 }
 301
 302 #ifndef MAX_UDELAY_MS
 303 #define MAX_UDELAY_US 5000
 304 #else
 305 #define MAX_UDELAY_US (MAX_UDELAY_MS*1000)
 306 #endif
 307
 308 static void safe_udelay(unsigned long usecs)
 309 {
 310         while (usecs > MAX_UDELAY_US) {
 311                 udelay(MAX_UDELAY_US);
 312                 usecs -= MAX_UDELAY_US;
 313         }
 314         udelay(usecs);
 315 }
 316
 317 #ifdef USE_RDTSC
 318 /*
 319  * This is an overflow/precision juggle, complicated in that we can't
 320  * do long long divide in the kernel
 321  */
 322
 323 /*
 324  * When we use the rdtsc instruction to measure clocks, we keep the
 325  * pulse and space widths as clock cycles.  As this is CPU speed
 326  * dependent, the widths must be calculated in init_port and ioctl
 327  * time
 328  */
 329
 330 static int init_timing_params(unsigned int new_duty_cycle,
 331                 unsigned int new_freq)
 332 {
 333         __u64 loops_per_sec, work;
 334
 335         duty_cycle = new_duty_cycle;
 336         freq = new_freq;
 337
 338         loops_per_sec = __this_cpu_read(cpu.info.loops_per_jiffy);
 339         loops_per_sec *= HZ;
 340
 341         /* How many clocks in a microsecond?, avoiding long long divide */
 342         work = loops_per_sec;
 343         work *= 4295;  /* 4295 = 2^32 / 1e6 */
 344
 345         /*
 346          * Carrier period in clocks, approach good up to 32GHz clock,
 347          * gets carrier frequency within 8Hz
 348          */
 349         period = loops_per_sec >> 3;
 350         period /= (freq >> 3);
 351
 352         /* Derive pulse and space from the period */
 353         pulse_width = period * duty_cycle / 100;
 354         space_width = period - pulse_width;
 355         dprintk("in init_timing_params, freq=%d, duty_cycle=%d, "
 356                 "clk/jiffy=%ld, pulse=%ld, space=%ld\n",
 357                 freq, duty_cycle, __this_cpu_read(cpu_info.loops_per_jiffy),
 358                 pulse_width, space_width);
 359         return 0;
 360 }
 361 #else /* ! USE_RDTSC */
 362 static int init_timing_params(unsigned int new_duty_cycle,
 363                 unsigned int new_freq)
 364 {
 365 /*
 366  * period, pulse/space width are kept with 8 binary places -
 367  * IE multiplied by 256.
 368  */
 369         if (256 * 1000000L / new_freq * new_duty_cycle / 100 <=
 370             LIRC_SERIAL_TRANSMITTER_LATENCY)
 371                 return -EINVAL;
 372         if (256 * 1000000L / new_freq * (100 - new_duty_cycle) / 100 <=
 373             LIRC_SERIAL_TRANSMITTER_LATENCY)
 374                 return -EINVAL;
 375         duty_cycle = new_duty_cycle;
 376         freq = new_freq;
 377         period = 256 * 1000000L / freq;
 378         pulse_width = period * duty_cycle / 100;
 379         space_width = period - pulse_width;
 380         dprintk("in init_timing_params, freq=%d pulse=%ld, space=%ld\n",
 381                 freq, pulse_width, space_width);
 382         return 0;
 383 }
 384 #endif /* USE_RDTSC */
 385
 386
 387 /* return value: space length delta */
 388
 389 static long send_pulse_irdeo(unsigned long length)
 390 {
 391         long rawbits, ret;
 392         int i;
 393         unsigned char output;
 394         unsigned char chunk, shifted;
 395
 396         /* how many bits have to be sent ? */
 397         rawbits = length * 1152 / 10000;
 398         if (duty_cycle > 50)
 399                 chunk = 3;
 400         else
 401                 chunk = 1;
 402         for (i = 0, output = 0x7f; rawbits > 0; rawbits -= 3) {
 403                 shifted = chunk << (i * 3);
 404                 shifted >>= 1;
 405                 output &= (~shifted);
 406                 i++;
 407                 if (i == 3) {
 408                         soutp(UART_TX, output);
 409                         while (!(sinp(UART_LSR) & UART_LSR_THRE))
 410                                 ;
 411                         output = 0x7f;
 412                         i = 0;
 413                 }
 414         }
 415         if (i != 0) {
 416                 soutp(UART_TX, output);
 417                 while (!(sinp(UART_LSR) & UART_LSR_TEMT))
 418                         ;
 419         }
 420
 421         if (i == 0)
 422                 ret = (-rawbits) * 10000 / 1152;
 423         else
 424                 ret = (3 - i) * 3 * 10000 / 1152 + (-rawbits) * 10000 / 1152;
 425
 426         return ret;
 427 }
 428
 429 /* Version using udelay() */
 430
 431 /*
 432  * here we use fixed point arithmetic, with 8
 433  * fractional bits.  that gets us within 0.1% or so of the right average
 434  * frequency, albeit with some jitter in pulse length - Steve
 435  *
 436  * This should use ndelay instead.
 437  */
 438
 439 /* To match 8 fractional bits used for pulse/space length */
 440
 441 static long send_pulse_homebrew_softcarrier(unsigned long length)
 442 {
 443         int flag;
 444         unsigned long actual, target, d;
 445
 446         length <<= 8;
 447
 448         actual = 0; target = 0; flag = 0;
 449         while (actual < length) {
 450                 if (flag) {
 451                         off();
 452                         target += space_width;
 453                 } else {
 454                         on();
 455                         target += pulse_width;
 456                 }
 457                 d = (target - actual -
 458                      LIRC_SERIAL_TRANSMITTER_LATENCY + 128) >> 8;
 459                 /*
 460                  * Note - we've checked in ioctl that the pulse/space
 461                  * widths are big enough so that d is > 0
 462                  */
 463                 udelay(d);
 464                 actual += (d << 8) + LIRC_SERIAL_TRANSMITTER_LATENCY;
 465                 flag = !flag;
 466         }
 467         return (actual-length) >> 8;
 468 }
 469
 470 static long send_pulse_homebrew(unsigned long length)
 471 {
 472         if (length <= 0)
 473                 return 0;
 474
 475         if (softcarrier)
 476                 return send_pulse_homebrew_softcarrier(length);
 477
 478         on();
 479         safe_udelay(length);
 480         return 0;
 481 }
 482
 483 static void send_space_irdeo(long length)
 484 {
 485         if (length <= 0)
 486                 return;
 487
 488         safe_udelay(length);
 489 }
 490
 491 static void send_space_homebrew(long length)
 492 {
 493         off();
 494         if (length <= 0)
 495                 return;
 496         safe_udelay(length);
 497 }
 498
 499 static void rbwrite(int l)
 500 {
 501         if (lirc_buffer_full(&rbuf)) {
 502                 /* no new signals will be accepted */
 503                 dprintk("Buffer overrun\n");
 504                 return;
 505         }
 506         lirc_buffer_write(&rbuf, (void *)&l);
 507 }
 508
 509 static void frbwrite(int l)
 510 {
 511         /* simple noise filter */
 512         static int pulse, space;
 513         static unsigned int ptr;
 514
 515         if (ptr > 0 && (l & PULSE_BIT)) {
 516                 pulse += l & PULSE_MASK;
 517                 if (pulse > 250) {
 518                         rbwrite(space);
 519                         rbwrite(pulse | PULSE_BIT);
 520                         ptr = 0;
 521                         pulse = 0;
 522                 }
 523                 return;
 524         }
 525         if (!(l & PULSE_BIT)) {
 526                 if (ptr == 0) {
 527                         if (l > 20000) {
 528                                 space = l;
 529                                 ptr++;
 530                                 return;
 531                         }
 532                 } else {
 533                         if (l > 20000) {
 534                                 space += pulse;
 535                                 if (space > PULSE_MASK)
 536                                         space = PULSE_MASK;
 537                                 space += l;
 538                                 if (space > PULSE_MASK)
 539                                         space = PULSE_MASK;
 540                                 pulse = 0;
 541                                 return;
 542                         }
 543                         rbwrite(space);
 544                         rbwrite(pulse | PULSE_BIT);
 545                         ptr = 0;
 546                         pulse = 0;
 547                 }
 548         }
 549         rbwrite(l);
 550 }
 551
 552 static irqreturn_t lirc_irq_handler(int i, void *blah)
 553 {
 554         struct timeval tv;
 555         int counter, dcd;
 556         u8 status;
 557         long deltv;
 558         int data;
 559         static int last_dcd = -1;
 560
 561         if ((sinp(UART_IIR) & UART_IIR_NO_INT)) {
 562                 /* not our interrupt */
 563                 return IRQ_NONE;
 564         }
 565
 566         counter = 0;
 567         do {
 568                 counter++;
 569                 status = sinp(UART_MSR);
 570                 if (counter > RS_ISR_PASS_LIMIT) {
 571                         pr_warn("AIEEEE: We're caught!\n");
 572                         break;
 573                 }
 574                 if ((status & hardware[type].signal_pin_change)
 575                     && sense != -1) {
 576                         /* get current time */
 577                         do_gettimeofday(&tv);
 578
 579                         /* New mode, written by Trent Piepho
 580                            <xyzzy@u.washington.edu>. */
 581
 582                         /*
 583                          * The old format was not very portable.
 584                          * We now use an int to pass pulses
 585                          * and spaces to user space.
 586                          *
 587                          * If PULSE_BIT is set a pulse has been
 588                          * received, otherwise a space has been
 589                          * received.  The driver needs to know if your
 590                          * receiver is active high or active low, or
 591                          * the space/pulse sense could be
 592                          * inverted. The bits denoted by PULSE_MASK are
 593                          * the length in microseconds. Lengths greater
 594                          * than or equal to 16 seconds are clamped to
 595                          * PULSE_MASK.  All other bits are unused.
 596                          * This is a much simpler interface for user
 597                          * programs, as well as eliminating "out of
 598                          * phase" errors with space/pulse
 599                          * autodetection.
 600                          */
 601
 602                         /* calc time since last interrupt in microseconds */
 603                         dcd = (status & hardware[type].signal_pin) ? 1 : 0;
 604
 605                         if (dcd == last_dcd) {
 606                                 pr_warn("ignoring spike: %d %d %lx %lx %lx %lx\n",
 607                                         dcd, sense,
 608                                         tv.tv_sec, lasttv.tv_sec,
 609                                         (unsigned long)tv.tv_usec,
 610                                         (unsigned long)lasttv.tv_usec);
 611                                 continue;
 612                         }
 613
 614                         deltv = tv.tv_sec-lasttv.tv_sec;
 615                         if (tv.tv_sec < lasttv.tv_sec ||
 616                             (tv.tv_sec == lasttv.tv_sec &&
 617                              tv.tv_usec < lasttv.tv_usec)) {
 618                                 pr_warn("AIEEEE: your clock just jumped backwards\n");
 619                                 pr_warn("%d %d %lx %lx %lx %lx\n",
 620                                         dcd, sense,
 621                                         tv.tv_sec, lasttv.tv_sec,
 622                                         (unsigned long)tv.tv_usec,
 623                                         (unsigned long)lasttv.tv_usec);
 624                                 data = PULSE_MASK;
 625                         } else if (deltv > 15) {
 626                                 data = PULSE_MASK; /* really long time */
 627                                 if (!(dcd^sense)) {
 628                                         /* sanity check */
 629                                         pr_warn("AIEEEE: %d %d %lx %lx %lx %lx\n",
 630                                                 dcd, sense,
 631                                                 tv.tv_sec, lasttv.tv_sec,
 632                                                 (unsigned long)tv.tv_usec,
 633                                                 (unsigned long)lasttv.tv_usec);
 634                                         /*
 635                                          * detecting pulse while this
 636                                          * MUST be a space!
 637                                          */
 638                                         sense = sense ? 0 : 1;
 639                                 }
 640                         } else
 641                                 data = (int) (deltv*1000000 +
 642                                                tv.tv_usec -
 643                                                lasttv.tv_usec);
 644                         frbwrite(dcd^sense ? data : (data|PULSE_BIT));
 645                         lasttv = tv;
 646                         last_dcd = dcd;
 647                         wake_up_interruptible(&rbuf.wait_poll);
 648                 }
 649         } while (!(sinp(UART_IIR) & UART_IIR_NO_INT)); /* still pending ? */
 650         return IRQ_HANDLED;
 651 }
 652
 653
 654 static int hardware_init_port(void)
 655 {
 656         u8 scratch, scratch2, scratch3;
 657
 658         /*
 659          * This is a simple port existence test, borrowed from the autoconfig
 660          * function in drivers/serial/8250.c
 661          */
 662         scratch = sinp(UART_IER);
 663         soutp(UART_IER, 0);
 664 #ifdef __i386__
 665         outb(0xff, 0x080);
 666 #endif
 667         scratch2 = sinp(UART_IER) & 0x0f;
 668         soutp(UART_IER, 0x0f);
 669 #ifdef __i386__
 670         outb(0x00, 0x080);
 671 #endif
 672         scratch3 = sinp(UART_IER) & 0x0f;
 673         soutp(UART_IER, scratch);
 674         if (scratch2 != 0 || scratch3 != 0x0f) {
 675                 /* we fail, there's nothing here */
 676                 pr_err("port existence test failed, cannot continue\n");
 677                 return -ENODEV;
 678         }
 679
 680
 681
 682         /* Set DLAB 0. */
 683         soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB));
 684
 685         /* First of all, disable all interrupts */
 686         soutp(UART_IER, sinp(UART_IER) &
 687               (~(UART_IER_MSI|UART_IER_RLSI|UART_IER_THRI|UART_IER_RDI)));
 688
 689         /* Clear registers. */
 690         sinp(UART_LSR);
 691         sinp(UART_RX);
 692         sinp(UART_IIR);
 693         sinp(UART_MSR);
 694
 695         /* Set line for power source */
 696         off();
 697
 698         /* Clear registers again to be sure. */
 699         sinp(UART_LSR);
 700         sinp(UART_RX);
 701         sinp(UART_IIR);
 702         sinp(UART_MSR);
 703
 704         switch (type) {
 705         case LIRC_IRDEO:
 706         case LIRC_IRDEO_REMOTE:
 707                 /* setup port to 7N1 @ 115200 Baud */
 708                 /* 7N1+start = 9 bits at 115200 ~ 3 bits at 38kHz */
 709
 710                 /* Set DLAB 1. */
 711                 soutp(UART_LCR, sinp(UART_LCR) | UART_LCR_DLAB);
 712                 /* Set divisor to 1 => 115200 Baud */
 713                 soutp(UART_DLM, 0);
 714                 soutp(UART_DLL, 1);
 715                 /* Set DLAB 0 +  7N1 */
 716                 soutp(UART_LCR, UART_LCR_WLEN7);
 717                 /* THR interrupt already disabled at this point */
 718                 break;
 719         default:
 720                 break;
 721         }
 722
 723         return 0;
 724 }
 725
 726 static int lirc_serial_probe(struct platform_device *dev)
 727 {
 728         int i, nlow, nhigh, result;
 729
 730         result = devm_request_irq(&dev->dev, irq, lirc_irq_handler,
 731                              (share_irq ? IRQF_SHARED : 0),
 732                              LIRC_DRIVER_NAME, &hardware);
 733         if (result < 0) {
 734                 if (result == -EBUSY)
 735                         dev_err(&dev->dev, "IRQ %d busy\n", irq);
 736                 else if (result == -EINVAL)
 737                         dev_err(&dev->dev, "Bad irq number or handler\n");
 738                 return result;
 739         }
 740
 741         /* Reserve io region. */
 742         /*
 743          * Future MMAP-Developers: Attention!
 744          * For memory mapped I/O you *might* need to use ioremap() first,
 745          * for the NSLU2 it's done in boot code.
 746          */
 747         if (((iommap)
 748              && (devm_request_mem_region(&dev->dev, iommap, 8 << ioshift,
 749                                          LIRC_DRIVER_NAME) == NULL))
 750            || ((!iommap)
 751                && (devm_request_region(&dev->dev, io, 8,
 752                                        LIRC_DRIVER_NAME) == NULL))) {
 753                 dev_err(&dev->dev, "port %04x already in use\n", io);
 754                 dev_warn(&dev->dev, "use 'setserial /dev/ttySX uart none'\n");
 755                 dev_warn(&dev->dev,
 756                          "or compile the serial port driver as module and\n");
 757                 dev_warn(&dev->dev, "make sure this module is loaded first\n");
 758                 return -EBUSY;
 759         }
 760
 761         result = hardware_init_port();
 762         if (result < 0)
 763                 return result;
 764
 765         /* Initialize pulse/space widths */
 766         init_timing_params(duty_cycle, freq);
 767
 768         /* If pin is high, then this must be an active low receiver. */
 769         if (sense == -1) {
 770                 /* wait 1/2 sec for the power supply */
 771                 msleep(500);
 772
 773                 /*
 774                  * probe 9 times every 0.04s, collect "votes" for
 775                  * active high/low
 776                  */
 777                 nlow = 0;
 778                 nhigh = 0;
 779                 for (i = 0; i < 9; i++) {
 780                         if (sinp(UART_MSR) & hardware[type].signal_pin)
 781                                 nlow++;
 782                         else
 783                                 nhigh++;
 784                         msleep(40);
 785                 }
 786                 sense = nlow >= nhigh ? 1 : 0;
 787                 dev_info(&dev->dev, "auto-detected active %s receiver\n",
 788                          sense ? "low" : "high");
 789         } else
 790                 dev_info(&dev->dev, "Manually using active %s receiver\n",
 791                          sense ? "low" : "high");
 792
 793         dprintk("Interrupt %d, port %04x obtained\n", irq, io);
 794         return 0;
 795 }
 796
 797 static int set_use_inc(void *data)
 798 {
 799         unsigned long flags;
 800
 801         /* initialize timestamp */
 802         do_gettimeofday(&lasttv);
 803
 804         spin_lock_irqsave(&hardware[type].lock, flags);
 805
 806         /* Set DLAB 0. */
 807         soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB));
 808
 809         soutp(UART_IER, sinp(UART_IER)|UART_IER_MSI);
 810
 811         spin_unlock_irqrestore(&hardware[type].lock, flags);
 812
 813         return 0;
 814 }
 815
 816 static void set_use_dec(void *data)
 817 {       unsigned long flags;
 818
 819         spin_lock_irqsave(&hardware[type].lock, flags);
 820
 821         /* Set DLAB 0. */
 822         soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB));
 823
 824         /* First of all, disable all interrupts */
 825         soutp(UART_IER, sinp(UART_IER) &
 826               (~(UART_IER_MSI|UART_IER_RLSI|UART_IER_THRI|UART_IER_RDI)));
 827         spin_unlock_irqrestore(&hardware[type].lock, flags);
 828 }
 829
 830 static ssize_t lirc_write(struct file *file, const char __user *buf,
 831                          size_t n, loff_t *ppos)
 832 {
 833         int i, count;
 834         unsigned long flags;
 835         long delta = 0;
 836         int *wbuf;
 837
 838         if (!(hardware[type].features & LIRC_CAN_SEND_PULSE))
 839                 return -EPERM;
 840
 841         count = n / sizeof(int);
 842         if (n % sizeof(int) || count % 2 == 0)
 843                 return -EINVAL;
 844         wbuf = memdup_user(buf, n);
 845         if (IS_ERR(wbuf))
 846                 return PTR_ERR(wbuf);
 847         spin_lock_irqsave(&hardware[type].lock, flags);
 848         if (type == LIRC_IRDEO) {
 849                 /* DTR, RTS down */
 850                 on();
 851         }
 852         for (i = 0; i < count; i++) {
 853                 if (i%2)
 854                         hardware[type].send_space(wbuf[i] - delta);
 855                 else
 856                         delta = hardware[type].send_pulse(wbuf[i]);
 857         }
 858         off();
 859         spin_unlock_irqrestore(&hardware[type].lock, flags);
 860         kfree(wbuf);
 861         return n;
 862 }
 863
 864 static long lirc_ioctl(struct file *filep, unsigned int cmd, unsigned long arg)
 865 {
 866         int result;
 867         u32 __user *uptr = (u32 __user *)arg;
 868         u32 value;
 869
 870         switch (cmd) {
 871         case LIRC_GET_SEND_MODE:
 872                 if (!(hardware[type].features&LIRC_CAN_SEND_MASK))
 873                         return -ENOIOCTLCMD;
 874
 875                 result = put_user(LIRC_SEND2MODE
 876                                   (hardware[type].features&LIRC_CAN_SEND_MASK),
 877                                   uptr);
 878                 if (result)
 879                         return result;
 880                 break;
 881
 882         case LIRC_SET_SEND_MODE:
 883                 if (!(hardware[type].features&LIRC_CAN_SEND_MASK))
 884                         return -ENOIOCTLCMD;
 885
 886                 result = get_user(value, uptr);
 887                 if (result)
 888                         return result;
 889                 /* only LIRC_MODE_PULSE supported */
 890                 if (value != LIRC_MODE_PULSE)
 891                         return -EINVAL;
 892                 break;
 893
 894         case LIRC_GET_LENGTH:
 895                 return -ENOIOCTLCMD;
 896
 897         case LIRC_SET_SEND_DUTY_CYCLE:
 898                 dprintk("SET_SEND_DUTY_CYCLE\n");
 899                 if (!(hardware[type].features&LIRC_CAN_SET_SEND_DUTY_CYCLE))
 900                         return -ENOIOCTLCMD;
 901
 902                 result = get_user(value, uptr);
 903                 if (result)
 904                         return result;
 905                 if (value <= 0 || value > 100)
 906                         return -EINVAL;
 907                 return init_timing_params(value, freq);
 908
 909         case LIRC_SET_SEND_CARRIER:
 910                 dprintk("SET_SEND_CARRIER\n");
 911                 if (!(hardware[type].features&LIRC_CAN_SET_SEND_CARRIER))
 912                         return -ENOIOCTLCMD;
 913
 914                 result = get_user(value, uptr);
 915                 if (result)
 916                         return result;
 917                 if (value > 500000 || value < 20000)
 918                         return -EINVAL;
 919                 return init_timing_params(duty_cycle, value);
 920
 921         default:
 922                 return lirc_dev_fop_ioctl(filep, cmd, arg);
 923         }
 924         return 0;
 925 }
 926
 927 static const struct file_operations lirc_fops = {
 928         .owner          = THIS_MODULE,
 929         .write          = lirc_write,
 930         .unlocked_ioctl = lirc_ioctl,
 931 #ifdef CONFIG_COMPAT
 932         .compat_ioctl   = lirc_ioctl,
 933 #endif
 934         .read           = lirc_dev_fop_read,
 935         .poll           = lirc_dev_fop_poll,
 936         .open           = lirc_dev_fop_open,
 937         .release        = lirc_dev_fop_close,
 938         .llseek         = no_llseek,
 939 };
 940
 941 static struct lirc_driver driver = {
 942         .name           = LIRC_DRIVER_NAME,
 943         .minor          = -1,
 944         .code_length    = 1,
 945         .sample_rate    = 0,
 946         .data           = NULL,
 947         .add_to_buf     = NULL,
 948         .rbuf           = &rbuf,
 949         .set_use_inc    = set_use_inc,
 950         .set_use_dec    = set_use_dec,
 951         .fops           = &lirc_fops,
 952         .dev            = NULL,
 953         .owner          = THIS_MODULE,
 954 };
 955
 956 static struct platform_device *lirc_serial_dev;
 957
 958 static int lirc_serial_suspend(struct platform_device *dev,
 959                                pm_message_t state)
 960 {
 961         /* Set DLAB 0. */
 962         soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB));
 963
 964         /* Disable all interrupts */
 965         soutp(UART_IER, sinp(UART_IER) &
 966               (~(UART_IER_MSI|UART_IER_RLSI|UART_IER_THRI|UART_IER_RDI)));
 967
 968         /* Clear registers. */
 969         sinp(UART_LSR);
 970         sinp(UART_RX);
 971         sinp(UART_IIR);
 972         sinp(UART_MSR);
 973
 974         return 0;
 975 }
 976
 977 /* twisty maze... need a forward-declaration here... */
 978 static void lirc_serial_exit(void);
 979
 980 static int lirc_serial_resume(struct platform_device *dev)
 981 {
 982         unsigned long flags;
 983         int result;
 984
 985         result = hardware_init_port();
 986         if (result < 0)
 987                 return result;
 988
 989         spin_lock_irqsave(&hardware[type].lock, flags);
 990         /* Enable Interrupt */
 991         do_gettimeofday(&lasttv);
 992         soutp(UART_IER, sinp(UART_IER)|UART_IER_MSI);
 993         off();
 994
 995         lirc_buffer_clear(&rbuf);
 996
 997         spin_unlock_irqrestore(&hardware[type].lock, flags);
 998
 999         return 0;
1000 }
1001
1002 static struct platform_driver lirc_serial_driver = {
1003         .probe          = lirc_serial_probe,
1004         .suspend        = lirc_serial_suspend,
1005         .resume         = lirc_serial_resume,
1006         .driver         = {
1007                 .name   = "lirc_serial",
1008         },
1009 };
1010
1011 static int __init lirc_serial_init(void)
1012 {
1013         int result;
1014
1015         /* Init read buffer. */
1016         result = lirc_buffer_init(&rbuf, sizeof(int), RBUF_LEN);
1017         if (result < 0)
1018                 return result;
1019
1020         result = platform_driver_register(&lirc_serial_driver);
1021         if (result) {
1022                 printk("lirc register returned %d\n", result);
1023                 goto exit_buffer_free;
1024         }
1025
1026         lirc_serial_dev = platform_device_alloc("lirc_serial", 0);
1027         if (!lirc_serial_dev) {
1028                 result = -ENOMEM;
1029                 goto exit_driver_unregister;
1030         }
1031
1032         result = platform_device_add(lirc_serial_dev);
1033         if (result)
1034                 goto exit_device_put;
1035
1036         return 0;
1037
1038 exit_device_put:
1039         platform_device_put(lirc_serial_dev);
1040 exit_driver_unregister:
1041         platform_driver_unregister(&lirc_serial_driver);
1042 exit_buffer_free:
1043         lirc_buffer_free(&rbuf);
1044         return result;
1045 }
1046
1047 static void lirc_serial_exit(void)
1048 {
1049         platform_device_unregister(lirc_serial_dev);
1050         platform_driver_unregister(&lirc_serial_driver);
1051         lirc_buffer_free(&rbuf);
1052 }
1053
1054 static int __init lirc_serial_init_module(void)
1055 {
1056         int result;
1057
1058         switch (type) {
1059         case LIRC_HOMEBREW:
1060         case LIRC_IRDEO:
1061         case LIRC_IRDEO_REMOTE:
1062         case LIRC_ANIMAX:
1063         case LIRC_IGOR:
1064                 /* if nothing specified, use ttyS0/com1 and irq 4 */
1065                 io = io ? io : 0x3f8;
1066                 irq = irq ? irq : 4;
1067                 break;
1068         default:
1069                 return -EINVAL;
1070         }
1071         if (!softcarrier) {
1072                 switch (type) {
1073                 case LIRC_HOMEBREW:
1074                 case LIRC_IGOR:
1075                         hardware[type].features &=
1076                                 ~(LIRC_CAN_SET_SEND_DUTY_CYCLE|
1077                                   LIRC_CAN_SET_SEND_CARRIER);
1078                         break;
1079                 }
1080         }
1081
1082         /* make sure sense is either -1, 0, or 1 */
1083         if (sense != -1)
1084                 sense = !!sense;
1085
1086         result = lirc_serial_init();
1087         if (result)
1088                 return result;
1089
1090         driver.features = hardware[type].features;
1091         driver.dev = &lirc_serial_dev->dev;
1092         driver.minor = lirc_register_driver(&driver);
1093         if (driver.minor < 0) {
1094                 pr_err("register_chrdev failed!\n");
1095                 lirc_serial_exit();
1096                 return driver.minor;
1097         }
1098         return 0;
1099 }
1100
1101 static void __exit lirc_serial_exit_module(void)
1102 {
1103         lirc_unregister_driver(driver.minor);
1104         lirc_serial_exit();
1105         dprintk("cleaned up module\n");
1106 }
1107
1108
1109 module_init(lirc_serial_init_module);
1110 module_exit(lirc_serial_exit_module);
1111
1112 MODULE_DESCRIPTION("Infra-red receiver driver for serial ports.");
1113 MODULE_AUTHOR("Ralph Metzler, Trent Piepho, Ben Pfaff, "
1114               "Christoph Bartelmus, Andrei Tanas");
1115 MODULE_LICENSE("GPL");
1116
1117 module_param(type, int, S_IRUGO);
1118 MODULE_PARM_DESC(type, "Hardware type (0 = home-brew, 1 = IRdeo,"
1119                  " 2 = IRdeo Remote, 3 = AnimaX, 4 = IgorPlug,"
1120                  " 5 = NSLU2 RX:CTS2/TX:GreenLED)");
1121
1122 module_param(io, int, S_IRUGO);
1123 MODULE_PARM_DESC(io, "I/O address base (0x3f8 or 0x2f8)");
1124
1125 /* some architectures (e.g. intel xscale) have memory mapped registers */
1126 module_param(iommap, bool, S_IRUGO);
1127 MODULE_PARM_DESC(iommap, "physical base for memory mapped I/O"
1128                 " (0 = no memory mapped io)");
1129
1130 /*
1131  * some architectures (e.g. intel xscale) align the 8bit serial registers
1132  * on 32bit word boundaries.
1133  * See linux-kernel/drivers/tty/serial/8250/8250.c serial_in()/out()
1134  */
1135 module_param(ioshift, int, S_IRUGO);
1136 MODULE_PARM_DESC(ioshift, "shift I/O register offset (0 = no shift)");
1137
1138 module_param(irq, int, S_IRUGO);
1139 MODULE_PARM_DESC(irq, "Interrupt (4 or 3)");
1140
1141 module_param(share_irq, bool, S_IRUGO);
1142 MODULE_PARM_DESC(share_irq, "Share interrupts (0 = off, 1 = on)");
1143
1144 module_param(sense, int, S_IRUGO);
1145 MODULE_PARM_DESC(sense, "Override autodetection of IR receiver circuit"
1146                  " (0 = active high, 1 = active low )");
1147
1148 #ifdef CONFIG_LIRC_SERIAL_TRANSMITTER
1149 module_param(txsense, bool, S_IRUGO);
1150 MODULE_PARM_DESC(txsense, "Sense of transmitter circuit"
1151                  " (0 = active high, 1 = active low )");
1152 #endif
1153
1154 module_param(softcarrier, bool, S_IRUGO);
1155 MODULE_PARM_DESC(softcarrier, "Software carrier (0 = off, 1 = on, default on)");
1156
1157 module_param(debug, bool, S_IRUGO | S_IWUSR);
1158 MODULE_PARM_DESC(debug, "Enable debugging messages");