drivers/usb/host/xhci-hub.c

   1 /*
   2  * xHCI host controller driver
   3  *
   4  * Copyright (C) 2008 Intel Corp.
   5  *
   6  * Author: Sarah Sharp
   7  * Some code borrowed from the Linux EHCI driver.
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License version 2 as
  11  * published by the Free Software Foundation.
  12  *
  13  * This program is distributed in the hope that it will be useful, but
  14  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  15  * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  16  * for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software Foundation,
  20  * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21  */
  22
  23
  24 #include <linux/slab.h>
  25 #include <asm/unaligned.h>
  26
  27 #include "xhci.h"
  28 #include "xhci-trace.h"
  29
  30 #define PORT_WAKE_BITS  (PORT_WKOC_E | PORT_WKDISC_E | PORT_WKCONN_E)
  31 #define PORT_RWC_BITS   (PORT_CSC | PORT_PEC | PORT_WRC | PORT_OCC | \
  32                          PORT_RC | PORT_PLC | PORT_PE)
  33
  34 /* USB 3.0 BOS descriptor and a capability descriptor, combined */
  35 static u8 usb_bos_descriptor [] = {
  36         USB_DT_BOS_SIZE,                /*  __u8 bLength, 5 bytes */
  37         USB_DT_BOS,                     /*  __u8 bDescriptorType */
  38         0x0F, 0x00,                     /*  __le16 wTotalLength, 15 bytes */
  39         0x1,                            /*  __u8 bNumDeviceCaps */
  40         /* First device capability */
  41         USB_DT_USB_SS_CAP_SIZE,         /*  __u8 bLength, 10 bytes */
  42         USB_DT_DEVICE_CAPABILITY,       /* Device Capability */
  43         USB_SS_CAP_TYPE,                /* bDevCapabilityType, SUPERSPEED_USB */
  44         0x00,                           /* bmAttributes, LTM off by default */
  45         USB_5GBPS_OPERATION, 0x00,      /* wSpeedsSupported, 5Gbps only */
  46         0x03,                           /* bFunctionalitySupport,
  47                                            USB 3.0 speed only */
  48         0x00,                           /* bU1DevExitLat, set later. */
  49         0x00, 0x00                      /* __le16 bU2DevExitLat, set later. */
  50 };
  51
  52
  53 static void xhci_common_hub_descriptor(struct xhci_hcd *xhci,
  54                 struct usb_hub_descriptor *desc, int ports)
  55 {
  56         u16 temp;
  57
  58         desc->bPwrOn2PwrGood = 10;      /* xhci section 5.4.9 says 20ms max */
  59         desc->bHubContrCurrent = 0;
  60
  61         desc->bNbrPorts = ports;
  62         temp = 0;
  63         /* Bits 1:0 - support per-port power switching, or power always on */
  64         if (HCC_PPC(xhci->hcc_params))
  65                 temp |= HUB_CHAR_INDV_PORT_LPSM;
  66         else
  67                 temp |= HUB_CHAR_NO_LPSM;
  68         /* Bit  2 - root hubs are not part of a compound device */
  69         /* Bits 4:3 - individual port over current protection */
  70         temp |= HUB_CHAR_INDV_PORT_OCPM;
  71         /* Bits 6:5 - no TTs in root ports */
  72         /* Bit  7 - no port indicators */
  73         desc->wHubCharacteristics = cpu_to_le16(temp);
  74 }
  75
  76 /* Fill in the USB 2.0 roothub descriptor */
  77 static void xhci_usb2_hub_descriptor(struct usb_hcd *hcd, struct xhci_hcd *xhci,
  78                 struct usb_hub_descriptor *desc)
  79 {
  80         int ports;
  81         u16 temp;
  82         __u8 port_removable[(USB_MAXCHILDREN + 1 + 7) / 8];
  83         u32 portsc;
  84         unsigned int i;
  85
  86         ports = xhci->num_usb2_ports;
  87
  88         xhci_common_hub_descriptor(xhci, desc, ports);
  89         desc->bDescriptorType = USB_DT_HUB;
  90         temp = 1 + (ports / 8);
  91         desc->bDescLength = USB_DT_HUB_NONVAR_SIZE + 2 * temp;
  92
  93         /* The Device Removable bits are reported on a byte granularity.
  94          * If the port doesn't exist within that byte, the bit is set to 0.
  95          */
  96         memset(port_removable, 0, sizeof(port_removable));
  97         for (i = 0; i < ports; i++) {
  98                 portsc = readl(xhci->usb2_ports[i]);
  99                 /* If a device is removable, PORTSC reports a 0, same as in the
 100                  * hub descriptor DeviceRemovable bits.
 101                  */
 102                 if (portsc & PORT_DEV_REMOVE)
 103                         /* This math is hairy because bit 0 of DeviceRemovable
 104                          * is reserved, and bit 1 is for port 1, etc.
 105                          */
 106                         port_removable[(i + 1) / 8] |= 1 << ((i + 1) % 8);
 107         }
 108
 109         /* ch11.h defines a hub descriptor that has room for USB_MAXCHILDREN
 110          * ports on it.  The USB 2.0 specification says that there are two
 111          * variable length fields at the end of the hub descriptor:
 112          * DeviceRemovable and PortPwrCtrlMask.  But since we can have less than
 113          * USB_MAXCHILDREN ports, we may need to use the DeviceRemovable array
 114          * to set PortPwrCtrlMask bits.  PortPwrCtrlMask must always be set to
 115          * 0xFF, so we initialize the both arrays (DeviceRemovable and
 116          * PortPwrCtrlMask) to 0xFF.  Then we set the DeviceRemovable for each
 117          * set of ports that actually exist.
 118          */
 119         memset(desc->u.hs.DeviceRemovable, 0xff,
 120                         sizeof(desc->u.hs.DeviceRemovable));
 121         memset(desc->u.hs.PortPwrCtrlMask, 0xff,
 122                         sizeof(desc->u.hs.PortPwrCtrlMask));
 123
 124         for (i = 0; i < (ports + 1 + 7) / 8; i++)
 125                 memset(&desc->u.hs.DeviceRemovable[i], port_removable[i],
 126                                 sizeof(__u8));
 127 }
 128
 129 /* Fill in the USB 3.0 roothub descriptor */
 130 static void xhci_usb3_hub_descriptor(struct usb_hcd *hcd, struct xhci_hcd *xhci,
 131                 struct usb_hub_descriptor *desc)
 132 {
 133         int ports;
 134         u16 port_removable;
 135         u32 portsc;
 136         unsigned int i;
 137
 138         ports = xhci->num_usb3_ports;
 139         xhci_common_hub_descriptor(xhci, desc, ports);
 140         desc->bDescriptorType = USB_DT_SS_HUB;
 141         desc->bDescLength = USB_DT_SS_HUB_SIZE;
 142
 143         /* header decode latency should be zero for roothubs,
 144          * see section 4.23.5.2.
 145          */
 146         desc->u.ss.bHubHdrDecLat = 0;
 147         desc->u.ss.wHubDelay = 0;
 148
 149         port_removable = 0;
 150         /* bit 0 is reserved, bit 1 is for port 1, etc. */
 151         for (i = 0; i < ports; i++) {
 152                 portsc = readl(xhci->usb3_ports[i]);
 153                 if (portsc & PORT_DEV_REMOVE)
 154                         port_removable |= 1 << (i + 1);
 155         }
 156
 157         desc->u.ss.DeviceRemovable = cpu_to_le16(port_removable);
 158 }
 159
 160 static void xhci_hub_descriptor(struct usb_hcd *hcd, struct xhci_hcd *xhci,
 161                 struct usb_hub_descriptor *desc)
 162 {
 163
 164         if (hcd->speed == HCD_USB3)
 165                 xhci_usb3_hub_descriptor(hcd, xhci, desc);
 166         else
 167                 xhci_usb2_hub_descriptor(hcd, xhci, desc);
 168
 169 }
 170
 171 static unsigned int xhci_port_speed(unsigned int port_status)
 172 {
 173         if (DEV_LOWSPEED(port_status))
 174                 return USB_PORT_STAT_LOW_SPEED;
 175         if (DEV_HIGHSPEED(port_status))
 176                 return USB_PORT_STAT_HIGH_SPEED;
 177         /*
 178          * FIXME: Yes, we should check for full speed, but the core uses that as
 179          * a default in portspeed() in usb/core/hub.c (which is the only place
 180          * USB_PORT_STAT_*_SPEED is used).
 181          */
 182         return 0;
 183 }
 184
 185 /*
 186  * These bits are Read Only (RO) and should be saved and written to the
 187  * registers: 0, 3, 10:13, 30
 188  * connect status, over-current status, port speed, and device removable.
 189  * connect status and port speed are also sticky - meaning they're in
 190  * the AUX well and they aren't changed by a hot, warm, or cold reset.
 191  */
 192 #define XHCI_PORT_RO    ((1<<0) | (1<<3) | (0xf<<10) | (1<<30))
 193 /*
 194  * These bits are RW; writing a 0 clears the bit, writing a 1 sets the bit:
 195  * bits 5:8, 9, 14:15, 25:27
 196  * link state, port power, port indicator state, "wake on" enable state
 197  */
 198 #define XHCI_PORT_RWS   ((0xf<<5) | (1<<9) | (0x3<<14) | (0x7<<25))
 199 /*
 200  * These bits are RW; writing a 1 sets the bit, writing a 0 has no effect:
 201  * bit 4 (port reset)
 202  */
 203 #define XHCI_PORT_RW1S  ((1<<4))
 204 /*
 205  * These bits are RW; writing a 1 clears the bit, writing a 0 has no effect:
 206  * bits 1, 17, 18, 19, 20, 21, 22, 23
 207  * port enable/disable, and
 208  * change bits: connect, PED, warm port reset changed (reserved zero for USB 2.0 ports),
 209  * over-current, reset, link state, and L1 change
 210  */
 211 #define XHCI_PORT_RW1CS ((1<<1) | (0x7f<<17))
 212 /*
 213  * Bit 16 is RW, and writing a '1' to it causes the link state control to be
 214  * latched in
 215  */
 216 #define XHCI_PORT_RW    ((1<<16))
 217 /*
 218  * These bits are Reserved Zero (RsvdZ) and zero should be written to them:
 219  * bits 2, 24, 28:31
 220  */
 221 #define XHCI_PORT_RZ    ((1<<2) | (1<<24) | (0xf<<28))
 222
 223 /*
 224  * Given a port state, this function returns a value that would result in the
 225  * port being in the same state, if the value was written to the port status
 226  * control register.
 227  * Save Read Only (RO) bits and save read/write bits where
 228  * writing a 0 clears the bit and writing a 1 sets the bit (RWS).
 229  * For all other types (RW1S, RW1CS, RW, and RZ), writing a '0' has no effect.
 230  */
 231 u32 xhci_port_state_to_neutral(u32 state)
 232 {
 233         /* Save read-only status and port state */
 234         return (state & XHCI_PORT_RO) | (state & XHCI_PORT_RWS);
 235 }
 236
 237 /*
 238  * find slot id based on port number.
 239  * @port: The one-based port number from one of the two split roothubs.
 240  */
 241 int xhci_find_slot_id_by_port(struct usb_hcd *hcd, struct xhci_hcd *xhci,
 242                 u16 port)
 243 {
 244         int slot_id;
 245         int i;
 246         enum usb_device_speed speed;
 247
 248         slot_id = 0;
 249         for (i = 0; i < MAX_HC_SLOTS; i++) {
 250                 if (!xhci->devs[i])
 251                         continue;
 252                 speed = xhci->devs[i]->udev->speed;
 253                 if (((speed == USB_SPEED_SUPER) == (hcd->speed == HCD_USB3))
 254                                 && xhci->devs[i]->fake_port == port) {
 255                         slot_id = i;
 256                         break;
 257                 }
 258         }
 259
 260         return slot_id;
 261 }
 262
 263 /*
 264  * Stop device
 265  * It issues stop endpoint command for EP 0 to 30. And wait the last command
 266  * to complete.
 267  * suspend will set to 1, if suspend bit need to set in command.
 268  */
 269 static int xhci_stop_device(struct xhci_hcd *xhci, int slot_id, int suspend)
 270 {
 271         struct xhci_virt_device *virt_dev;
 272         struct xhci_command *cmd;
 273         unsigned long flags;
 274         int ret;
 275         int i;
 276
 277         ret = 0;
 278         virt_dev = xhci->devs[slot_id];
 279         cmd = xhci_alloc_command(xhci, false, true, GFP_NOIO);
 280         if (!cmd) {
 281                 xhci_dbg(xhci, "Couldn't allocate command structure.\n");
 282                 return -ENOMEM;
 283         }
 284
 285         spin_lock_irqsave(&xhci->lock, flags);
 286         for (i = LAST_EP_INDEX; i > 0; i--) {
 287                 if (virt_dev->eps[i].ring && virt_dev->eps[i].ring->dequeue) {
 288                         struct xhci_command *command;
 289                         command = xhci_alloc_command(xhci, false, false,
 290                                                      GFP_NOWAIT);
 291                         if (!command) {
 292                                 spin_unlock_irqrestore(&xhci->lock, flags);
 293                                 xhci_free_command(xhci, cmd);
 294                                 return -ENOMEM;
 295
 296                         }
 297                         xhci_queue_stop_endpoint(xhci, command, slot_id, i,
 298                                                  suspend);
 299                 }
 300         }
 301         xhci_queue_stop_endpoint(xhci, cmd, slot_id, 0, suspend);
 302         xhci_ring_cmd_db(xhci);
 303         spin_unlock_irqrestore(&xhci->lock, flags);
 304
 305         /* Wait for last stop endpoint command to finish */
 306         wait_for_completion(cmd->completion);
 307
 308         if (cmd->status == COMP_CMD_ABORT || cmd->status == COMP_CMD_STOP) {
 309                 xhci_warn(xhci, "Timeout while waiting for stop endpoint command\n");
 310                 ret = -ETIME;
 311         }
 312         xhci_free_command(xhci, cmd);
 313         return ret;
 314 }
 315
 316 /*
 317  * Ring device, it rings the all doorbells unconditionally.
 318  */
 319 void xhci_ring_device(struct xhci_hcd *xhci, int slot_id)
 320 {
 321         int i;
 322
 323         for (i = 0; i < LAST_EP_INDEX + 1; i++)
 324                 if (xhci->devs[slot_id]->eps[i].ring &&
 325                     xhci->devs[slot_id]->eps[i].ring->dequeue)
 326                         xhci_ring_ep_doorbell(xhci, slot_id, i, 0);
 327
 328         return;
 329 }
 330
 331 static void xhci_disable_port(struct usb_hcd *hcd, struct xhci_hcd *xhci,
 332                 u16 wIndex, __le32 __iomem *addr, u32 port_status)
 333 {
 334         /* Don't allow the USB core to disable SuperSpeed ports. */
 335         if (hcd->speed == HCD_USB3) {
 336                 xhci_dbg(xhci, "Ignoring request to disable "
 337                                 "SuperSpeed port.\n");
 338                 return;
 339         }
 340
 341         /* Write 1 to disable the port */
 342         writel(port_status | PORT_PE, addr);
 343         port_status = readl(addr);
 344         xhci_dbg(xhci, "disable port, actual port %d status  = 0x%x\n",
 345                         wIndex, port_status);
 346 }
 347
 348 static void xhci_clear_port_change_bit(struct xhci_hcd *xhci, u16 wValue,
 349                 u16 wIndex, __le32 __iomem *addr, u32 port_status)
 350 {
 351         char *port_change_bit;
 352         u32 status;
 353
 354         switch (wValue) {
 355         case USB_PORT_FEAT_C_RESET:
 356                 status = PORT_RC;
 357                 port_change_bit = "reset";
 358                 break;
 359         case USB_PORT_FEAT_C_BH_PORT_RESET:
 360                 status = PORT_WRC;
 361                 port_change_bit = "warm(BH) reset";
 362                 break;
 363         case USB_PORT_FEAT_C_CONNECTION:
 364                 status = PORT_CSC;
 365                 port_change_bit = "connect";
 366                 break;
 367         case USB_PORT_FEAT_C_OVER_CURRENT:
 368                 status = PORT_OCC;
 369                 port_change_bit = "over-current";
 370                 break;
 371         case USB_PORT_FEAT_C_ENABLE:
 372                 status = PORT_PEC;
 373                 port_change_bit = "enable/disable";
 374                 break;
 375         case USB_PORT_FEAT_C_SUSPEND:
 376                 status = PORT_PLC;
 377                 port_change_bit = "suspend/resume";
 378                 break;
 379         case USB_PORT_FEAT_C_PORT_LINK_STATE:
 380                 status = PORT_PLC;
 381                 port_change_bit = "link state";
 382                 break;
 383         default:
 384                 /* Should never happen */
 385                 return;
 386         }
 387         /* Change bits are all write 1 to clear */
 388         writel(port_status | status, addr);
 389         port_status = readl(addr);
 390         xhci_dbg(xhci, "clear port %s change, actual port %d status  = 0x%x\n",
 391                         port_change_bit, wIndex, port_status);
 392 }
 393
 394 static int xhci_get_ports(struct usb_hcd *hcd, __le32 __iomem ***port_array)
 395 {
 396         int max_ports;
 397         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
 398
 399         if (hcd->speed == HCD_USB3) {
 400                 max_ports = xhci->num_usb3_ports;
 401                 *port_array = xhci->usb3_ports;
 402         } else {
 403                 max_ports = xhci->num_usb2_ports;
 404                 *port_array = xhci->usb2_ports;
 405         }
 406
 407         return max_ports;
 408 }
 409
 410 void xhci_set_link_state(struct xhci_hcd *xhci, __le32 __iomem **port_array,
 411                                 int port_id, u32 link_state)
 412 {
 413         u32 temp;
 414
 415         temp = readl(port_array[port_id]);
 416         temp = xhci_port_state_to_neutral(temp);
 417         temp &= ~PORT_PLS_MASK;
 418         temp |= PORT_LINK_STROBE | link_state;
 419         writel(temp, port_array[port_id]);
 420 }
 421
 422 static void xhci_set_remote_wake_mask(struct xhci_hcd *xhci,
 423                 __le32 __iomem **port_array, int port_id, u16 wake_mask)
 424 {
 425         u32 temp;
 426
 427         temp = readl(port_array[port_id]);
 428         temp = xhci_port_state_to_neutral(temp);
 429
 430         if (wake_mask & USB_PORT_FEAT_REMOTE_WAKE_CONNECT)
 431                 temp |= PORT_WKCONN_E;
 432         else
 433                 temp &= ~PORT_WKCONN_E;
 434
 435         if (wake_mask & USB_PORT_FEAT_REMOTE_WAKE_DISCONNECT)
 436                 temp |= PORT_WKDISC_E;
 437         else
 438                 temp &= ~PORT_WKDISC_E;
 439
 440         if (wake_mask & USB_PORT_FEAT_REMOTE_WAKE_OVER_CURRENT)
 441                 temp |= PORT_WKOC_E;
 442         else
 443                 temp &= ~PORT_WKOC_E;
 444
 445         writel(temp, port_array[port_id]);
 446 }
 447
 448 /* Test and clear port RWC bit */
 449 void xhci_test_and_clear_bit(struct xhci_hcd *xhci, __le32 __iomem **port_array,
 450                                 int port_id, u32 port_bit)
 451 {
 452         u32 temp;
 453
 454         temp = readl(port_array[port_id]);
 455         if (temp & port_bit) {
 456                 temp = xhci_port_state_to_neutral(temp);
 457                 temp |= port_bit;
 458                 writel(temp, port_array[port_id]);
 459         }
 460 }
 461
 462 /* Updates Link Status for USB 2.1 port */
 463 static void xhci_hub_report_usb2_link_state(u32 *status, u32 status_reg)
 464 {
 465         if ((status_reg & PORT_PLS_MASK) == XDEV_U2)
 466                 *status |= USB_PORT_STAT_L1;
 467 }
 468
 469 /* Updates Link Status for super Speed port */
 470 static void xhci_hub_report_usb3_link_state(u32 *status, u32 status_reg)
 471 {
 472         u32 pls = status_reg & PORT_PLS_MASK;
 473
 474         /* resume state is a xHCI internal state.
 475          * Do not report it to usb core.
 476          */
 477         if (pls == XDEV_RESUME)
 478                 return;
 479
 480         /* When the CAS bit is set then warm reset
 481          * should be performed on port
 482          */
 483         if (status_reg & PORT_CAS) {
 484                 /* The CAS bit can be set while the port is
 485                  * in any link state.
 486                  * Only roothubs have CAS bit, so we
 487                  * pretend to be in compliance mode
 488                  * unless we're already in compliance
 489                  * or the inactive state.
 490                  */
 491                 if (pls != USB_SS_PORT_LS_COMP_MOD &&
 492                     pls != USB_SS_PORT_LS_SS_INACTIVE) {
 493                         pls = USB_SS_PORT_LS_COMP_MOD;
 494                 }
 495                 /* Return also connection bit -
 496                  * hub state machine resets port
 497                  * when this bit is set.
 498                  */
 499                 pls |= USB_PORT_STAT_CONNECTION;
 500         } else {
 501                 /*
 502                  * If CAS bit isn't set but the Port is already at
 503                  * Compliance Mode, fake a connection so the USB core
 504                  * notices the Compliance state and resets the port.
 505                  * This resolves an issue generated by the SN65LVPE502CP
 506                  * in which sometimes the port enters compliance mode
 507                  * caused by a delay on the host-device negotiation.
 508                  */
 509                 if (pls == USB_SS_PORT_LS_COMP_MOD)
 510                         pls |= USB_PORT_STAT_CONNECTION;
 511         }
 512
 513         /* update status field */
 514         *status |= pls;
 515 }
 516
 517 /*
 518  * Function for Compliance Mode Quirk.
 519  *
 520  * This Function verifies if all xhc USB3 ports have entered U0, if so,
 521  * the compliance mode timer is deleted. A port won't enter
 522  * compliance mode if it has previously entered U0.
 523  */
 524 static void xhci_del_comp_mod_timer(struct xhci_hcd *xhci, u32 status,
 525                                     u16 wIndex)
 526 {
 527         u32 all_ports_seen_u0 = ((1 << xhci->num_usb3_ports)-1);
 528         bool port_in_u0 = ((status & PORT_PLS_MASK) == XDEV_U0);
 529
 530         if (!(xhci->quirks & XHCI_COMP_MODE_QUIRK))
 531                 return;
 532
 533         if ((xhci->port_status_u0 != all_ports_seen_u0) && port_in_u0) {
 534                 xhci->port_status_u0 |= 1 << wIndex;
 535                 if (xhci->port_status_u0 == all_ports_seen_u0) {
 536                         del_timer_sync(&xhci->comp_mode_recovery_timer);
 537                         xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
 538                                 "All USB3 ports have entered U0 already!");
 539                         xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
 540                                 "Compliance Mode Recovery Timer Deleted.");
 541                 }
 542         }
 543 }
 544
 545 /*
 546  * Converts a raw xHCI port status into the format that external USB 2.0 or USB
 547  * 3.0 hubs use.
 548  *
 549  * Possible side effects:
 550  *  - Mark a port as being done with device resume,
 551  *    and ring the endpoint doorbells.
 552  *  - Stop the Synopsys redriver Compliance Mode polling.
 553  *  - Drop and reacquire the xHCI lock, in order to wait for port resume.
 554  */
 555 static u32 xhci_get_port_status(struct usb_hcd *hcd,
 556                 struct xhci_bus_state *bus_state,
 557                 __le32 __iomem **port_array,
 558                 u16 wIndex, u32 raw_port_status,
 559                 unsigned long flags)
 560         __releases(&xhci->lock)
 561         __acquires(&xhci->lock)
 562 {
 563         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
 564         u32 status = 0;
 565         int slot_id;
 566
 567         /* wPortChange bits */
 568         if (raw_port_status & PORT_CSC)
 569                 status |= USB_PORT_STAT_C_CONNECTION << 16;
 570         if (raw_port_status & PORT_PEC)
 571                 status |= USB_PORT_STAT_C_ENABLE << 16;
 572         if ((raw_port_status & PORT_OCC))
 573                 status |= USB_PORT_STAT_C_OVERCURRENT << 16;
 574         if ((raw_port_status & PORT_RC))
 575                 status |= USB_PORT_STAT_C_RESET << 16;
 576         /* USB3.0 only */
 577         if (hcd->speed == HCD_USB3) {
 578                 if ((raw_port_status & PORT_PLC))
 579                         status |= USB_PORT_STAT_C_LINK_STATE << 16;
 580                 if ((raw_port_status & PORT_WRC))
 581                         status |= USB_PORT_STAT_C_BH_RESET << 16;
 582         }
 583
 584         if (hcd->speed != HCD_USB3) {
 585                 if ((raw_port_status & PORT_PLS_MASK) == XDEV_U3
 586                                 && (raw_port_status & PORT_POWER))
 587                         status |= USB_PORT_STAT_SUSPEND;
 588         }
 589         if ((raw_port_status & PORT_PLS_MASK) == XDEV_RESUME &&
 590                         !DEV_SUPERSPEED(raw_port_status)) {
 591                 if ((raw_port_status & PORT_RESET) ||
 592                                 !(raw_port_status & PORT_PE))
 593                         return 0xffffffff;
 594                 if (time_after_eq(jiffies,
 595                                         bus_state->resume_done[wIndex])) {
 596                         int time_left;
 597
 598                         xhci_dbg(xhci, "Resume USB2 port %d\n",
 599                                         wIndex + 1);
 600                         bus_state->resume_done[wIndex] = 0;
 601                         clear_bit(wIndex, &bus_state->resuming_ports);
 602
 603                         set_bit(wIndex, &bus_state->rexit_ports);
 604                         xhci_set_link_state(xhci, port_array, wIndex,
 605                                         XDEV_U0);
 606
 607                         spin_unlock_irqrestore(&xhci->lock, flags);
 608                         time_left = wait_for_completion_timeout(
 609                                         &bus_state->rexit_done[wIndex],
 610                                         msecs_to_jiffies(
 611                                                 XHCI_MAX_REXIT_TIMEOUT));
 612                         spin_lock_irqsave(&xhci->lock, flags);
 613
 614                         if (time_left) {
 615                                 slot_id = xhci_find_slot_id_by_port(hcd,
 616                                                 xhci, wIndex + 1);
 617                                 if (!slot_id) {
 618                                         xhci_dbg(xhci, "slot_id is zero\n");
 619                                         return 0xffffffff;
 620                                 }
 621                                 xhci_ring_device(xhci, slot_id);
 622                         } else {
 623                                 int port_status = readl(port_array[wIndex]);
 624                                 xhci_warn(xhci, "Port resume took longer than %i msec, port status = 0x%x\n",
 625                                                 XHCI_MAX_REXIT_TIMEOUT,
 626                                                 port_status);
 627                                 status |= USB_PORT_STAT_SUSPEND;
 628                                 clear_bit(wIndex, &bus_state->rexit_ports);
 629                         }
 630
 631                         bus_state->port_c_suspend |= 1 << wIndex;
 632                         bus_state->suspended_ports &= ~(1 << wIndex);
 633                 } else {
 634                         /*
 635                          * The resume has been signaling for less than
 636                          * 20ms. Report the port status as SUSPEND,
 637                          * let the usbcore check port status again
 638                          * and clear resume signaling later.
 639                          */
 640                         status |= USB_PORT_STAT_SUSPEND;
 641                 }
 642         }
 643         if ((raw_port_status & PORT_PLS_MASK) == XDEV_U0
 644                         && (raw_port_status & PORT_POWER)
 645                         && (bus_state->suspended_ports & (1 << wIndex))) {
 646                 bus_state->suspended_ports &= ~(1 << wIndex);
 647                 if (hcd->speed != HCD_USB3)
 648                         bus_state->port_c_suspend |= 1 << wIndex;
 649         }
 650         if (raw_port_status & PORT_CONNECT) {
 651                 status |= USB_PORT_STAT_CONNECTION;
 652                 status |= xhci_port_speed(raw_port_status);
 653         }
 654         if (raw_port_status & PORT_PE)
 655                 status |= USB_PORT_STAT_ENABLE;
 656         if (raw_port_status & PORT_OC)
 657                 status |= USB_PORT_STAT_OVERCURRENT;
 658         if (raw_port_status & PORT_RESET)
 659                 status |= USB_PORT_STAT_RESET;
 660         if (raw_port_status & PORT_POWER) {
 661                 if (hcd->speed == HCD_USB3)
 662                         status |= USB_SS_PORT_STAT_POWER;
 663                 else
 664                         status |= USB_PORT_STAT_POWER;
 665         }
 666         /* Update Port Link State */
 667         if (hcd->speed == HCD_USB3) {
 668                 xhci_hub_report_usb3_link_state(&status, raw_port_status);
 669                 /*
 670                  * Verify if all USB3 Ports Have entered U0 already.
 671                  * Delete Compliance Mode Timer if so.
 672                  */
 673                 xhci_del_comp_mod_timer(xhci, raw_port_status, wIndex);
 674         } else {
 675                 xhci_hub_report_usb2_link_state(&status, raw_port_status);
 676         }
 677         if (bus_state->port_c_suspend & (1 << wIndex))
 678                 status |= 1 << USB_PORT_FEAT_C_SUSPEND;
 679
 680         return status;
 681 }
 682
 683 int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
 684                 u16 wIndex, char *buf, u16 wLength)
 685 {
 686         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
 687         int max_ports;
 688         unsigned long flags;
 689         u32 temp, status;
 690         int retval = 0;
 691         __le32 __iomem **port_array;
 692         int slot_id;
 693         struct xhci_bus_state *bus_state;
 694         u16 link_state = 0;
 695         u16 wake_mask = 0;
 696         u16 timeout = 0;
 697
 698         max_ports = xhci_get_ports(hcd, &port_array);
 699         bus_state = &xhci->bus_state[hcd_index(hcd)];
 700
 701         spin_lock_irqsave(&xhci->lock, flags);
 702         switch (typeReq) {
 703         case GetHubStatus:
 704                 /* No power source, over-current reported per port */
 705                 memset(buf, 0, 4);
 706                 break;
 707         case GetHubDescriptor:
 708                 /* Check to make sure userspace is asking for the USB 3.0 hub
 709                  * descriptor for the USB 3.0 roothub.  If not, we stall the
 710                  * endpoint, like external hubs do.
 711                  */
 712                 if (hcd->speed == HCD_USB3 &&
 713                                 (wLength < USB_DT_SS_HUB_SIZE ||
 714                                  wValue != (USB_DT_SS_HUB << 8))) {
 715                         xhci_dbg(xhci, "Wrong hub descriptor type for "
 716                                         "USB 3.0 roothub.\n");
 717                         goto error;
 718                 }
 719                 xhci_hub_descriptor(hcd, xhci,
 720                                 (struct usb_hub_descriptor *) buf);
 721                 break;
 722         case DeviceRequest | USB_REQ_GET_DESCRIPTOR:
 723                 if ((wValue & 0xff00) != (USB_DT_BOS << 8))
 724                         goto error;
 725
 726                 if (hcd->speed != HCD_USB3)
 727                         goto error;
 728
 729                 /* Set the U1 and U2 exit latencies. */
 730                 memcpy(buf, &usb_bos_descriptor,
 731                                 USB_DT_BOS_SIZE + USB_DT_USB_SS_CAP_SIZE);
 732                 if ((xhci->quirks & XHCI_LPM_SUPPORT)) {
 733                         temp = readl(&xhci->cap_regs->hcs_params3);
 734                         buf[12] = HCS_U1_LATENCY(temp);
 735                         put_unaligned_le16(HCS_U2_LATENCY(temp), &buf[13]);
 736                 }
 737
 738                 /* Indicate whether the host has LTM support. */
 739                 temp = readl(&xhci->cap_regs->hcc_params);
 740                 if (HCC_LTC(temp))
 741                         buf[8] |= USB_LTM_SUPPORT;
 742
 743                 spin_unlock_irqrestore(&xhci->lock, flags);
 744                 return USB_DT_BOS_SIZE + USB_DT_USB_SS_CAP_SIZE;
 745         case GetPortStatus:
 746                 if (!wIndex || wIndex > max_ports)
 747                         goto error;
 748                 wIndex--;
 749                 temp = readl(port_array[wIndex]);
 750                 if (temp == 0xffffffff) {
 751                         retval = -ENODEV;
 752                         break;
 753                 }
 754                 status = xhci_get_port_status(hcd, bus_state, port_array,
 755                                 wIndex, temp, flags);
 756                 if (status == 0xffffffff)
 757                         goto error;
 758
 759                 xhci_dbg(xhci, "get port status, actual port %d status  = 0x%x\n",
 760                                 wIndex, temp);
 761                 xhci_dbg(xhci, "Get port status returned 0x%x\n", status);
 762
 763                 put_unaligned(cpu_to_le32(status), (__le32 *) buf);
 764                 break;
 765         case SetPortFeature:
 766                 if (wValue == USB_PORT_FEAT_LINK_STATE)
 767                         link_state = (wIndex & 0xff00) >> 3;
 768                 if (wValue == USB_PORT_FEAT_REMOTE_WAKE_MASK)
 769                         wake_mask = wIndex & 0xff00;
 770                 /* The MSB of wIndex is the U1/U2 timeout */
 771                 timeout = (wIndex & 0xff00) >> 8;
 772                 wIndex &= 0xff;
 773                 if (!wIndex || wIndex > max_ports)
 774                         goto error;
 775                 wIndex--;
 776                 temp = readl(port_array[wIndex]);
 777                 if (temp == 0xffffffff) {
 778                         retval = -ENODEV;
 779                         break;
 780                 }
 781                 temp = xhci_port_state_to_neutral(temp);
 782                 /* FIXME: What new port features do we need to support? */
 783                 switch (wValue) {
 784                 case USB_PORT_FEAT_SUSPEND:
 785                         temp = readl(port_array[wIndex]);
 786                         if ((temp & PORT_PLS_MASK) != XDEV_U0) {
 787                                 /* Resume the port to U0 first */
 788                                 xhci_set_link_state(xhci, port_array, wIndex,
 789                                                         XDEV_U0);
 790                                 spin_unlock_irqrestore(&xhci->lock, flags);
 791                                 msleep(10);
 792                                 spin_lock_irqsave(&xhci->lock, flags);
 793                         }
 794                         /* In spec software should not attempt to suspend
 795                          * a port unless the port reports that it is in the
 796                          * enabled (PED = ‘1’,PLS < ‘3’) state.
 797                          */
 798                         temp = readl(port_array[wIndex]);
 799                         if ((temp & PORT_PE) == 0 || (temp & PORT_RESET)
 800                                 || (temp & PORT_PLS_MASK) >= XDEV_U3) {
 801                                 xhci_warn(xhci, "USB core suspending device "
 802                                           "not in U0/U1/U2.\n");
 803                                 goto error;
 804                         }
 805
 806                         slot_id = xhci_find_slot_id_by_port(hcd, xhci,
 807                                         wIndex + 1);
 808                         if (!slot_id) {
 809                                 xhci_warn(xhci, "slot_id is zero\n");
 810                                 goto error;
 811                         }
 812                         /* unlock to execute stop endpoint commands */
 813                         spin_unlock_irqrestore(&xhci->lock, flags);
 814                         xhci_stop_device(xhci, slot_id, 1);
 815                         spin_lock_irqsave(&xhci->lock, flags);
 816
 817                         xhci_set_link_state(xhci, port_array, wIndex, XDEV_U3);
 818
 819                         spin_unlock_irqrestore(&xhci->lock, flags);
 820                         msleep(10); /* wait device to enter */
 821                         spin_lock_irqsave(&xhci->lock, flags);
 822
 823                         temp = readl(port_array[wIndex]);
 824                         bus_state->suspended_ports |= 1 << wIndex;
 825                         break;
 826                 case USB_PORT_FEAT_LINK_STATE:
 827                         temp = readl(port_array[wIndex]);
 828
 829                         /* Disable port */
 830                         if (link_state == USB_SS_PORT_LS_SS_DISABLED) {
 831                                 xhci_dbg(xhci, "Disable port %d\n", wIndex);
 832                                 temp = xhci_port_state_to_neutral(temp);
 833                                 /*
 834                                  * Clear all change bits, so that we get a new
 835                                  * connection event.
 836                                  */
 837                                 temp |= PORT_CSC | PORT_PEC | PORT_WRC |
 838                                         PORT_OCC | PORT_RC | PORT_PLC |
 839                                         PORT_CEC;
 840                                 writel(temp | PORT_PE, port_array[wIndex]);
 841                                 temp = readl(port_array[wIndex]);
 842                                 break;
 843                         }
 844
 845                         /* Put link in RxDetect (enable port) */
 846                         if (link_state == USB_SS_PORT_LS_RX_DETECT) {
 847                                 xhci_dbg(xhci, "Enable port %d\n", wIndex);
 848                                 xhci_set_link_state(xhci, port_array, wIndex,
 849                                                 link_state);
 850                                 temp = readl(port_array[wIndex]);
 851                                 break;
 852                         }
 853
 854                         /* Software should not attempt to set
 855                          * port link state above '3' (U3) and the port
 856                          * must be enabled.
 857                          */
 858                         if ((temp & PORT_PE) == 0 ||
 859                                 (link_state > USB_SS_PORT_LS_U3)) {
 860                                 xhci_warn(xhci, "Cannot set link state.\n");
 861                                 goto error;
 862                         }
 863
 864                         if (link_state == USB_SS_PORT_LS_U3) {
 865                                 slot_id = xhci_find_slot_id_by_port(hcd, xhci,
 866                                                 wIndex + 1);
 867                                 if (slot_id) {
 868                                         /* unlock to execute stop endpoint
 869                                          * commands */
 870                                         spin_unlock_irqrestore(&xhci->lock,
 871                                                                 flags);
 872                                         xhci_stop_device(xhci, slot_id, 1);
 873                                         spin_lock_irqsave(&xhci->lock, flags);
 874                                 }
 875                         }
 876
 877                         xhci_set_link_state(xhci, port_array, wIndex,
 878                                                 link_state);
 879
 880                         spin_unlock_irqrestore(&xhci->lock, flags);
 881                         msleep(20); /* wait device to enter */
 882                         spin_lock_irqsave(&xhci->lock, flags);
 883
 884                         temp = readl(port_array[wIndex]);
 885                         if (link_state == USB_SS_PORT_LS_U3)
 886                                 bus_state->suspended_ports |= 1 << wIndex;
 887                         break;
 888                 case USB_PORT_FEAT_POWER:
 889                         /*
 890                          * Turn on ports, even if there isn't per-port switching.
 891                          * HC will report connect events even before this is set.
 892                          * However, khubd will ignore the roothub events until
 893                          * the roothub is registered.
 894                          */
 895                         writel(temp | PORT_POWER, port_array[wIndex]);
 896
 897                         temp = readl(port_array[wIndex]);
 898                         xhci_dbg(xhci, "set port power, actual port %d status  = 0x%x\n", wIndex, temp);
 899
 900                         spin_unlock_irqrestore(&xhci->lock, flags);
 901                         temp = usb_acpi_power_manageable(hcd->self.root_hub,
 902                                         wIndex);
 903                         if (temp)
 904                                 usb_acpi_set_power_state(hcd->self.root_hub,
 905                                                 wIndex, true);
 906                         spin_lock_irqsave(&xhci->lock, flags);
 907                         break;
 908                 case USB_PORT_FEAT_RESET:
 909                         temp = (temp | PORT_RESET);
 910                         writel(temp, port_array[wIndex]);
 911
 912                         temp = readl(port_array[wIndex]);
 913                         xhci_dbg(xhci, "set port reset, actual port %d status  = 0x%x\n", wIndex, temp);
 914                         break;
 915                 case USB_PORT_FEAT_REMOTE_WAKE_MASK:
 916                         xhci_set_remote_wake_mask(xhci, port_array,
 917                                         wIndex, wake_mask);
 918                         temp = readl(port_array[wIndex]);
 919                         xhci_dbg(xhci, "set port remote wake mask, "
 920                                         "actual port %d status  = 0x%x\n",
 921                                         wIndex, temp);
 922                         break;
 923                 case USB_PORT_FEAT_BH_PORT_RESET:
 924                         temp |= PORT_WR;
 925                         writel(temp, port_array[wIndex]);
 926
 927                         temp = readl(port_array[wIndex]);
 928                         break;
 929                 case USB_PORT_FEAT_U1_TIMEOUT:
 930                         if (hcd->speed != HCD_USB3)
 931                                 goto error;
 932                         temp = readl(port_array[wIndex] + PORTPMSC);
 933                         temp &= ~PORT_U1_TIMEOUT_MASK;
 934                         temp |= PORT_U1_TIMEOUT(timeout);
 935                         writel(temp, port_array[wIndex] + PORTPMSC);
 936                         break;
 937                 case USB_PORT_FEAT_U2_TIMEOUT:
 938                         if (hcd->speed != HCD_USB3)
 939                                 goto error;
 940                         temp = readl(port_array[wIndex] + PORTPMSC);
 941                         temp &= ~PORT_U2_TIMEOUT_MASK;
 942                         temp |= PORT_U2_TIMEOUT(timeout);
 943                         writel(temp, port_array[wIndex] + PORTPMSC);
 944                         break;
 945                 default:
 946                         goto error;
 947                 }
 948                 /* unblock any posted writes */
 949                 temp = readl(port_array[wIndex]);
 950                 break;
 951         case ClearPortFeature:
 952                 if (!wIndex || wIndex > max_ports)
 953                         goto error;
 954                 wIndex--;
 955                 temp = readl(port_array[wIndex]);
 956                 if (temp == 0xffffffff) {
 957                         retval = -ENODEV;
 958                         break;
 959                 }
 960                 /* FIXME: What new port features do we need to support? */
 961                 temp = xhci_port_state_to_neutral(temp);
 962                 switch (wValue) {
 963                 case USB_PORT_FEAT_SUSPEND:
 964                         temp = readl(port_array[wIndex]);
 965                         xhci_dbg(xhci, "clear USB_PORT_FEAT_SUSPEND\n");
 966                         xhci_dbg(xhci, "PORTSC %04x\n", temp);
 967                         if (temp & PORT_RESET)
 968                                 goto error;
 969                         if ((temp & PORT_PLS_MASK) == XDEV_U3) {
 970                                 if ((temp & PORT_PE) == 0)
 971                                         goto error;
 972
 973                                 xhci_set_link_state(xhci, port_array, wIndex,
 974                                                         XDEV_RESUME);
 975                                 spin_unlock_irqrestore(&xhci->lock, flags);
 976                                 msleep(20);
 977                                 spin_lock_irqsave(&xhci->lock, flags);
 978                                 xhci_set_link_state(xhci, port_array, wIndex,
 979                                                         XDEV_U0);
 980                         }
 981                         bus_state->port_c_suspend |= 1 << wIndex;
 982
 983                         slot_id = xhci_find_slot_id_by_port(hcd, xhci,
 984                                         wIndex + 1);
 985                         if (!slot_id) {
 986                                 xhci_dbg(xhci, "slot_id is zero\n");
 987                                 goto error;
 988                         }
 989                         xhci_ring_device(xhci, slot_id);
 990                         break;
 991                 case USB_PORT_FEAT_C_SUSPEND:
 992                         bus_state->port_c_suspend &= ~(1 << wIndex);
 993                 case USB_PORT_FEAT_C_RESET:
 994                 case USB_PORT_FEAT_C_BH_PORT_RESET:
 995                 case USB_PORT_FEAT_C_CONNECTION:
 996                 case USB_PORT_FEAT_C_OVER_CURRENT:
 997                 case USB_PORT_FEAT_C_ENABLE:
 998                 case USB_PORT_FEAT_C_PORT_LINK_STATE:
 999                         xhci_clear_port_change_bit(xhci, wValue, wIndex,
1000                                         port_array[wIndex], temp);
1001                         break;
1002                 case USB_PORT_FEAT_ENABLE:
1003                         xhci_disable_port(hcd, xhci, wIndex,
1004                                         port_array[wIndex], temp);
1005                         break;
1006                 case USB_PORT_FEAT_POWER:
1007                         writel(temp & ~PORT_POWER, port_array[wIndex]);
1008
1009                         spin_unlock_irqrestore(&xhci->lock, flags);
1010                         temp = usb_acpi_power_manageable(hcd->self.root_hub,
1011                                         wIndex);
1012                         if (temp)
1013                                 usb_acpi_set_power_state(hcd->self.root_hub,
1014                                                 wIndex, false);
1015                         spin_lock_irqsave(&xhci->lock, flags);
1016                         break;
1017                 default:
1018                         goto error;
1019                 }
1020                 break;
1021         default:
1022 error:
1023                 /* "stall" on error */
1024                 retval = -EPIPE;
1025         }
1026         spin_unlock_irqrestore(&xhci->lock, flags);
1027         return retval;
1028 }
1029
1030 /*
1031  * Returns 0 if the status hasn't changed, or the number of bytes in buf.
1032  * Ports are 0-indexed from the HCD point of view,
1033  * and 1-indexed from the USB core pointer of view.
1034  *
1035  * Note that the status change bits will be cleared as soon as a port status
1036  * change event is generated, so we use the saved status from that event.
1037  */
1038 int xhci_hub_status_data(struct usb_hcd *hcd, char *buf)
1039 {
1040         unsigned long flags;
1041         u32 temp, status;
1042         u32 mask;
1043         int i, retval;
1044         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
1045         int max_ports;
1046         __le32 __iomem **port_array;
1047         struct xhci_bus_state *bus_state;
1048         bool reset_change = false;
1049
1050         max_ports = xhci_get_ports(hcd, &port_array);
1051         bus_state = &xhci->bus_state[hcd_index(hcd)];
1052
1053         /* Initial status is no changes */
1054         retval = (max_ports + 8) / 8;
1055         memset(buf, 0, retval);
1056
1057         /*
1058          * Inform the usbcore about resume-in-progress by returning
1059          * a non-zero value even if there are no status changes.
1060          */
1061         status = bus_state->resuming_ports;
1062
1063         mask = PORT_CSC | PORT_PEC | PORT_OCC | PORT_PLC | PORT_WRC;
1064
1065         spin_lock_irqsave(&xhci->lock, flags);
1066         /* For each port, did anything change?  If so, set that bit in buf. */
1067         for (i = 0; i < max_ports; i++) {
1068                 temp = readl(port_array[i]);
1069                 if (temp == 0xffffffff) {
1070                         retval = -ENODEV;
1071                         break;
1072                 }
1073                 if ((temp & mask) != 0 ||
1074                         (bus_state->port_c_suspend & 1 << i) ||
1075                         (bus_state->resume_done[i] && time_after_eq(
1076                             jiffies, bus_state->resume_done[i]))) {
1077                         buf[(i + 1) / 8] |= 1 << (i + 1) % 8;
1078                         status = 1;
1079                 }
1080                 if ((temp & PORT_RC))
1081                         reset_change = true;
1082         }
1083         if (!status && !reset_change) {
1084                 xhci_dbg(xhci, "%s: stopping port polling.\n", __func__);
1085                 clear_bit(HCD_FLAG_POLL_RH, &hcd->flags);
1086         }
1087         spin_unlock_irqrestore(&xhci->lock, flags);
1088         return status ? retval : 0;
1089 }
1090
1091 #ifdef CONFIG_PM
1092
1093 int xhci_bus_suspend(struct usb_hcd *hcd)
1094 {
1095         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
1096         int max_ports, port_index;
1097         __le32 __iomem **port_array;
1098         struct xhci_bus_state *bus_state;
1099         unsigned long flags;
1100
1101         max_ports = xhci_get_ports(hcd, &port_array);
1102         bus_state = &xhci->bus_state[hcd_index(hcd)];
1103
1104         spin_lock_irqsave(&xhci->lock, flags);
1105
1106         if (hcd->self.root_hub->do_remote_wakeup) {
1107                 if (bus_state->resuming_ports) {
1108                         spin_unlock_irqrestore(&xhci->lock, flags);
1109                         xhci_dbg(xhci, "suspend failed because "
1110                                                 "a port is resuming\n");
1111                         return -EBUSY;
1112                 }
1113         }
1114
1115         port_index = max_ports;
1116         bus_state->bus_suspended = 0;
1117         while (port_index--) {
1118                 /* suspend the port if the port is not suspended */
1119                 u32 t1, t2;
1120                 int slot_id;
1121
1122                 t1 = readl(port_array[port_index]);
1123                 t2 = xhci_port_state_to_neutral(t1);
1124
1125                 if ((t1 & PORT_PE) && !(t1 & PORT_PLS_MASK)) {
1126                         xhci_dbg(xhci, "port %d not suspended\n", port_index);
1127                         slot_id = xhci_find_slot_id_by_port(hcd, xhci,
1128                                         port_index + 1);
1129                         if (slot_id) {
1130                                 spin_unlock_irqrestore(&xhci->lock, flags);
1131                                 xhci_stop_device(xhci, slot_id, 1);
1132                                 spin_lock_irqsave(&xhci->lock, flags);
1133                         }
1134                         t2 &= ~PORT_PLS_MASK;
1135                         t2 |= PORT_LINK_STROBE | XDEV_U3;
1136                         set_bit(port_index, &bus_state->bus_suspended);
1137                 }
1138                 /* USB core sets remote wake mask for USB 3.0 hubs,
1139                  * including the USB 3.0 roothub, but only if CONFIG_PM_RUNTIME
1140                  * is enabled, so also enable remote wake here.
1141                  */
1142                 if (hcd->self.root_hub->do_remote_wakeup) {
1143                         if (t1 & PORT_CONNECT) {
1144                                 t2 |= PORT_WKOC_E | PORT_WKDISC_E;
1145                                 t2 &= ~PORT_WKCONN_E;
1146                         } else {
1147                                 t2 |= PORT_WKOC_E | PORT_WKCONN_E;
1148                                 t2 &= ~PORT_WKDISC_E;
1149                         }
1150                 } else
1151                         t2 &= ~PORT_WAKE_BITS;
1152
1153                 t1 = xhci_port_state_to_neutral(t1);
1154                 if (t1 != t2)
1155                         writel(t2, port_array[port_index]);
1156         }
1157         hcd->state = HC_STATE_SUSPENDED;
1158         bus_state->next_statechange = jiffies + msecs_to_jiffies(10);
1159         spin_unlock_irqrestore(&xhci->lock, flags);
1160         return 0;
1161 }
1162
1163 int xhci_bus_resume(struct usb_hcd *hcd)
1164 {
1165         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
1166         int max_ports, port_index;
1167         __le32 __iomem **port_array;
1168         struct xhci_bus_state *bus_state;
1169         u32 temp;
1170         unsigned long flags;
1171
1172         max_ports = xhci_get_ports(hcd, &port_array);
1173         bus_state = &xhci->bus_state[hcd_index(hcd)];
1174
1175         if (time_before(jiffies, bus_state->next_statechange))
1176                 msleep(5);
1177
1178         spin_lock_irqsave(&xhci->lock, flags);
1179         if (!HCD_HW_ACCESSIBLE(hcd)) {
1180                 spin_unlock_irqrestore(&xhci->lock, flags);
1181                 return -ESHUTDOWN;
1182         }
1183
1184         /* delay the irqs */
1185         temp = readl(&xhci->op_regs->command);
1186         temp &= ~CMD_EIE;
1187         writel(temp, &xhci->op_regs->command);
1188
1189         port_index = max_ports;
1190         while (port_index--) {
1191                 /* Check whether need resume ports. If needed
1192                    resume port and disable remote wakeup */
1193                 u32 temp;
1194                 int slot_id;
1195
1196                 temp = readl(port_array[port_index]);
1197                 if (DEV_SUPERSPEED(temp))
1198                         temp &= ~(PORT_RWC_BITS | PORT_CEC | PORT_WAKE_BITS);
1199                 else
1200                         temp &= ~(PORT_RWC_BITS | PORT_WAKE_BITS);
1201                 if (test_bit(port_index, &bus_state->bus_suspended) &&
1202                     (temp & PORT_PLS_MASK)) {
1203                         if (DEV_SUPERSPEED(temp)) {
1204                                 xhci_set_link_state(xhci, port_array,
1205                                                         port_index, XDEV_U0);
1206                         } else {
1207                                 xhci_set_link_state(xhci, port_array,
1208                                                 port_index, XDEV_RESUME);
1209
1210                                 spin_unlock_irqrestore(&xhci->lock, flags);
1211                                 msleep(20);
1212                                 spin_lock_irqsave(&xhci->lock, flags);
1213
1214                                 xhci_set_link_state(xhci, port_array,
1215                                                         port_index, XDEV_U0);
1216                         }
1217                         /* wait for the port to enter U0 and report port link
1218                          * state change.
1219                          */
1220                         spin_unlock_irqrestore(&xhci->lock, flags);
1221                         msleep(20);
1222                         spin_lock_irqsave(&xhci->lock, flags);
1223
1224                         /* Clear PLC */
1225                         xhci_test_and_clear_bit(xhci, port_array, port_index,
1226                                                 PORT_PLC);
1227
1228                         slot_id = xhci_find_slot_id_by_port(hcd,
1229                                         xhci, port_index + 1);
1230                         if (slot_id)
1231                                 xhci_ring_device(xhci, slot_id);
1232                 } else
1233                         writel(temp, port_array[port_index]);
1234         }
1235
1236         (void) readl(&xhci->op_regs->command);
1237
1238         bus_state->next_statechange = jiffies + msecs_to_jiffies(5);
1239         /* re-enable irqs */
1240         temp = readl(&xhci->op_regs->command);
1241         temp |= CMD_EIE;
1242         writel(temp, &xhci->op_regs->command);
1243         temp = readl(&xhci->op_regs->command);
1244
1245         spin_unlock_irqrestore(&xhci->lock, flags);
1246         return 0;
1247 }
1248
1249 #endif  /* CONFIG_PM */