drivers/video/mxc/ldb.c

   1 /*
   2  * Copyright (C) 2012-2013 Freescale Semiconductor, Inc. All Rights Reserved.
   3  */
   4
   5 /*
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15
  16  * You should have received a copy of the GNU General Public License along
  17  * with this program; if not, write to the Free Software Foundation, Inc.,
  18  * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  19  */
  20
  21 /*!
  22  * @file mxc_ldb.c
  23  *
  24  * @brief This file contains the LDB driver device interface and fops
  25  * functions.
  26  */
  27 #include <linux/types.h>
  28 #include <linux/init.h>
  29 #include <linux/module.h>
  30 #include <linux/platform_device.h>
  31 #include <linux/err.h>
  32 #include <linux/clk.h>
  33 #include <linux/console.h>
  34 #include <linux/io.h>
  35 #include <linux/ipu.h>
  36 #include <linux/mxcfb.h>
  37 #include <linux/regulator/consumer.h>
  38 #include <linux/spinlock.h>
  39 #include <linux/of_device.h>
  40 #include <linux/mod_devicetable.h>
  41 #include <video/of_display_timing.h>
  42 #include <video/of_videomode.h>
  43 #include <video/videomode.h>
  44
  45 #include "mxc_dispdrv.h"
  46
  47 #define DISPDRV_LDB     "ldb"
  48
  49 #define LDB_BGREF_RMODE_MASK            0x00008000
  50 #define LDB_BGREF_RMODE_INT             0x00008000
  51 #define LDB_BGREF_RMODE_EXT             0x0
  52
  53 #define LDB_DI1_VS_POL_MASK             0x00000400
  54 #define LDB_DI1_VS_POL_ACT_LOW          0x00000400
  55 #define LDB_DI1_VS_POL_ACT_HIGH         0x0
  56 #define LDB_DI0_VS_POL_MASK             0x00000200
  57 #define LDB_DI0_VS_POL_ACT_LOW          0x00000200
  58 #define LDB_DI0_VS_POL_ACT_HIGH         0x0
  59
  60 #define LDB_BIT_MAP_CH1_MASK            0x00000100
  61 #define LDB_BIT_MAP_CH1_JEIDA           0x00000100
  62 #define LDB_BIT_MAP_CH1_SPWG            0x0
  63 #define LDB_BIT_MAP_CH0_MASK            0x00000040
  64 #define LDB_BIT_MAP_CH0_JEIDA           0x00000040
  65 #define LDB_BIT_MAP_CH0_SPWG            0x0
  66
  67 #define LDB_DATA_WIDTH_CH1_MASK         0x00000080
  68 #define LDB_DATA_WIDTH_CH1_24           0x00000080
  69 #define LDB_DATA_WIDTH_CH1_18           0x0
  70 #define LDB_DATA_WIDTH_CH0_MASK         0x00000020
  71 #define LDB_DATA_WIDTH_CH0_24           0x00000020
  72 #define LDB_DATA_WIDTH_CH0_18           0x0
  73
  74 #define LDB_CH1_MODE_MASK               0x0000000C
  75 #define LDB_CH1_MODE_EN_TO_DI1          0x0000000C
  76 #define LDB_CH1_MODE_EN_TO_DI0          0x00000004
  77 #define LDB_CH1_MODE_DISABLE            0x0
  78 #define LDB_CH0_MODE_MASK               0x00000003
  79 #define LDB_CH0_MODE_EN_TO_DI1          0x00000003
  80 #define LDB_CH0_MODE_EN_TO_DI0          0x00000001
  81 #define LDB_CH0_MODE_DISABLE            0x0
  82
  83 #define LDB_SPLIT_MODE_EN               0x00000010
  84
  85 enum {
  86         IMX6_LDB,
  87 };
  88
  89 enum {
  90         LDB_IMX6 = 1,
  91 };
  92
  93 struct fsl_mxc_ldb_platform_data {
  94         int devtype;
  95         u32 ext_ref;
  96 #define LDB_SPL_DI0     1
  97 #define LDB_SPL_DI1     2
  98 #define LDB_DUL_DI0     3
  99 #define LDB_DUL_DI1     4
 100 #define LDB_SIN0        5
 101 #define LDB_SIN1        6
 102 #define LDB_SEP0        7
 103 #define LDB_SEP1        8
 104         int mode;
 105         int ipu_id;
 106         int disp_id;
 107
 108         /*only work for separate mode*/
 109         int sec_ipu_id;
 110         int sec_disp_id;
 111 };
 112
 113 struct ldb_data {
 114         struct platform_device *pdev;
 115         struct mxc_dispdrv_handle *disp_ldb;
 116         uint32_t *reg;
 117         uint32_t *control_reg;
 118         uint32_t *gpr3_reg;
 119         uint32_t control_reg_data;
 120         struct regulator *lvds_bg_reg;
 121         int mode;
 122         bool inited;
 123         struct ldb_setting {
 124                 struct clk *di_clk;
 125                 struct clk *ldb_di_clk;
 126                 struct clk *div_3_5_clk;
 127                 struct clk *div_7_clk;
 128                 struct clk *div_sel_clk;
 129                 bool active;
 130                 bool clk_en;
 131                 int ipu;
 132                 int di;
 133                 uint32_t ch_mask;
 134                 uint32_t ch_val;
 135         } setting[2];
 136         struct notifier_block nb;
 137 };
 138
 139 static int g_ldb_mode;
 140
 141 static struct fb_videomode ldb_modedb[] = {
 142         {
 143          "LDB-WXGA", 60, 1280, 800, 14065,
 144          40, 40,
 145          10, 3,
 146          80, 10,
 147          0,
 148          FB_VMODE_NONINTERLACED,
 149          FB_MODE_IS_DETAILED,},
 150         {
 151          "LDB-XGA", 60, 1024, 768, 15385,
 152          220, 40,
 153          21, 7,
 154          60, 10,
 155          0,
 156          FB_VMODE_NONINTERLACED,
 157          FB_MODE_IS_DETAILED,},
 158         {
 159          "LDB-1080P60", 60, 1920, 1080, 7692,
 160          100, 40,
 161          30, 3,
 162          10, 2,
 163          0,
 164          FB_VMODE_NONINTERLACED,
 165          FB_MODE_IS_DETAILED,},
 166 };
 167 static int ldb_modedb_sz = ARRAY_SIZE(ldb_modedb);
 168
 169 static inline int is_imx6_ldb(struct fsl_mxc_ldb_platform_data *plat_data)
 170 {
 171         return (plat_data->devtype == LDB_IMX6);
 172 }
 173
 174 static int bits_per_pixel(int pixel_fmt)
 175 {
 176         switch (pixel_fmt) {
 177         case IPU_PIX_FMT_BGR24:
 178         case IPU_PIX_FMT_RGB24:
 179                 return 24;
 180                 break;
 181         case IPU_PIX_FMT_BGR666:
 182         case IPU_PIX_FMT_RGB666:
 183         case IPU_PIX_FMT_LVDS666:
 184                 return 18;
 185                 break;
 186         default:
 187                 break;
 188         }
 189         return 0;
 190 }
 191
 192 static int valid_mode(int pixel_fmt)
 193 {
 194         return ((pixel_fmt == IPU_PIX_FMT_RGB24) ||
 195                 (pixel_fmt == IPU_PIX_FMT_BGR24) ||
 196                 (pixel_fmt == IPU_PIX_FMT_LVDS666) ||
 197                 (pixel_fmt == IPU_PIX_FMT_RGB666) ||
 198                 (pixel_fmt == IPU_PIX_FMT_BGR666));
 199 }
 200
 201 static int parse_ldb_mode(char *mode)
 202 {
 203         int ldb_mode;
 204
 205         if (!strcmp(mode, "spl0"))
 206                 ldb_mode = LDB_SPL_DI0;
 207         else if (!strcmp(mode, "spl1"))
 208                 ldb_mode = LDB_SPL_DI1;
 209         else if (!strcmp(mode, "dul0"))
 210                 ldb_mode = LDB_DUL_DI0;
 211         else if (!strcmp(mode, "dul1"))
 212                 ldb_mode = LDB_DUL_DI1;
 213         else if (!strcmp(mode, "sin0"))
 214                 ldb_mode = LDB_SIN0;
 215         else if (!strcmp(mode, "sin1"))
 216                 ldb_mode = LDB_SIN1;
 217         else if (!strcmp(mode, "sep0"))
 218                 ldb_mode = LDB_SEP0;
 219         else if (!strcmp(mode, "sep1"))
 220                 ldb_mode = LDB_SEP1;
 221         else
 222                 ldb_mode = -EINVAL;
 223
 224         return ldb_mode;
 225 }
 226
 227 #ifndef MODULE
 228 /*
 229  *    "ldb=spl0/1"       --      split mode on DI0/1
 230  *    "ldb=dul0/1"       --      dual mode on DI0/1
 231  *    "ldb=sin0/1"       --      single mode on LVDS0/1
 232  *    "ldb=sep0/1"       --      separate mode begin from LVDS0/1
 233  *
 234  *    there are two LVDS channels(LVDS0 and LVDS1) which can transfer video
 235  *    datas, there two channels can be used as split/dual/single/separate mode.
 236  *
 237  *    split mode means display data from DI0 or DI1 will send to both channels
 238  *    LVDS0+LVDS1.
 239  *    dual mode means display data from DI0 or DI1 will be duplicated on LVDS0
 240  *    and LVDS1, it said, LVDS0 and LVDS1 has the same content.
 241  *    single mode means only work for DI0/DI1->LVDS0 or DI0/DI1->LVDS1.
 242  *    separate mode means you can make DI0/DI1->LVDS0 and DI0/DI1->LVDS1 work
 243  *    at the same time.
 244  */
 245 static int __init ldb_setup(char *options)
 246 {
 247         g_ldb_mode = parse_ldb_mode(options);
 248         return (g_ldb_mode < 0) ? 0 : 1;
 249 }
 250 __setup("ldb=", ldb_setup);
 251 #endif
 252
 253 static int ldb_get_of_property(struct platform_device *pdev,
 254                                 struct fsl_mxc_ldb_platform_data *plat_data)
 255 {
 256         struct device_node *np = pdev->dev.of_node;
 257         int err;
 258         u32 ipu_id, disp_id;
 259         u32 sec_ipu_id, sec_disp_id;
 260         char *mode;
 261         u32 ext_ref;
 262
 263         err = of_property_read_string(np, "mode", (const char **)&mode);
 264         if (err) {
 265                 dev_err(&pdev->dev, "get of property mode fail\n");
 266                 return err;
 267         }
 268         err = of_property_read_u32(np, "ext_ref", &ext_ref);
 269         if (err) {
 270                 dev_err(&pdev->dev, "get of property ext_ref fail\n");
 271                 return err;
 272         }
 273         err = of_property_read_u32(np, "ipu_id", &ipu_id);
 274         if (err) {
 275                 dev_err(&pdev->dev, "get of property ipu_id fail\n");
 276                 return err;
 277         }
 278         err = of_property_read_u32(np, "disp_id", &disp_id);
 279         if (err) {
 280                 dev_err(&pdev->dev, "get of property disp_id fail\n");
 281                 return err;
 282         }
 283         err = of_property_read_u32(np, "sec_ipu_id", &sec_ipu_id);
 284         if (err) {
 285                 dev_err(&pdev->dev, "get of property sec_ipu_id fail\n");
 286                 return err;
 287         }
 288         err = of_property_read_u32(np, "sec_disp_id", &sec_disp_id);
 289         if (err) {
 290                 dev_err(&pdev->dev, "get of property sec_disp_id fail\n");
 291                 return err;
 292         }
 293
 294         if (of_display_timings_exist(np) == 1) {
 295                 struct videomode vm = { };
 296
 297                 err = of_get_videomode(np, &vm, OF_USE_NATIVE_MODE);
 298                 if (err == 0) {
 299                         fb_videomode_from_videomode(&vm, &ldb_modedb[0]);
 300                         ldb_modedb_sz = 1;
 301                 }
 302         }
 303
 304         plat_data->mode = parse_ldb_mode(mode);
 305         plat_data->ext_ref = ext_ref;
 306         plat_data->ipu_id = ipu_id;
 307         plat_data->disp_id = disp_id;
 308         plat_data->sec_ipu_id = sec_ipu_id;
 309         plat_data->sec_disp_id = sec_disp_id;
 310
 311         return err;
 312 }
 313
 314 static int find_ldb_setting(struct ldb_data *ldb, struct fb_info *fbi)
 315 {
 316         char *id_di[] = {
 317                  "DISP3 BG",
 318                  "DISP3 BG - DI1",
 319                 };
 320         char id[16];
 321         int i;
 322
 323         for (i = 0; i < ARRAY_SIZE(id_di); i++) {
 324                 if (ldb->setting[i].active) {
 325                         strlcpy(id, id_di[ldb->setting[i].di], sizeof(id));
 326                         id[4] += ldb->setting[i].ipu;
 327                         if (!strcmp(id, fbi->fix.id))
 328                                 return i;
 329                 }
 330         }
 331         return -EINVAL;
 332 }
 333
 334 static int ldb_disp_setup(struct mxc_dispdrv_handle *disp, struct fb_info *fbi)
 335 {
 336         uint32_t reg, val;
 337         uint32_t pixel_clk, rounded_pixel_clk;
 338         struct clk *ldb_clk_parent;
 339         struct ldb_data *ldb = mxc_dispdrv_getdata(disp);
 340         int setting_idx, di;
 341         int ret;
 342
 343         setting_idx = find_ldb_setting(ldb, fbi);
 344         if (setting_idx < 0)
 345                 return setting_idx;
 346
 347         di = ldb->setting[setting_idx].di;
 348
 349         /* restore channel mode setting */
 350         val = readl(ldb->control_reg);
 351         val |= ldb->setting[setting_idx].ch_val;
 352         writel(val, ldb->control_reg);
 353         dev_dbg(&ldb->pdev->dev, "LDB setup, control reg: 0x%08x\n",
 354                         readl(ldb->control_reg));
 355
 356         /* vsync setup */
 357         reg = readl(ldb->control_reg);
 358         if (fbi->var.sync & FB_SYNC_VERT_HIGH_ACT) {
 359                 if (di == 0)
 360                         reg = (reg & ~LDB_DI0_VS_POL_MASK)
 361                                 | LDB_DI0_VS_POL_ACT_HIGH;
 362                 else
 363                         reg = (reg & ~LDB_DI1_VS_POL_MASK)
 364                                 | LDB_DI1_VS_POL_ACT_HIGH;
 365         } else {
 366                 if (di == 0)
 367                         reg = (reg & ~LDB_DI0_VS_POL_MASK)
 368                                 | LDB_DI0_VS_POL_ACT_LOW;
 369                 else
 370                         reg = (reg & ~LDB_DI1_VS_POL_MASK)
 371                                 | LDB_DI1_VS_POL_ACT_LOW;
 372         }
 373         writel(reg, ldb->control_reg);
 374
 375         /* clk setup */
 376         if (ldb->setting[setting_idx].clk_en)
 377                  clk_disable_unprepare(ldb->setting[setting_idx].ldb_di_clk);
 378         pixel_clk = (PICOS2KHZ(fbi->var.pixclock)) * 1000UL;
 379         ldb_clk_parent = clk_get_parent(ldb->setting[setting_idx].ldb_di_clk);
 380         if (IS_ERR(ldb_clk_parent)) {
 381                 dev_err(&ldb->pdev->dev, "get ldb di parent clk fail\n");
 382                 return PTR_ERR(ldb_clk_parent);
 383         }
 384         if ((ldb->mode == LDB_SPL_DI0) || (ldb->mode == LDB_SPL_DI1))
 385                 ret = clk_set_rate(ldb_clk_parent, pixel_clk * 7 / 2);
 386         else
 387                 ret = clk_set_rate(ldb_clk_parent, pixel_clk * 7);
 388         if (ret < 0) {
 389                 dev_err(&ldb->pdev->dev, "set ldb parent clk fail:%d\n", ret);
 390                 return ret;
 391         }
 392         rounded_pixel_clk = clk_round_rate(ldb->setting[setting_idx].ldb_di_clk,
 393                                                 pixel_clk);
 394         dev_dbg(&ldb->pdev->dev, "pixel_clk:%d, rounded_pixel_clk:%d\n",
 395                         pixel_clk, rounded_pixel_clk);
 396         ret = clk_set_rate(ldb->setting[setting_idx].ldb_di_clk,
 397                                 rounded_pixel_clk);
 398         if (ret < 0) {
 399                 dev_err(&ldb->pdev->dev, "set ldb di clk fail:%d\n", ret);
 400                 return ret;
 401         }
 402         ret = clk_prepare_enable(ldb->setting[setting_idx].ldb_di_clk);
 403         if (ret < 0) {
 404                 dev_err(&ldb->pdev->dev, "enable ldb di clk fail:%d\n", ret);
 405                 return ret;
 406         }
 407
 408         if (!ldb->setting[setting_idx].clk_en)
 409                 ldb->setting[setting_idx].clk_en = true;
 410
 411         return 0;
 412 }
 413
 414 int ldb_fb_event(struct notifier_block *nb, unsigned long val, void *v)
 415 {
 416         struct ldb_data *ldb = container_of(nb, struct ldb_data, nb);
 417         struct fb_event *event = v;
 418         struct fb_info *fbi = event->info;
 419         int index;
 420         uint32_t data;
 421
 422         index = find_ldb_setting(ldb, fbi);
 423         if (index < 0)
 424                 return 0;
 425
 426         fbi->mode = (struct fb_videomode *)fb_match_mode(&fbi->var,
 427                         &fbi->modelist);
 428
 429         if (!fbi->mode) {
 430                 dev_warn(&ldb->pdev->dev,
 431                                 "LDB: can not find mode for xres=%d, yres=%d\n",
 432                                 fbi->var.xres, fbi->var.yres);
 433                 if (ldb->setting[index].clk_en) {
 434                         clk_disable(ldb->setting[index].ldb_di_clk);
 435                         ldb->setting[index].clk_en = false;
 436                         data = readl(ldb->control_reg);
 437                         data &= ~ldb->setting[index].ch_mask;
 438                         writel(data, ldb->control_reg);
 439                 }
 440                 return 0;
 441         }
 442
 443         switch (val) {
 444         case FB_EVENT_BLANK:
 445         {
 446                 if (*((int *)event->data) == FB_BLANK_UNBLANK) {
 447                         if (!ldb->setting[index].clk_en) {
 448                                 clk_enable(ldb->setting[index].ldb_di_clk);
 449                                 ldb->setting[index].clk_en = true;
 450                         }
 451                 } else {
 452                         if (ldb->setting[index].clk_en) {
 453                                 clk_disable(ldb->setting[index].ldb_di_clk);
 454                                 ldb->setting[index].clk_en = false;
 455                                 data = readl(ldb->control_reg);
 456                                 data &= ~ldb->setting[index].ch_mask;
 457                                 writel(data, ldb->control_reg);
 458                                 dev_dbg(&ldb->pdev->dev,
 459                                         "LDB blank, control reg: 0x%08x\n",
 460                                                 readl(ldb->control_reg));
 461                         }
 462                 }
 463                 break;
 464         }
 465         case FB_EVENT_SUSPEND:
 466                 if (ldb->setting[index].clk_en) {
 467                         clk_disable(ldb->setting[index].ldb_di_clk);
 468                         ldb->setting[index].clk_en = false;
 469                 }
 470                 break;
 471         default:
 472                 break;
 473         }
 474         return 0;
 475 }
 476
 477 #define LVDS_MUX_CTL_WIDTH      2
 478 #define LVDS_MUX_CTL_MASK       3
 479 #define LVDS0_MUX_CTL_OFFS      6
 480 #define LVDS1_MUX_CTL_OFFS      8
 481 #define LVDS0_MUX_CTL_MASK      (LVDS_MUX_CTL_MASK << 6)
 482 #define LVDS1_MUX_CTL_MASK      (LVDS_MUX_CTL_MASK << 8)
 483 #define ROUTE_IPU_DI(ipu, di)   (((ipu << 1) | di) & LVDS_MUX_CTL_MASK)
 484 static int ldb_ipu_ldb_route(int ipu, int di, struct ldb_data *ldb)
 485 {
 486         uint32_t reg;
 487         int channel;
 488         int shift;
 489         int mode = ldb->mode;
 490
 491         reg = readl(ldb->gpr3_reg);
 492         if (mode < LDB_SIN0) {
 493                 reg &= ~(LVDS0_MUX_CTL_MASK | LVDS1_MUX_CTL_MASK);
 494                 reg |= (ROUTE_IPU_DI(ipu, di) << LVDS0_MUX_CTL_OFFS) |
 495                         (ROUTE_IPU_DI(ipu, di) << LVDS1_MUX_CTL_OFFS);
 496                 dev_dbg(&ldb->pdev->dev,
 497                         "Dual/Split mode both channels route to IPU%d-DI%d\n",
 498                         ipu, di);
 499         } else if ((mode == LDB_SIN0) || (mode == LDB_SIN1)) {
 500                 reg &= ~(LVDS0_MUX_CTL_MASK | LVDS1_MUX_CTL_MASK);
 501                 channel = mode - LDB_SIN0;
 502                 shift = LVDS0_MUX_CTL_OFFS + channel * LVDS_MUX_CTL_WIDTH;
 503                 reg |= ROUTE_IPU_DI(ipu, di) << shift;
 504                 dev_dbg(&ldb->pdev->dev,
 505                         "Single mode channel %d route to IPU%d-DI%d\n",
 506                                 channel, ipu, di);
 507         } else {
 508                 static bool first = true;
 509
 510                 if (first) {
 511                         if (mode == LDB_SEP0) {
 512                                 reg &= ~LVDS0_MUX_CTL_MASK;
 513                                 channel = 0;
 514                         } else {
 515                                 reg &= ~LVDS1_MUX_CTL_MASK;
 516                                 channel = 1;
 517                         }
 518                         first = false;
 519                 } else {
 520                         if (mode == LDB_SEP0) {
 521                                 reg &= ~LVDS1_MUX_CTL_MASK;
 522                                 channel = 1;
 523                         } else {
 524                                 reg &= ~LVDS0_MUX_CTL_MASK;
 525                                 channel = 0;
 526                         }
 527                 }
 528
 529                 shift = LVDS0_MUX_CTL_OFFS + channel * LVDS_MUX_CTL_WIDTH;
 530                 reg |= ROUTE_IPU_DI(ipu, di) << shift;
 531
 532                 dev_dbg(&ldb->pdev->dev,
 533                         "Separate mode channel %d route to IPU%d-DI%d\n",
 534                         channel, ipu, di);
 535         }
 536         writel(reg, ldb->gpr3_reg);
 537
 538         return 0;
 539 }
 540
 541 static int ldb_disp_init(struct mxc_dispdrv_handle *disp,
 542         struct mxc_dispdrv_setting *setting)
 543 {
 544         int ret = 0, i, lvds_channel = 0;
 545         struct ldb_data *ldb = mxc_dispdrv_getdata(disp);
 546         struct fsl_mxc_ldb_platform_data *plat_data = ldb->pdev->dev.platform_data;
 547         struct resource *res;
 548         uint32_t reg, setting_idx;
 549         uint32_t ch_mask = 0, ch_val = 0;
 550         uint32_t ipu_id, disp_id;
 551         char di_clk[] = "ipu1_di0_sel";
 552         char ldb_clk[] = "ldb_di0";
 553         char div_3_5_clk[] = "di0_div_3_5";
 554         char div_7_clk[] = "di0_div_7";
 555         char div_sel_clk[] = "di0_div_sel";
 556
 557         /* if input format not valid, make RGB666 as default*/
 558         if (!valid_mode(setting->if_fmt)) {
 559                 dev_warn(&ldb->pdev->dev, "Input pixel format not valid"
 560                                         " use default RGB666\n");
 561                 setting->if_fmt = IPU_PIX_FMT_RGB666;
 562         }
 563
 564         if (!ldb->inited) {
 565                 setting_idx = 0;
 566                 res = platform_get_resource(ldb->pdev, IORESOURCE_MEM, 0);
 567                 if (!res) {
 568                         dev_err(&ldb->pdev->dev, "get iomem fail.\n");
 569                         return -ENOMEM;
 570                 }
 571
 572                 ldb->reg = devm_ioremap(&ldb->pdev->dev, res->start,
 573                                         resource_size(res));
 574                 ldb->control_reg = ldb->reg + 2;
 575                 ldb->gpr3_reg = ldb->reg + 3;
 576
 577                 /* ipu selected by platform data setting */
 578                 setting->dev_id = plat_data->ipu_id;
 579
 580                 reg = readl(ldb->control_reg);
 581
 582                 /* refrence resistor select */
 583                 reg &= ~LDB_BGREF_RMODE_MASK;
 584                 if (plat_data->ext_ref)
 585                         reg |= LDB_BGREF_RMODE_EXT;
 586                 else
 587                         reg |= LDB_BGREF_RMODE_INT;
 588
 589                 /* TODO: now only use SPWG data mapping for both channel */
 590                 reg &= ~(LDB_BIT_MAP_CH0_MASK | LDB_BIT_MAP_CH1_MASK);
 591                 reg |= LDB_BIT_MAP_CH0_SPWG | LDB_BIT_MAP_CH1_SPWG;
 592
 593                 /* channel mode setting */
 594                 reg &= ~(LDB_CH0_MODE_MASK | LDB_CH1_MODE_MASK);
 595                 reg &= ~(LDB_DATA_WIDTH_CH0_MASK | LDB_DATA_WIDTH_CH1_MASK);
 596
 597                 if (bits_per_pixel(setting->if_fmt) == 24)
 598                         reg |= LDB_DATA_WIDTH_CH0_24 | LDB_DATA_WIDTH_CH1_24;
 599                 else
 600                         reg |= LDB_DATA_WIDTH_CH0_18 | LDB_DATA_WIDTH_CH1_18;
 601
 602                 if (g_ldb_mode >= LDB_SPL_DI0)
 603                         ldb->mode = g_ldb_mode;
 604                 else
 605                         ldb->mode = plat_data->mode;
 606
 607                 if ((ldb->mode == LDB_SIN0) || (ldb->mode == LDB_SIN1)) {
 608                         ret = ldb->mode - LDB_SIN0;
 609                         if (plat_data->disp_id != ret) {
 610                                 dev_warn(&ldb->pdev->dev,
 611                                         "change IPU DI%d to IPU DI%d for LDB "
 612                                         "channel%d.\n",
 613                                         plat_data->disp_id, ret, ret);
 614                                 plat_data->disp_id = ret;
 615                         }
 616                 } else if (((ldb->mode == LDB_SEP0) || (ldb->mode == LDB_SEP1))
 617                                 && is_imx6_ldb(plat_data)) {
 618                         if (plat_data->disp_id == plat_data->sec_disp_id) {
 619                                 dev_err(&ldb->pdev->dev,
 620                                         "For LVDS separate mode,"
 621                                         "two DIs should be different!\n");
 622                                 return -EINVAL;
 623                         }
 624
 625                         if (((!plat_data->disp_id) && (ldb->mode == LDB_SEP1))
 626                                 || ((plat_data->disp_id) &&
 627                                         (ldb->mode == LDB_SEP0))) {
 628                                 dev_dbg(&ldb->pdev->dev,
 629                                         "LVDS separate mode:"
 630                                         "swap DI configuration!\n");
 631                                 ipu_id = plat_data->ipu_id;
 632                                 disp_id = plat_data->disp_id;
 633                                 plat_data->ipu_id = plat_data->sec_ipu_id;
 634                                 plat_data->disp_id = plat_data->sec_disp_id;
 635                                 plat_data->sec_ipu_id = ipu_id;
 636                                 plat_data->sec_disp_id = disp_id;
 637                         }
 638                 }
 639
 640                 if (ldb->mode == LDB_SPL_DI0) {
 641                         reg |= LDB_SPLIT_MODE_EN | LDB_CH0_MODE_EN_TO_DI0
 642                                 | LDB_CH1_MODE_EN_TO_DI0;
 643                         setting->disp_id = 0;
 644                 } else if (ldb->mode == LDB_SPL_DI1) {
 645                         reg |= LDB_SPLIT_MODE_EN | LDB_CH0_MODE_EN_TO_DI1
 646                                 | LDB_CH1_MODE_EN_TO_DI1;
 647                         setting->disp_id = 1;
 648                 } else if (ldb->mode == LDB_DUL_DI0) {
 649                         reg &= ~LDB_SPLIT_MODE_EN;
 650                         reg |= LDB_CH0_MODE_EN_TO_DI0 | LDB_CH1_MODE_EN_TO_DI0;
 651                         setting->disp_id = 0;
 652                 } else if (ldb->mode == LDB_DUL_DI1) {
 653                         reg &= ~LDB_SPLIT_MODE_EN;
 654                         reg |= LDB_CH0_MODE_EN_TO_DI1 | LDB_CH1_MODE_EN_TO_DI1;
 655                         setting->disp_id = 1;
 656                 } else if (ldb->mode == LDB_SIN0) {
 657                         reg &= ~LDB_SPLIT_MODE_EN;
 658                         setting->disp_id = plat_data->disp_id;
 659                         if (setting->disp_id == 0)
 660                                 reg |= LDB_CH0_MODE_EN_TO_DI0;
 661                         else
 662                                 reg |= LDB_CH0_MODE_EN_TO_DI1;
 663                         ch_mask = LDB_CH0_MODE_MASK;
 664                         ch_val = reg & LDB_CH0_MODE_MASK;
 665                 } else if (ldb->mode == LDB_SIN1) {
 666                         reg &= ~LDB_SPLIT_MODE_EN;
 667                         setting->disp_id = plat_data->disp_id;
 668                         if (setting->disp_id == 0)
 669                                 reg |= LDB_CH1_MODE_EN_TO_DI0;
 670                         else
 671                                 reg |= LDB_CH1_MODE_EN_TO_DI1;
 672                         ch_mask = LDB_CH1_MODE_MASK;
 673                         ch_val = reg & LDB_CH1_MODE_MASK;
 674                 } else { /* separate mode*/
 675                         setting->disp_id = plat_data->disp_id;
 676
 677                         /* first output is LVDS0 or LVDS1 */
 678                         if (ldb->mode == LDB_SEP0)
 679                                 lvds_channel = 0;
 680                         else
 681                                 lvds_channel = 1;
 682
 683                         reg &= ~LDB_SPLIT_MODE_EN;
 684
 685                         if ((lvds_channel == 0) && (setting->disp_id == 0))
 686                                 reg |= LDB_CH0_MODE_EN_TO_DI0;
 687                         else if ((lvds_channel == 0) && (setting->disp_id == 1))
 688                                 reg |= LDB_CH0_MODE_EN_TO_DI1;
 689                         else if ((lvds_channel == 1) && (setting->disp_id == 0))
 690                                 reg |= LDB_CH1_MODE_EN_TO_DI0;
 691                         else
 692                                 reg |= LDB_CH1_MODE_EN_TO_DI1;
 693                         ch_mask = lvds_channel ? LDB_CH1_MODE_MASK :
 694                                         LDB_CH0_MODE_MASK;
 695                         ch_val = reg & ch_mask;
 696
 697                         if (bits_per_pixel(setting->if_fmt) == 24) {
 698                                 if (lvds_channel == 0)
 699                                         reg &= ~LDB_DATA_WIDTH_CH1_24;
 700                                 else
 701                                         reg &= ~LDB_DATA_WIDTH_CH0_24;
 702                         } else {
 703                                 if (lvds_channel == 0)
 704                                         reg &= ~LDB_DATA_WIDTH_CH1_18;
 705                                 else
 706                                         reg &= ~LDB_DATA_WIDTH_CH0_18;
 707                         }
 708                 }
 709
 710                 writel(reg, ldb->control_reg);
 711                 if (ldb->mode <  LDB_SIN0) {
 712                         ch_mask = LDB_CH0_MODE_MASK | LDB_CH1_MODE_MASK;
 713                         ch_val = reg & (LDB_CH0_MODE_MASK | LDB_CH1_MODE_MASK);
 714                 }
 715         } else { /* second time for separate mode */
 716                 if ((ldb->mode == LDB_SPL_DI0) ||
 717                         (ldb->mode == LDB_SPL_DI1) ||
 718                         (ldb->mode == LDB_DUL_DI0) ||
 719                         (ldb->mode == LDB_DUL_DI1) ||
 720                         (ldb->mode == LDB_SIN0) ||
 721                         (ldb->mode == LDB_SIN1)) {
 722                         dev_err(&ldb->pdev->dev, "for second ldb disp"
 723                                         "ldb mode should in separate mode\n");
 724                         return -EINVAL;
 725                 }
 726
 727                 setting_idx = 1;
 728                 if (is_imx6_ldb(plat_data)) {
 729                         setting->dev_id = plat_data->sec_ipu_id;
 730                         setting->disp_id = plat_data->sec_disp_id;
 731                 } else {
 732                         setting->dev_id = plat_data->ipu_id;
 733                         setting->disp_id = !plat_data->disp_id;
 734                 }
 735                 if (setting->disp_id == ldb->setting[0].di) {
 736                         dev_err(&ldb->pdev->dev, "Err: for second ldb disp in"
 737                                 "separate mode, DI should be different!\n");
 738                         return -EINVAL;
 739                 }
 740
 741                 /* second output is LVDS0 or LVDS1 */
 742                 if (ldb->mode == LDB_SEP0)
 743                         lvds_channel = 1;
 744                 else
 745                         lvds_channel = 0;
 746
 747                 reg = readl(ldb->control_reg);
 748                 if ((lvds_channel == 0) && (setting->disp_id == 0))
 749                         reg |= LDB_CH0_MODE_EN_TO_DI0;
 750                 else if ((lvds_channel == 0) && (setting->disp_id == 1))
 751                         reg |= LDB_CH0_MODE_EN_TO_DI1;
 752                 else if ((lvds_channel == 1) && (setting->disp_id == 0))
 753                         reg |= LDB_CH1_MODE_EN_TO_DI0;
 754                 else
 755                         reg |= LDB_CH1_MODE_EN_TO_DI1;
 756                 ch_mask = lvds_channel ?  LDB_CH1_MODE_MASK :
 757                                 LDB_CH0_MODE_MASK;
 758                 ch_val = reg & ch_mask;
 759
 760                 if (bits_per_pixel(setting->if_fmt) == 24) {
 761                         if (lvds_channel == 0)
 762                                 reg |= LDB_DATA_WIDTH_CH0_24;
 763                         else
 764                                 reg |= LDB_DATA_WIDTH_CH1_24;
 765                 } else {
 766                         if (lvds_channel == 0)
 767                                 reg |= LDB_DATA_WIDTH_CH0_18;
 768                         else
 769                                 reg |= LDB_DATA_WIDTH_CH1_18;
 770                 }
 771                 writel(reg, ldb->control_reg);
 772         }
 773
 774         /* get clocks */
 775         if (is_imx6_ldb(plat_data) &&
 776                 ((ldb->mode == LDB_SEP0) || (ldb->mode == LDB_SEP1))) {
 777                 ldb_clk[6] += lvds_channel;
 778                 div_3_5_clk[2] += lvds_channel;
 779                 div_7_clk[2] += lvds_channel;
 780                 div_sel_clk[2] += lvds_channel;
 781         } else {
 782                 ldb_clk[6] += setting->disp_id;
 783                 div_3_5_clk[2] += setting->disp_id;
 784                 div_7_clk[2] += setting->disp_id;
 785                 div_sel_clk[2] += setting->disp_id;
 786         }
 787         ldb->setting[setting_idx].ldb_di_clk = clk_get(&ldb->pdev->dev,
 788                                                         ldb_clk);
 789         if (IS_ERR(ldb->setting[setting_idx].ldb_di_clk)) {
 790                 dev_err(&ldb->pdev->dev, "get ldb clk failed\n");
 791                 return PTR_ERR(ldb->setting[setting_idx].ldb_di_clk);
 792         }
 793
 794         ldb->setting[setting_idx].div_3_5_clk = clk_get(&ldb->pdev->dev,
 795                                                         div_3_5_clk);
 796         if (IS_ERR(ldb->setting[setting_idx].div_3_5_clk)) {
 797                 dev_err(&ldb->pdev->dev, "get div 3.5 clk failed\n");
 798                 return PTR_ERR(ldb->setting[setting_idx].div_3_5_clk);
 799         }
 800         ldb->setting[setting_idx].div_7_clk = clk_get(&ldb->pdev->dev,
 801                                                         div_7_clk);
 802         if (IS_ERR(ldb->setting[setting_idx].div_7_clk)) {
 803                 dev_err(&ldb->pdev->dev, "get div 7 clk failed\n");
 804                 return PTR_ERR(ldb->setting[setting_idx].div_7_clk);
 805         }
 806
 807         ldb->setting[setting_idx].div_sel_clk = clk_get(&ldb->pdev->dev,
 808                                                         div_sel_clk);
 809         if (IS_ERR(ldb->setting[setting_idx].div_sel_clk)) {
 810                 dev_err(&ldb->pdev->dev, "get div sel clk failed\n");
 811                 return PTR_ERR(ldb->setting[setting_idx].div_sel_clk);
 812         }
 813
 814         di_clk[3] += setting->dev_id;
 815         di_clk[7] += setting->disp_id;
 816         ldb->setting[setting_idx].di_clk = clk_get(&ldb->pdev->dev,
 817                                                         di_clk);
 818         if (IS_ERR(ldb->setting[setting_idx].di_clk)) {
 819                 dev_err(&ldb->pdev->dev, "get di clk failed\n");
 820                 return PTR_ERR(ldb->setting[setting_idx].di_clk);
 821         }
 822
 823         ldb->setting[setting_idx].ch_mask = ch_mask;
 824         ldb->setting[setting_idx].ch_val = ch_val;
 825
 826         if (is_imx6_ldb(plat_data))
 827                 ldb_ipu_ldb_route(setting->dev_id, setting->disp_id, ldb);
 828
 829         /* must use spec video mode defined by driver */
 830         ret = fb_find_mode(&setting->fbi->var, setting->fbi, setting->dft_mode_str,
 831                                 ldb_modedb, ldb_modedb_sz, NULL, setting->default_bpp);
 832         if (ret != 1)
 833                 fb_videomode_to_var(&setting->fbi->var, &ldb_modedb[0]);
 834
 835         INIT_LIST_HEAD(&setting->fbi->modelist);
 836         for (i = 0; i < ldb_modedb_sz; i++) {
 837                 struct fb_videomode m;
 838                 fb_var_to_videomode(&m, &setting->fbi->var);
 839                 if (fb_mode_is_equal(&m, &ldb_modedb[i])) {
 840                         fb_add_videomode(&ldb_modedb[i],
 841                                         &setting->fbi->modelist);
 842                         break;
 843                 }
 844         }
 845
 846         ldb->setting[setting_idx].ipu = setting->dev_id;
 847         ldb->setting[setting_idx].di = setting->disp_id;
 848
 849         return ret;
 850 }
 851
 852 static int ldb_post_disp_init(struct mxc_dispdrv_handle *disp,
 853                                 int ipu_id, int disp_id)
 854 {
 855         struct ldb_data *ldb = mxc_dispdrv_getdata(disp);
 856         int setting_idx = ldb->inited ? 1 : 0;
 857         int ret = 0;
 858
 859         if (!ldb->inited) {
 860                 ldb->nb.notifier_call = ldb_fb_event;
 861                 fb_register_client(&ldb->nb);
 862         }
 863
 864         ret = clk_set_parent(ldb->setting[setting_idx].di_clk,
 865                         ldb->setting[setting_idx].ldb_di_clk);
 866         if (ret) {
 867                 dev_err(&ldb->pdev->dev, "fail to set ldb_di clk as"
 868                         "the parent of ipu_di clk\n");
 869                 return ret;
 870         }
 871
 872         if ((ldb->mode == LDB_SPL_DI0) || (ldb->mode == LDB_SPL_DI1)) {
 873                 ret = clk_set_parent(ldb->setting[setting_idx].div_sel_clk,
 874                                 ldb->setting[setting_idx].div_3_5_clk);
 875                 if (ret) {
 876                         dev_err(&ldb->pdev->dev, "fail to set div 3.5 clk as"
 877                                 "the parent of div sel clk\n");
 878                         return ret;
 879                 }
 880         } else {
 881                 ret = clk_set_parent(ldb->setting[setting_idx].div_sel_clk,
 882                                 ldb->setting[setting_idx].div_7_clk);
 883                 if (ret) {
 884                         dev_err(&ldb->pdev->dev, "fail to set div 7 clk as"
 885                                 "the parent of div sel clk\n");
 886                         return ret;
 887                 }
 888         }
 889
 890         /* save active ldb setting for fb notifier */
 891         ldb->setting[setting_idx].active = true;
 892
 893         ldb->inited = true;
 894         return ret;
 895 }
 896
 897 static void ldb_disp_deinit(struct mxc_dispdrv_handle *disp)
 898 {
 899         struct ldb_data *ldb = mxc_dispdrv_getdata(disp);
 900         int i;
 901
 902         writel(0, ldb->control_reg);
 903
 904         for (i = 0; i < 2; i++) {
 905                 clk_disable(ldb->setting[i].ldb_di_clk);
 906                 clk_put(ldb->setting[i].ldb_di_clk);
 907                 clk_put(ldb->setting[i].div_3_5_clk);
 908                 clk_put(ldb->setting[i].div_7_clk);
 909                 clk_put(ldb->setting[i].div_sel_clk);
 910         }
 911
 912         fb_unregister_client(&ldb->nb);
 913 }
 914
 915 static struct mxc_dispdrv_driver ldb_drv = {
 916         .name   = DISPDRV_LDB,
 917         .init   = ldb_disp_init,
 918         .post_init = ldb_post_disp_init,
 919         .deinit = ldb_disp_deinit,
 920         .setup = ldb_disp_setup,
 921 };
 922
 923 static int ldb_suspend(struct platform_device *pdev, pm_message_t state)
 924 {
 925         struct ldb_data *ldb = dev_get_drvdata(&pdev->dev);
 926         uint32_t        data;
 927
 928         if (!ldb->inited)
 929                 return 0;
 930         data = readl(ldb->control_reg);
 931         ldb->control_reg_data = data;
 932         data &= ~(LDB_CH0_MODE_MASK | LDB_CH1_MODE_MASK);
 933         writel(data, ldb->control_reg);
 934
 935         return 0;
 936 }
 937
 938 static int ldb_resume(struct platform_device *pdev)
 939 {
 940         struct ldb_data *ldb = dev_get_drvdata(&pdev->dev);
 941
 942         if (!ldb->inited)
 943                 return 0;
 944         writel(ldb->control_reg_data, ldb->control_reg);
 945
 946         return 0;
 947 }
 948
 949 static struct platform_device_id imx_ldb_devtype[] = {
 950         { "ldb-imx6", LDB_IMX6, },
 951         { /* sentinel */ }
 952 };
 953
 954 static const struct of_device_id imx_ldb_dt_ids[] = {
 955         { .compatible = "fsl,imx6q-ldb", .data = &imx_ldb_devtype[IMX6_LDB],},
 956         { /* sentinel */ }
 957 };
 958
 959 /*!
 960  * This function is called by the driver framework to initialize the LDB
 961  * device.
 962  *
 963  * @param       dev     The device structure for the LDB passed in by the
 964  *                      driver framework.
 965  *
 966  * @return      Returns 0 on success or negative error code on error
 967  */
 968 static int ldb_probe(struct platform_device *pdev)
 969 {
 970         int ret = 0;
 971         struct ldb_data *ldb;
 972         struct fsl_mxc_ldb_platform_data *plat_data;
 973         const struct of_device_id *of_id =
 974                         of_match_device(imx_ldb_dt_ids, &pdev->dev);
 975
 976         dev_dbg(&pdev->dev, "%s enter\n", __func__);
 977         ldb = devm_kzalloc(&pdev->dev, sizeof(struct ldb_data), GFP_KERNEL);
 978         if (!ldb)
 979                 return -ENOMEM;
 980
 981         plat_data = devm_kzalloc(&pdev->dev,
 982                                 sizeof(struct fsl_mxc_ldb_platform_data),
 983                                 GFP_KERNEL);
 984         if (!plat_data)
 985                 return -ENOMEM;
 986         pdev->dev.platform_data = plat_data;
 987         if (of_id)
 988                 pdev->id_entry = of_id->data;
 989         plat_data->devtype = pdev->id_entry->driver_data;
 990
 991         ret = ldb_get_of_property(pdev, plat_data);
 992         if (ret < 0) {
 993                 dev_err(&pdev->dev, "get ldb of property fail\n");
 994                 return ret;
 995         }
 996
 997         ldb->pdev = pdev;
 998         ldb->disp_ldb = mxc_dispdrv_register(&ldb_drv);
 999         mxc_dispdrv_setdata(ldb->disp_ldb, ldb);
1000
1001         dev_set_drvdata(&pdev->dev, ldb);
1002
1003         dev_dbg(&pdev->dev, "%s exit\n", __func__);
1004         return ret;
1005 }
1006
1007 static int ldb_remove(struct platform_device *pdev)
1008 {
1009         struct ldb_data *ldb = dev_get_drvdata(&pdev->dev);
1010
1011         if (!ldb->inited)
1012                 return 0;
1013         mxc_dispdrv_puthandle(ldb->disp_ldb);
1014         mxc_dispdrv_unregister(ldb->disp_ldb);
1015         return 0;
1016 }
1017
1018 static struct platform_driver mxcldb_driver = {
1019         .driver = {
1020                 .name = "mxc_ldb",
1021                 .of_match_table = imx_ldb_dt_ids,
1022         },
1023         .probe = ldb_probe,
1024         .remove = ldb_remove,
1025         .suspend = ldb_suspend,
1026         .resume = ldb_resume,
1027 };
1028
1029 static int __init ldb_init(void)
1030 {
1031         return platform_driver_register(&mxcldb_driver);
1032 }
1033
1034 static void __exit ldb_uninit(void)
1035 {
1036         platform_driver_unregister(&mxcldb_driver);
1037 }
1038
1039 module_init(ldb_init);
1040 module_exit(ldb_uninit);
1041
1042 MODULE_AUTHOR("Freescale Semiconductor, Inc.");
1043 MODULE_DESCRIPTION("MXC LDB driver");
1044 MODULE_LICENSE("GPL");