2 * Copyright (C) 2012-2013 Freescale Semiconductor, Inc. All Rights Reserved.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
24 * @brief This file contains the LDB driver device interface and fops
27 #include <linux/types.h>
28 #include <linux/init.h>
29 #include <linux/module.h>
30 #include <linux/platform_device.h>
31 #include <linux/err.h>
32 #include <linux/clk.h>
33 #include <linux/console.h>
35 #include <linux/ipu.h>
36 #include <linux/mxcfb.h>
37 #include <linux/regulator/consumer.h>
38 #include <linux/spinlock.h>
39 #include <linux/of_device.h>
40 #include <linux/mod_devicetable.h>
41 #include <video/of_display_timing.h>
42 #include <video/of_videomode.h>
43 #include <video/videomode.h>
45 #include "mxc_dispdrv.h"
47 #define DISPDRV_LDB "ldb"
49 #define LDB_BGREF_RMODE_MASK 0x00008000
50 #define LDB_BGREF_RMODE_INT 0x00008000
51 #define LDB_BGREF_RMODE_EXT 0x0
53 #define LDB_DI1_VS_POL_MASK 0x00000400
54 #define LDB_DI1_VS_POL_ACT_LOW 0x00000400
55 #define LDB_DI1_VS_POL_ACT_HIGH 0x0
56 #define LDB_DI0_VS_POL_MASK 0x00000200
57 #define LDB_DI0_VS_POL_ACT_LOW 0x00000200
58 #define LDB_DI0_VS_POL_ACT_HIGH 0x0
60 #define LDB_BIT_MAP_CH1_MASK 0x00000100
61 #define LDB_BIT_MAP_CH1_JEIDA 0x00000100
62 #define LDB_BIT_MAP_CH1_SPWG 0x0
63 #define LDB_BIT_MAP_CH0_MASK 0x00000040
64 #define LDB_BIT_MAP_CH0_JEIDA 0x00000040
65 #define LDB_BIT_MAP_CH0_SPWG 0x0
67 #define LDB_DATA_WIDTH_CH1_MASK 0x00000080
68 #define LDB_DATA_WIDTH_CH1_24 0x00000080
69 #define LDB_DATA_WIDTH_CH1_18 0x0
70 #define LDB_DATA_WIDTH_CH0_MASK 0x00000020
71 #define LDB_DATA_WIDTH_CH0_24 0x00000020
72 #define LDB_DATA_WIDTH_CH0_18 0x0
74 #define LDB_CH1_MODE_MASK 0x0000000C
75 #define LDB_CH1_MODE_EN_TO_DI1 0x0000000C
76 #define LDB_CH1_MODE_EN_TO_DI0 0x00000004
77 #define LDB_CH1_MODE_DISABLE 0x0
78 #define LDB_CH0_MODE_MASK 0x00000003
79 #define LDB_CH0_MODE_EN_TO_DI1 0x00000003
80 #define LDB_CH0_MODE_EN_TO_DI0 0x00000001
81 #define LDB_CH0_MODE_DISABLE 0x0
83 #define LDB_SPLIT_MODE_EN 0x00000010
93 struct fsl_mxc_ldb_platform_data {
108 /*only work for separate mode*/
114 struct platform_device *pdev;
115 struct mxc_dispdrv_handle *disp_ldb;
117 uint32_t *control_reg;
119 uint32_t control_reg_data;
120 struct regulator *lvds_bg_reg;
125 struct clk *ldb_di_clk;
126 struct clk *div_3_5_clk;
127 struct clk *div_7_clk;
128 struct clk *div_sel_clk;
136 struct notifier_block nb;
139 static int g_ldb_mode;
141 static struct fb_videomode ldb_modedb[] = {
143 "LDB-WXGA", 60, 1280, 800, 14065,
148 FB_VMODE_NONINTERLACED,
149 FB_MODE_IS_DETAILED,},
151 "LDB-XGA", 60, 1024, 768, 15385,
156 FB_VMODE_NONINTERLACED,
157 FB_MODE_IS_DETAILED,},
159 "LDB-1080P60", 60, 1920, 1080, 7692,
164 FB_VMODE_NONINTERLACED,
165 FB_MODE_IS_DETAILED,},
167 static int ldb_modedb_sz = ARRAY_SIZE(ldb_modedb);
169 static inline int is_imx6_ldb(struct fsl_mxc_ldb_platform_data *plat_data)
171 return (plat_data->devtype == LDB_IMX6);
174 static int bits_per_pixel(int pixel_fmt)
177 case IPU_PIX_FMT_BGR24:
178 case IPU_PIX_FMT_RGB24:
181 case IPU_PIX_FMT_BGR666:
182 case IPU_PIX_FMT_RGB666:
183 case IPU_PIX_FMT_LVDS666:
192 static int valid_mode(int pixel_fmt)
194 return ((pixel_fmt == IPU_PIX_FMT_RGB24) ||
195 (pixel_fmt == IPU_PIX_FMT_BGR24) ||
196 (pixel_fmt == IPU_PIX_FMT_LVDS666) ||
197 (pixel_fmt == IPU_PIX_FMT_RGB666) ||
198 (pixel_fmt == IPU_PIX_FMT_BGR666));
201 static int parse_ldb_mode(char *mode)
205 if (!strcmp(mode, "spl0"))
206 ldb_mode = LDB_SPL_DI0;
207 else if (!strcmp(mode, "spl1"))
208 ldb_mode = LDB_SPL_DI1;
209 else if (!strcmp(mode, "dul0"))
210 ldb_mode = LDB_DUL_DI0;
211 else if (!strcmp(mode, "dul1"))
212 ldb_mode = LDB_DUL_DI1;
213 else if (!strcmp(mode, "sin0"))
215 else if (!strcmp(mode, "sin1"))
217 else if (!strcmp(mode, "sep0"))
219 else if (!strcmp(mode, "sep1"))
229 * "ldb=spl0/1" -- split mode on DI0/1
230 * "ldb=dul0/1" -- dual mode on DI0/1
231 * "ldb=sin0/1" -- single mode on LVDS0/1
232 * "ldb=sep0/1" -- separate mode begin from LVDS0/1
234 * there are two LVDS channels(LVDS0 and LVDS1) which can transfer video
235 * datas, there two channels can be used as split/dual/single/separate mode.
237 * split mode means display data from DI0 or DI1 will send to both channels
239 * dual mode means display data from DI0 or DI1 will be duplicated on LVDS0
240 * and LVDS1, it said, LVDS0 and LVDS1 has the same content.
241 * single mode means only work for DI0/DI1->LVDS0 or DI0/DI1->LVDS1.
242 * separate mode means you can make DI0/DI1->LVDS0 and DI0/DI1->LVDS1 work
245 static int __init ldb_setup(char *options)
247 g_ldb_mode = parse_ldb_mode(options);
248 return (g_ldb_mode < 0) ? 0 : 1;
250 __setup("ldb=", ldb_setup);
253 static int ldb_get_of_property(struct platform_device *pdev,
254 struct fsl_mxc_ldb_platform_data *plat_data)
256 struct device_node *np = pdev->dev.of_node;
259 u32 sec_ipu_id, sec_disp_id;
263 err = of_property_read_string(np, "mode", (const char **)&mode);
265 dev_err(&pdev->dev, "get of property mode fail\n");
268 err = of_property_read_u32(np, "ext_ref", &ext_ref);
270 dev_err(&pdev->dev, "get of property ext_ref fail\n");
273 err = of_property_read_u32(np, "ipu_id", &ipu_id);
275 dev_err(&pdev->dev, "get of property ipu_id fail\n");
278 err = of_property_read_u32(np, "disp_id", &disp_id);
280 dev_err(&pdev->dev, "get of property disp_id fail\n");
283 err = of_property_read_u32(np, "sec_ipu_id", &sec_ipu_id);
285 dev_err(&pdev->dev, "get of property sec_ipu_id fail\n");
288 err = of_property_read_u32(np, "sec_disp_id", &sec_disp_id);
290 dev_err(&pdev->dev, "get of property sec_disp_id fail\n");
294 plat_data->mode = parse_ldb_mode(mode);
295 plat_data->ext_ref = ext_ref;
296 plat_data->ipu_id = ipu_id;
297 plat_data->disp_id = disp_id;
298 plat_data->sec_ipu_id = sec_ipu_id;
299 plat_data->sec_disp_id = sec_disp_id;
304 static int find_ldb_setting(struct ldb_data *ldb, struct fb_info *fbi)
313 for (i = 0; i < ARRAY_SIZE(id_di); i++) {
314 if (ldb->setting[i].active) {
315 strlcpy(id, id_di[ldb->setting[i].di], sizeof(id));
316 id[4] += ldb->setting[i].ipu;
317 if (!strcmp(id, fbi->fix.id))
324 static int ldb_disp_setup(struct mxc_dispdrv_handle *disp, struct fb_info *fbi)
327 uint32_t pixel_clk, rounded_pixel_clk;
328 struct clk *ldb_clk_parent;
329 struct ldb_data *ldb = mxc_dispdrv_getdata(disp);
333 setting_idx = find_ldb_setting(ldb, fbi);
337 di = ldb->setting[setting_idx].di;
339 /* restore channel mode setting */
340 val = readl(ldb->control_reg);
341 val |= ldb->setting[setting_idx].ch_val;
342 writel(val, ldb->control_reg);
343 dev_dbg(&ldb->pdev->dev, "LDB setup, control reg: 0x%08x\n",
344 readl(ldb->control_reg));
347 reg = readl(ldb->control_reg);
348 if (fbi->var.sync & FB_SYNC_VERT_HIGH_ACT) {
350 reg = (reg & ~LDB_DI0_VS_POL_MASK)
351 | LDB_DI0_VS_POL_ACT_HIGH;
353 reg = (reg & ~LDB_DI1_VS_POL_MASK)
354 | LDB_DI1_VS_POL_ACT_HIGH;
357 reg = (reg & ~LDB_DI0_VS_POL_MASK)
358 | LDB_DI0_VS_POL_ACT_LOW;
360 reg = (reg & ~LDB_DI1_VS_POL_MASK)
361 | LDB_DI1_VS_POL_ACT_LOW;
363 writel(reg, ldb->control_reg);
366 if (ldb->setting[setting_idx].clk_en)
367 clk_disable_unprepare(ldb->setting[setting_idx].ldb_di_clk);
368 pixel_clk = (PICOS2KHZ(fbi->var.pixclock)) * 1000UL;
369 ldb_clk_parent = clk_get_parent(ldb->setting[setting_idx].ldb_di_clk);
370 if (IS_ERR(ldb_clk_parent)) {
371 dev_err(&ldb->pdev->dev, "get ldb di parent clk fail\n");
372 return PTR_ERR(ldb_clk_parent);
374 if ((ldb->mode == LDB_SPL_DI0) || (ldb->mode == LDB_SPL_DI1))
375 ret = clk_set_rate(ldb_clk_parent, pixel_clk * 7 / 2);
377 ret = clk_set_rate(ldb_clk_parent, pixel_clk * 7);
379 dev_err(&ldb->pdev->dev, "set ldb parent clk fail:%d\n", ret);
382 rounded_pixel_clk = clk_round_rate(ldb->setting[setting_idx].ldb_di_clk,
384 dev_dbg(&ldb->pdev->dev, "pixel_clk:%d, rounded_pixel_clk:%d\n",
385 pixel_clk, rounded_pixel_clk);
386 ret = clk_set_rate(ldb->setting[setting_idx].ldb_di_clk,
389 dev_err(&ldb->pdev->dev, "set ldb di clk fail:%d\n", ret);
392 ret = clk_prepare_enable(ldb->setting[setting_idx].ldb_di_clk);
394 dev_err(&ldb->pdev->dev, "enable ldb di clk fail:%d\n", ret);
398 if (!ldb->setting[setting_idx].clk_en)
399 ldb->setting[setting_idx].clk_en = true;
404 int ldb_fb_event(struct notifier_block *nb, unsigned long val, void *v)
406 struct ldb_data *ldb = container_of(nb, struct ldb_data, nb);
407 struct fb_event *event = v;
408 struct fb_info *fbi = event->info;
412 index = find_ldb_setting(ldb, fbi);
416 fbi->mode = (struct fb_videomode *)fb_match_mode(&fbi->var,
420 dev_warn(&ldb->pdev->dev,
421 "LDB: can not find mode for xres=%d, yres=%d\n",
422 fbi->var.xres, fbi->var.yres);
423 if (ldb->setting[index].clk_en) {
424 clk_disable(ldb->setting[index].ldb_di_clk);
425 ldb->setting[index].clk_en = false;
426 data = readl(ldb->control_reg);
427 data &= ~ldb->setting[index].ch_mask;
428 writel(data, ldb->control_reg);
436 if (*((int *)event->data) == FB_BLANK_UNBLANK) {
437 if (!ldb->setting[index].clk_en) {
438 clk_enable(ldb->setting[index].ldb_di_clk);
439 ldb->setting[index].clk_en = true;
442 if (ldb->setting[index].clk_en) {
443 clk_disable(ldb->setting[index].ldb_di_clk);
444 ldb->setting[index].clk_en = false;
445 data = readl(ldb->control_reg);
446 data &= ~ldb->setting[index].ch_mask;
447 writel(data, ldb->control_reg);
448 dev_dbg(&ldb->pdev->dev,
449 "LDB blank, control reg: 0x%08x\n",
450 readl(ldb->control_reg));
455 case FB_EVENT_SUSPEND:
456 if (ldb->setting[index].clk_en) {
457 clk_disable(ldb->setting[index].ldb_di_clk);
458 ldb->setting[index].clk_en = false;
467 #define LVDS_MUX_CTL_WIDTH 2
468 #define LVDS_MUX_CTL_MASK 3
469 #define LVDS0_MUX_CTL_OFFS 6
470 #define LVDS1_MUX_CTL_OFFS 8
471 #define LVDS0_MUX_CTL_MASK (LVDS_MUX_CTL_MASK << 6)
472 #define LVDS1_MUX_CTL_MASK (LVDS_MUX_CTL_MASK << 8)
473 #define ROUTE_IPU_DI(ipu, di) (((ipu << 1) | di) & LVDS_MUX_CTL_MASK)
474 static int ldb_ipu_ldb_route(int ipu, int di, struct ldb_data *ldb)
479 int mode = ldb->mode;
481 reg = readl(ldb->gpr3_reg);
482 if (mode < LDB_SIN0) {
483 reg &= ~(LVDS0_MUX_CTL_MASK | LVDS1_MUX_CTL_MASK);
484 reg |= (ROUTE_IPU_DI(ipu, di) << LVDS0_MUX_CTL_OFFS) |
485 (ROUTE_IPU_DI(ipu, di) << LVDS1_MUX_CTL_OFFS);
486 dev_dbg(&ldb->pdev->dev,
487 "Dual/Split mode both channels route to IPU%d-DI%d\n",
489 } else if ((mode == LDB_SIN0) || (mode == LDB_SIN1)) {
490 reg &= ~(LVDS0_MUX_CTL_MASK | LVDS1_MUX_CTL_MASK);
491 channel = mode - LDB_SIN0;
492 shift = LVDS0_MUX_CTL_OFFS + channel * LVDS_MUX_CTL_WIDTH;
493 reg |= ROUTE_IPU_DI(ipu, di) << shift;
494 dev_dbg(&ldb->pdev->dev,
495 "Single mode channel %d route to IPU%d-DI%d\n",
498 static bool first = true;
501 if (mode == LDB_SEP0) {
502 reg &= ~LVDS0_MUX_CTL_MASK;
505 reg &= ~LVDS1_MUX_CTL_MASK;
510 if (mode == LDB_SEP0) {
511 reg &= ~LVDS1_MUX_CTL_MASK;
514 reg &= ~LVDS0_MUX_CTL_MASK;
519 shift = LVDS0_MUX_CTL_OFFS + channel * LVDS_MUX_CTL_WIDTH;
520 reg |= ROUTE_IPU_DI(ipu, di) << shift;
522 dev_dbg(&ldb->pdev->dev,
523 "Separate mode channel %d route to IPU%d-DI%d\n",
526 writel(reg, ldb->gpr3_reg);
531 static int ldb_disp_init(struct mxc_dispdrv_handle *disp,
532 struct mxc_dispdrv_setting *setting)
534 int ret = 0, i, lvds_channel = 0;
535 struct ldb_data *ldb = mxc_dispdrv_getdata(disp);
536 struct fsl_mxc_ldb_platform_data *plat_data = ldb->pdev->dev.platform_data;
537 struct resource *res;
538 uint32_t reg, setting_idx;
539 uint32_t ch_mask = 0, ch_val = 0;
540 uint32_t ipu_id, disp_id;
541 char di_clk[] = "ipu1_di0_sel";
542 char ldb_clk[] = "ldb_di0";
543 char div_3_5_clk[] = "di0_div_3_5";
544 char div_7_clk[] = "di0_div_7";
545 char div_sel_clk[] = "di0_div_sel";
547 /* if input format not valid, make RGB666 as default*/
548 if (!valid_mode(setting->if_fmt)) {
549 dev_warn(&ldb->pdev->dev, "Input pixel format not valid"
550 " use default RGB666\n");
551 setting->if_fmt = IPU_PIX_FMT_RGB666;
556 res = platform_get_resource(ldb->pdev, IORESOURCE_MEM, 0);
558 dev_err(&ldb->pdev->dev, "get iomem fail.\n");
562 ldb->reg = devm_ioremap(&ldb->pdev->dev, res->start,
564 ldb->control_reg = ldb->reg + 2;
565 ldb->gpr3_reg = ldb->reg + 3;
567 /* ipu selected by platform data setting */
568 setting->dev_id = plat_data->ipu_id;
570 reg = readl(ldb->control_reg);
572 /* refrence resistor select */
573 reg &= ~LDB_BGREF_RMODE_MASK;
574 if (plat_data->ext_ref)
575 reg |= LDB_BGREF_RMODE_EXT;
577 reg |= LDB_BGREF_RMODE_INT;
579 /* TODO: now only use SPWG data mapping for both channel */
580 reg &= ~(LDB_BIT_MAP_CH0_MASK | LDB_BIT_MAP_CH1_MASK);
581 reg |= LDB_BIT_MAP_CH0_SPWG | LDB_BIT_MAP_CH1_SPWG;
583 /* channel mode setting */
584 reg &= ~(LDB_CH0_MODE_MASK | LDB_CH1_MODE_MASK);
585 reg &= ~(LDB_DATA_WIDTH_CH0_MASK | LDB_DATA_WIDTH_CH1_MASK);
587 if (bits_per_pixel(setting->if_fmt) == 24)
588 reg |= LDB_DATA_WIDTH_CH0_24 | LDB_DATA_WIDTH_CH1_24;
590 reg |= LDB_DATA_WIDTH_CH0_18 | LDB_DATA_WIDTH_CH1_18;
592 if (g_ldb_mode >= LDB_SPL_DI0)
593 ldb->mode = g_ldb_mode;
595 ldb->mode = plat_data->mode;
597 if ((ldb->mode == LDB_SIN0) || (ldb->mode == LDB_SIN1)) {
598 ret = ldb->mode - LDB_SIN0;
599 if (plat_data->disp_id != ret) {
600 dev_warn(&ldb->pdev->dev,
601 "change IPU DI%d to IPU DI%d for LDB "
603 plat_data->disp_id, ret, ret);
604 plat_data->disp_id = ret;
606 } else if (((ldb->mode == LDB_SEP0) || (ldb->mode == LDB_SEP1))
607 && is_imx6_ldb(plat_data)) {
608 if (plat_data->ipu_id == plat_data->sec_ipu_id &&
609 plat_data->disp_id == plat_data->sec_disp_id) {
610 dev_err(&ldb->pdev->dev,
611 "For LVDS separate mode,"
612 "two DIs should be different!\n");
616 if ((!plat_data->disp_id && ldb->mode == LDB_SEP1) ||
617 (plat_data->disp_id && ldb->mode == LDB_SEP0)) {
618 dev_dbg(&ldb->pdev->dev,
619 "LVDS separate mode:"
620 "swap DI configuration!\n");
621 ipu_id = plat_data->ipu_id;
622 disp_id = plat_data->disp_id;
623 plat_data->ipu_id = plat_data->sec_ipu_id;
624 plat_data->disp_id = plat_data->sec_disp_id;
625 plat_data->sec_ipu_id = ipu_id;
626 plat_data->sec_disp_id = disp_id;
630 if (ldb->mode == LDB_SPL_DI0) {
631 reg |= LDB_SPLIT_MODE_EN | LDB_CH0_MODE_EN_TO_DI0
632 | LDB_CH1_MODE_EN_TO_DI0;
633 setting->disp_id = 0;
634 } else if (ldb->mode == LDB_SPL_DI1) {
635 reg |= LDB_SPLIT_MODE_EN | LDB_CH0_MODE_EN_TO_DI1
636 | LDB_CH1_MODE_EN_TO_DI1;
637 setting->disp_id = 1;
638 } else if (ldb->mode == LDB_DUL_DI0) {
639 reg &= ~LDB_SPLIT_MODE_EN;
640 reg |= LDB_CH0_MODE_EN_TO_DI0 | LDB_CH1_MODE_EN_TO_DI0;
641 setting->disp_id = 0;
642 } else if (ldb->mode == LDB_DUL_DI1) {
643 reg &= ~LDB_SPLIT_MODE_EN;
644 reg |= LDB_CH0_MODE_EN_TO_DI1 | LDB_CH1_MODE_EN_TO_DI1;
645 setting->disp_id = 1;
646 } else if (ldb->mode == LDB_SIN0) {
647 reg &= ~LDB_SPLIT_MODE_EN;
648 setting->disp_id = plat_data->disp_id;
649 if (setting->disp_id == 0)
650 reg |= LDB_CH0_MODE_EN_TO_DI0;
652 reg |= LDB_CH0_MODE_EN_TO_DI1;
653 ch_mask = LDB_CH0_MODE_MASK;
654 ch_val = reg & LDB_CH0_MODE_MASK;
655 } else if (ldb->mode == LDB_SIN1) {
656 reg &= ~LDB_SPLIT_MODE_EN;
657 setting->disp_id = plat_data->disp_id;
658 if (setting->disp_id == 0)
659 reg |= LDB_CH1_MODE_EN_TO_DI0;
661 reg |= LDB_CH1_MODE_EN_TO_DI1;
662 ch_mask = LDB_CH1_MODE_MASK;
663 ch_val = reg & LDB_CH1_MODE_MASK;
664 } else { /* separate mode*/
665 setting->disp_id = plat_data->disp_id;
667 /* first output is LVDS0 or LVDS1 */
668 if (ldb->mode == LDB_SEP0)
673 reg &= ~LDB_SPLIT_MODE_EN;
675 if ((lvds_channel == 0) && (setting->disp_id == 0))
676 reg |= LDB_CH0_MODE_EN_TO_DI0;
677 else if ((lvds_channel == 0) && (setting->disp_id == 1))
678 reg |= LDB_CH0_MODE_EN_TO_DI1;
679 else if ((lvds_channel == 1) && (setting->disp_id == 0))
680 reg |= LDB_CH1_MODE_EN_TO_DI0;
682 reg |= LDB_CH1_MODE_EN_TO_DI1;
683 ch_mask = lvds_channel ? LDB_CH1_MODE_MASK :
685 ch_val = reg & ch_mask;
687 if (bits_per_pixel(setting->if_fmt) == 24) {
688 if (lvds_channel == 0)
689 reg &= ~LDB_DATA_WIDTH_CH1_24;
691 reg &= ~LDB_DATA_WIDTH_CH0_24;
693 if (lvds_channel == 0)
694 reg &= ~LDB_DATA_WIDTH_CH1_18;
696 reg &= ~LDB_DATA_WIDTH_CH0_18;
700 writel(reg, ldb->control_reg);
701 if (ldb->mode < LDB_SIN0) {
702 ch_mask = LDB_CH0_MODE_MASK | LDB_CH1_MODE_MASK;
703 ch_val = reg & (LDB_CH0_MODE_MASK | LDB_CH1_MODE_MASK);
705 } else { /* second time for separate mode */
706 if ((ldb->mode == LDB_SPL_DI0) ||
707 (ldb->mode == LDB_SPL_DI1) ||
708 (ldb->mode == LDB_DUL_DI0) ||
709 (ldb->mode == LDB_DUL_DI1) ||
710 (ldb->mode == LDB_SIN0) ||
711 (ldb->mode == LDB_SIN1)) {
712 dev_err(&ldb->pdev->dev, "for second ldb disp"
713 "ldb mode should in separate mode\n");
718 if (is_imx6_ldb(plat_data)) {
719 setting->dev_id = plat_data->sec_ipu_id;
720 setting->disp_id = plat_data->sec_disp_id;
722 setting->dev_id = plat_data->ipu_id;
723 setting->disp_id = !plat_data->disp_id;
725 if (setting->dev_id == ldb->setting[0].ipu &&
726 setting->disp_id == ldb->setting[0].di) {
727 dev_err(&ldb->pdev->dev, "Err: for second ldb disp in"
728 "separate mode, DI should be different!\n");
732 /* second output is LVDS0 or LVDS1 */
733 if (ldb->mode == LDB_SEP0)
738 reg = readl(ldb->control_reg);
739 if ((lvds_channel == 0) && (setting->disp_id == 0))
740 reg |= LDB_CH0_MODE_EN_TO_DI0;
741 else if ((lvds_channel == 0) && (setting->disp_id == 1))
742 reg |= LDB_CH0_MODE_EN_TO_DI1;
743 else if ((lvds_channel == 1) && (setting->disp_id == 0))
744 reg |= LDB_CH1_MODE_EN_TO_DI0;
746 reg |= LDB_CH1_MODE_EN_TO_DI1;
747 ch_mask = lvds_channel ? LDB_CH1_MODE_MASK :
749 ch_val = reg & ch_mask;
751 if (bits_per_pixel(setting->if_fmt) == 24) {
752 if (lvds_channel == 0)
753 reg |= LDB_DATA_WIDTH_CH0_24;
755 reg |= LDB_DATA_WIDTH_CH1_24;
757 if (lvds_channel == 0)
758 reg |= LDB_DATA_WIDTH_CH0_18;
760 reg |= LDB_DATA_WIDTH_CH1_18;
762 writel(reg, ldb->control_reg);
766 if (is_imx6_ldb(plat_data) &&
767 ((ldb->mode == LDB_SEP0) || (ldb->mode == LDB_SEP1))) {
768 ldb_clk[6] += lvds_channel;
769 div_3_5_clk[2] += lvds_channel;
770 div_7_clk[2] += lvds_channel;
771 div_sel_clk[2] += lvds_channel;
773 ldb_clk[6] += setting->disp_id;
774 div_3_5_clk[2] += setting->disp_id;
775 div_7_clk[2] += setting->disp_id;
776 div_sel_clk[2] += setting->disp_id;
778 ldb->setting[setting_idx].ldb_di_clk = clk_get(&ldb->pdev->dev,
780 if (IS_ERR(ldb->setting[setting_idx].ldb_di_clk)) {
781 dev_err(&ldb->pdev->dev, "get ldb clk failed\n");
782 return PTR_ERR(ldb->setting[setting_idx].ldb_di_clk);
785 ldb->setting[setting_idx].div_3_5_clk = clk_get(&ldb->pdev->dev,
787 if (IS_ERR(ldb->setting[setting_idx].div_3_5_clk)) {
788 dev_err(&ldb->pdev->dev, "get div 3.5 clk failed\n");
789 return PTR_ERR(ldb->setting[setting_idx].div_3_5_clk);
791 ldb->setting[setting_idx].div_7_clk = clk_get(&ldb->pdev->dev,
793 if (IS_ERR(ldb->setting[setting_idx].div_7_clk)) {
794 dev_err(&ldb->pdev->dev, "get div 7 clk failed\n");
795 return PTR_ERR(ldb->setting[setting_idx].div_7_clk);
798 ldb->setting[setting_idx].div_sel_clk = clk_get(&ldb->pdev->dev,
800 if (IS_ERR(ldb->setting[setting_idx].div_sel_clk)) {
801 dev_err(&ldb->pdev->dev, "get div sel clk failed\n");
802 return PTR_ERR(ldb->setting[setting_idx].div_sel_clk);
805 di_clk[3] += setting->dev_id;
806 di_clk[7] += setting->disp_id;
807 ldb->setting[setting_idx].di_clk = clk_get(&ldb->pdev->dev,
809 if (IS_ERR(ldb->setting[setting_idx].di_clk)) {
810 dev_err(&ldb->pdev->dev, "get di clk failed\n");
811 return PTR_ERR(ldb->setting[setting_idx].di_clk);
814 ldb->setting[setting_idx].ch_mask = ch_mask;
815 ldb->setting[setting_idx].ch_val = ch_val;
817 if (is_imx6_ldb(plat_data))
818 ldb_ipu_ldb_route(setting->dev_id, setting->disp_id, ldb);
820 if (setting->fbmode) {
821 ldb_modedb[0] = *setting->fbmode;
825 /* must use spec video mode defined by driver */
826 ret = fb_find_mode(&setting->fbi->var, setting->fbi, setting->dft_mode_str,
827 ldb_modedb, ldb_modedb_sz, NULL, setting->default_bpp);
829 fb_videomode_to_var(&setting->fbi->var, &ldb_modedb[0]);
831 INIT_LIST_HEAD(&setting->fbi->modelist);
832 for (i = 0; i < ldb_modedb_sz; i++) {
833 struct fb_videomode m;
834 fb_var_to_videomode(&m, &setting->fbi->var);
835 if (fb_mode_is_equal(&m, &ldb_modedb[i])) {
836 fb_add_videomode(&ldb_modedb[i],
837 &setting->fbi->modelist);
842 ldb->setting[setting_idx].ipu = setting->dev_id;
843 ldb->setting[setting_idx].di = setting->disp_id;
848 static int ldb_post_disp_init(struct mxc_dispdrv_handle *disp,
849 int ipu_id, int disp_id)
851 struct ldb_data *ldb = mxc_dispdrv_getdata(disp);
852 int setting_idx = ldb->inited ? 1 : 0;
856 ldb->nb.notifier_call = ldb_fb_event;
857 fb_register_client(&ldb->nb);
860 ret = clk_set_parent(ldb->setting[setting_idx].di_clk,
861 ldb->setting[setting_idx].ldb_di_clk);
863 dev_err(&ldb->pdev->dev, "fail to set ldb_di clk as"
864 "the parent of ipu_di clk\n");
868 if ((ldb->mode == LDB_SPL_DI0) || (ldb->mode == LDB_SPL_DI1)) {
869 ret = clk_set_parent(ldb->setting[setting_idx].div_sel_clk,
870 ldb->setting[setting_idx].div_3_5_clk);
872 dev_err(&ldb->pdev->dev, "fail to set div 3.5 clk as"
873 "the parent of div sel clk\n");
877 ret = clk_set_parent(ldb->setting[setting_idx].div_sel_clk,
878 ldb->setting[setting_idx].div_7_clk);
880 dev_err(&ldb->pdev->dev, "fail to set div 7 clk as"
881 "the parent of div sel clk\n");
886 /* save active ldb setting for fb notifier */
887 ldb->setting[setting_idx].active = true;
893 static void ldb_disp_deinit(struct mxc_dispdrv_handle *disp)
895 struct ldb_data *ldb = mxc_dispdrv_getdata(disp);
898 writel(0, ldb->control_reg);
900 for (i = 0; i < 2; i++) {
901 clk_disable(ldb->setting[i].ldb_di_clk);
902 clk_put(ldb->setting[i].ldb_di_clk);
903 clk_put(ldb->setting[i].div_3_5_clk);
904 clk_put(ldb->setting[i].div_7_clk);
905 clk_put(ldb->setting[i].div_sel_clk);
908 fb_unregister_client(&ldb->nb);
911 static struct mxc_dispdrv_driver ldb_drv = {
913 .init = ldb_disp_init,
914 .post_init = ldb_post_disp_init,
915 .deinit = ldb_disp_deinit,
916 .setup = ldb_disp_setup,
919 static int ldb_suspend(struct platform_device *pdev, pm_message_t state)
921 struct ldb_data *ldb = dev_get_drvdata(&pdev->dev);
926 data = readl(ldb->control_reg);
927 ldb->control_reg_data = data;
928 data &= ~(LDB_CH0_MODE_MASK | LDB_CH1_MODE_MASK);
929 writel(data, ldb->control_reg);
934 static int ldb_resume(struct platform_device *pdev)
936 struct ldb_data *ldb = dev_get_drvdata(&pdev->dev);
940 writel(ldb->control_reg_data, ldb->control_reg);
945 static struct platform_device_id imx_ldb_devtype[] = {
946 { "ldb-imx6", LDB_IMX6, },
950 static const struct of_device_id imx_ldb_dt_ids[] = {
951 { .compatible = "fsl,imx6q-ldb", .data = &imx_ldb_devtype[IMX6_LDB],},
956 * This function is called by the driver framework to initialize the LDB
959 * @param dev The device structure for the LDB passed in by the
962 * @return Returns 0 on success or negative error code on error
964 static int ldb_probe(struct platform_device *pdev)
967 struct ldb_data *ldb;
968 struct fsl_mxc_ldb_platform_data *plat_data;
969 const struct of_device_id *of_id =
970 of_match_device(imx_ldb_dt_ids, &pdev->dev);
972 dev_dbg(&pdev->dev, "%s enter\n", __func__);
973 ldb = devm_kzalloc(&pdev->dev, sizeof(struct ldb_data), GFP_KERNEL);
977 plat_data = devm_kzalloc(&pdev->dev,
978 sizeof(struct fsl_mxc_ldb_platform_data),
982 pdev->dev.platform_data = plat_data;
984 pdev->id_entry = of_id->data;
985 plat_data->devtype = pdev->id_entry->driver_data;
987 ret = ldb_get_of_property(pdev, plat_data);
989 dev_err(&pdev->dev, "get ldb of property fail\n");
994 ldb->disp_ldb = mxc_dispdrv_register(&ldb_drv);
995 mxc_dispdrv_setdata(ldb->disp_ldb, ldb);
997 dev_set_drvdata(&pdev->dev, ldb);
999 dev_dbg(&pdev->dev, "%s exit\n", __func__);
1003 static int ldb_remove(struct platform_device *pdev)
1005 struct ldb_data *ldb = dev_get_drvdata(&pdev->dev);
1009 mxc_dispdrv_puthandle(ldb->disp_ldb);
1010 mxc_dispdrv_unregister(ldb->disp_ldb);
1014 static struct platform_driver mxcldb_driver = {
1017 .of_match_table = imx_ldb_dt_ids,
1020 .remove = ldb_remove,
1021 .suspend = ldb_suspend,
1022 .resume = ldb_resume,
1025 static int __init ldb_init(void)
1027 return platform_driver_register(&mxcldb_driver);
1030 static void __exit ldb_uninit(void)
1032 platform_driver_unregister(&mxcldb_driver);
1035 module_init(ldb_init);
1036 module_exit(ldb_uninit);
1038 MODULE_AUTHOR("Freescale Semiconductor, Inc.");
1039 MODULE_DESCRIPTION("MXC LDB driver");
1040 MODULE_LICENSE("GPL");