]> git.kernelconcepts.de Git - karo-tx-linux.git/blob - drivers/video/mxc/ldb.c
video: mxc: use of_get_videomode() to set up the video timing
[karo-tx-linux.git] / drivers / video / mxc / ldb.c
1 /*
2  * Copyright (C) 2012-2013 Freescale Semiconductor, Inc. All Rights Reserved.
3  */
4
5 /*
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  * GNU General Public License for more details.
15
16  * You should have received a copy of the GNU General Public License along
17  * with this program; if not, write to the Free Software Foundation, Inc.,
18  * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
19  */
20
21 /*!
22  * @file mxc_ldb.c
23  *
24  * @brief This file contains the LDB driver device interface and fops
25  * functions.
26  */
27 #include <linux/types.h>
28 #include <linux/init.h>
29 #include <linux/module.h>
30 #include <linux/platform_device.h>
31 #include <linux/err.h>
32 #include <linux/clk.h>
33 #include <linux/console.h>
34 #include <linux/io.h>
35 #include <linux/ipu.h>
36 #include <linux/mxcfb.h>
37 #include <linux/regulator/consumer.h>
38 #include <linux/spinlock.h>
39 #include <linux/of_device.h>
40 #include <linux/mod_devicetable.h>
41 #include <video/of_display_timing.h>
42 #include <video/of_videomode.h>
43 #include <video/videomode.h>
44
45 #include "mxc_dispdrv.h"
46
47 #define DISPDRV_LDB     "ldb"
48
49 #define LDB_BGREF_RMODE_MASK            0x00008000
50 #define LDB_BGREF_RMODE_INT             0x00008000
51 #define LDB_BGREF_RMODE_EXT             0x0
52
53 #define LDB_DI1_VS_POL_MASK             0x00000400
54 #define LDB_DI1_VS_POL_ACT_LOW          0x00000400
55 #define LDB_DI1_VS_POL_ACT_HIGH         0x0
56 #define LDB_DI0_VS_POL_MASK             0x00000200
57 #define LDB_DI0_VS_POL_ACT_LOW          0x00000200
58 #define LDB_DI0_VS_POL_ACT_HIGH         0x0
59
60 #define LDB_BIT_MAP_CH1_MASK            0x00000100
61 #define LDB_BIT_MAP_CH1_JEIDA           0x00000100
62 #define LDB_BIT_MAP_CH1_SPWG            0x0
63 #define LDB_BIT_MAP_CH0_MASK            0x00000040
64 #define LDB_BIT_MAP_CH0_JEIDA           0x00000040
65 #define LDB_BIT_MAP_CH0_SPWG            0x0
66
67 #define LDB_DATA_WIDTH_CH1_MASK         0x00000080
68 #define LDB_DATA_WIDTH_CH1_24           0x00000080
69 #define LDB_DATA_WIDTH_CH1_18           0x0
70 #define LDB_DATA_WIDTH_CH0_MASK         0x00000020
71 #define LDB_DATA_WIDTH_CH0_24           0x00000020
72 #define LDB_DATA_WIDTH_CH0_18           0x0
73
74 #define LDB_CH1_MODE_MASK               0x0000000C
75 #define LDB_CH1_MODE_EN_TO_DI1          0x0000000C
76 #define LDB_CH1_MODE_EN_TO_DI0          0x00000004
77 #define LDB_CH1_MODE_DISABLE            0x0
78 #define LDB_CH0_MODE_MASK               0x00000003
79 #define LDB_CH0_MODE_EN_TO_DI1          0x00000003
80 #define LDB_CH0_MODE_EN_TO_DI0          0x00000001
81 #define LDB_CH0_MODE_DISABLE            0x0
82
83 #define LDB_SPLIT_MODE_EN               0x00000010
84
85 enum {
86         IMX6_LDB,
87 };
88
89 enum {
90         LDB_IMX6 = 1,
91 };
92
93 struct fsl_mxc_ldb_platform_data {
94         int devtype;
95         u32 ext_ref;
96 #define LDB_SPL_DI0     1
97 #define LDB_SPL_DI1     2
98 #define LDB_DUL_DI0     3
99 #define LDB_DUL_DI1     4
100 #define LDB_SIN0        5
101 #define LDB_SIN1        6
102 #define LDB_SEP0        7
103 #define LDB_SEP1        8
104         int mode;
105         int ipu_id;
106         int disp_id;
107
108         /*only work for separate mode*/
109         int sec_ipu_id;
110         int sec_disp_id;
111 };
112
113 struct ldb_data {
114         struct platform_device *pdev;
115         struct mxc_dispdrv_handle *disp_ldb;
116         uint32_t *reg;
117         uint32_t *control_reg;
118         uint32_t *gpr3_reg;
119         uint32_t control_reg_data;
120         struct regulator *lvds_bg_reg;
121         int mode;
122         bool inited;
123         struct ldb_setting {
124                 struct clk *di_clk;
125                 struct clk *ldb_di_clk;
126                 struct clk *div_3_5_clk;
127                 struct clk *div_7_clk;
128                 struct clk *div_sel_clk;
129                 bool active;
130                 bool clk_en;
131                 int ipu;
132                 int di;
133                 uint32_t ch_mask;
134                 uint32_t ch_val;
135         } setting[2];
136         struct notifier_block nb;
137 };
138
139 static int g_ldb_mode;
140
141 static struct fb_videomode ldb_modedb[] = {
142         {
143          "LDB-WXGA", 60, 1280, 800, 14065,
144          40, 40,
145          10, 3,
146          80, 10,
147          0,
148          FB_VMODE_NONINTERLACED,
149          FB_MODE_IS_DETAILED,},
150         {
151          "LDB-XGA", 60, 1024, 768, 15385,
152          220, 40,
153          21, 7,
154          60, 10,
155          0,
156          FB_VMODE_NONINTERLACED,
157          FB_MODE_IS_DETAILED,},
158         {
159          "LDB-1080P60", 60, 1920, 1080, 7692,
160          100, 40,
161          30, 3,
162          10, 2,
163          0,
164          FB_VMODE_NONINTERLACED,
165          FB_MODE_IS_DETAILED,},
166 };
167 static int ldb_modedb_sz = ARRAY_SIZE(ldb_modedb);
168
169 static inline int is_imx6_ldb(struct fsl_mxc_ldb_platform_data *plat_data)
170 {
171         return (plat_data->devtype == LDB_IMX6);
172 }
173
174 static int bits_per_pixel(int pixel_fmt)
175 {
176         switch (pixel_fmt) {
177         case IPU_PIX_FMT_BGR24:
178         case IPU_PIX_FMT_RGB24:
179                 return 24;
180                 break;
181         case IPU_PIX_FMT_BGR666:
182         case IPU_PIX_FMT_RGB666:
183         case IPU_PIX_FMT_LVDS666:
184                 return 18;
185                 break;
186         default:
187                 break;
188         }
189         return 0;
190 }
191
192 static int valid_mode(int pixel_fmt)
193 {
194         return ((pixel_fmt == IPU_PIX_FMT_RGB24) ||
195                 (pixel_fmt == IPU_PIX_FMT_BGR24) ||
196                 (pixel_fmt == IPU_PIX_FMT_LVDS666) ||
197                 (pixel_fmt == IPU_PIX_FMT_RGB666) ||
198                 (pixel_fmt == IPU_PIX_FMT_BGR666));
199 }
200
201 static int parse_ldb_mode(char *mode)
202 {
203         int ldb_mode;
204
205         if (!strcmp(mode, "spl0"))
206                 ldb_mode = LDB_SPL_DI0;
207         else if (!strcmp(mode, "spl1"))
208                 ldb_mode = LDB_SPL_DI1;
209         else if (!strcmp(mode, "dul0"))
210                 ldb_mode = LDB_DUL_DI0;
211         else if (!strcmp(mode, "dul1"))
212                 ldb_mode = LDB_DUL_DI1;
213         else if (!strcmp(mode, "sin0"))
214                 ldb_mode = LDB_SIN0;
215         else if (!strcmp(mode, "sin1"))
216                 ldb_mode = LDB_SIN1;
217         else if (!strcmp(mode, "sep0"))
218                 ldb_mode = LDB_SEP0;
219         else if (!strcmp(mode, "sep1"))
220                 ldb_mode = LDB_SEP1;
221         else
222                 ldb_mode = -EINVAL;
223
224         return ldb_mode;
225 }
226
227 #ifndef MODULE
228 /*
229  *    "ldb=spl0/1"       --      split mode on DI0/1
230  *    "ldb=dul0/1"       --      dual mode on DI0/1
231  *    "ldb=sin0/1"       --      single mode on LVDS0/1
232  *    "ldb=sep0/1"       --      separate mode begin from LVDS0/1
233  *
234  *    there are two LVDS channels(LVDS0 and LVDS1) which can transfer video
235  *    datas, there two channels can be used as split/dual/single/separate mode.
236  *
237  *    split mode means display data from DI0 or DI1 will send to both channels
238  *    LVDS0+LVDS1.
239  *    dual mode means display data from DI0 or DI1 will be duplicated on LVDS0
240  *    and LVDS1, it said, LVDS0 and LVDS1 has the same content.
241  *    single mode means only work for DI0/DI1->LVDS0 or DI0/DI1->LVDS1.
242  *    separate mode means you can make DI0/DI1->LVDS0 and DI0/DI1->LVDS1 work
243  *    at the same time.
244  */
245 static int __init ldb_setup(char *options)
246 {
247         g_ldb_mode = parse_ldb_mode(options);
248         return (g_ldb_mode < 0) ? 0 : 1;
249 }
250 __setup("ldb=", ldb_setup);
251 #endif
252
253 static int ldb_get_of_property(struct platform_device *pdev,
254                                 struct fsl_mxc_ldb_platform_data *plat_data)
255 {
256         struct device_node *np = pdev->dev.of_node;
257         int err;
258         u32 ipu_id, disp_id;
259         u32 sec_ipu_id, sec_disp_id;
260         char *mode;
261         u32 ext_ref;
262
263         err = of_property_read_string(np, "mode", (const char **)&mode);
264         if (err) {
265                 dev_err(&pdev->dev, "get of property mode fail\n");
266                 return err;
267         }
268         err = of_property_read_u32(np, "ext_ref", &ext_ref);
269         if (err) {
270                 dev_err(&pdev->dev, "get of property ext_ref fail\n");
271                 return err;
272         }
273         err = of_property_read_u32(np, "ipu_id", &ipu_id);
274         if (err) {
275                 dev_err(&pdev->dev, "get of property ipu_id fail\n");
276                 return err;
277         }
278         err = of_property_read_u32(np, "disp_id", &disp_id);
279         if (err) {
280                 dev_err(&pdev->dev, "get of property disp_id fail\n");
281                 return err;
282         }
283         err = of_property_read_u32(np, "sec_ipu_id", &sec_ipu_id);
284         if (err) {
285                 dev_err(&pdev->dev, "get of property sec_ipu_id fail\n");
286                 return err;
287         }
288         err = of_property_read_u32(np, "sec_disp_id", &sec_disp_id);
289         if (err) {
290                 dev_err(&pdev->dev, "get of property sec_disp_id fail\n");
291                 return err;
292         }
293
294         if (of_display_timings_exist(np) == 1) {
295                 struct videomode vm = { };
296
297                 err = of_get_videomode(np, &vm, OF_USE_NATIVE_MODE);
298                 if (err == 0) {
299                         fb_videomode_from_videomode(&vm, &ldb_modedb[0]);
300                         ldb_modedb_sz = 1;
301                 }
302         }
303
304         plat_data->mode = parse_ldb_mode(mode);
305         plat_data->ext_ref = ext_ref;
306         plat_data->ipu_id = ipu_id;
307         plat_data->disp_id = disp_id;
308         plat_data->sec_ipu_id = sec_ipu_id;
309         plat_data->sec_disp_id = sec_disp_id;
310
311         return err;
312 }
313
314 static int find_ldb_setting(struct ldb_data *ldb, struct fb_info *fbi)
315 {
316         char *id_di[] = {
317                  "DISP3 BG",
318                  "DISP3 BG - DI1",
319                 };
320         char id[16];
321         int i;
322
323         for (i = 0; i < 2; i++) {
324                 if (ldb->setting[i].active) {
325                         memset(id, 0, 16);
326                         memcpy(id, id_di[ldb->setting[i].di],
327                                 strlen(id_di[ldb->setting[i].di]));
328                         id[4] += ldb->setting[i].ipu;
329                         if (!strcmp(id, fbi->fix.id))
330                                 return i;
331                 }
332         }
333         return -EINVAL;
334 }
335
336 static int ldb_disp_setup(struct mxc_dispdrv_handle *disp, struct fb_info *fbi)
337 {
338         uint32_t reg, val;
339         uint32_t pixel_clk, rounded_pixel_clk;
340         struct clk *ldb_clk_parent;
341         struct ldb_data *ldb = mxc_dispdrv_getdata(disp);
342         int setting_idx, di;
343         int ret;
344
345         setting_idx = find_ldb_setting(ldb, fbi);
346         if (setting_idx < 0)
347                 return setting_idx;
348
349         di = ldb->setting[setting_idx].di;
350
351         /* restore channel mode setting */
352         val = readl(ldb->control_reg);
353         val |= ldb->setting[setting_idx].ch_val;
354         writel(val, ldb->control_reg);
355         dev_dbg(&ldb->pdev->dev, "LDB setup, control reg: 0x%08x\n",
356                         readl(ldb->control_reg));
357
358         /* vsync setup */
359         reg = readl(ldb->control_reg);
360         if (fbi->var.sync & FB_SYNC_VERT_HIGH_ACT) {
361                 if (di == 0)
362                         reg = (reg & ~LDB_DI0_VS_POL_MASK)
363                                 | LDB_DI0_VS_POL_ACT_HIGH;
364                 else
365                         reg = (reg & ~LDB_DI1_VS_POL_MASK)
366                                 | LDB_DI1_VS_POL_ACT_HIGH;
367         } else {
368                 if (di == 0)
369                         reg = (reg & ~LDB_DI0_VS_POL_MASK)
370                                 | LDB_DI0_VS_POL_ACT_LOW;
371                 else
372                         reg = (reg & ~LDB_DI1_VS_POL_MASK)
373                                 | LDB_DI1_VS_POL_ACT_LOW;
374         }
375         writel(reg, ldb->control_reg);
376
377         /* clk setup */
378         if (ldb->setting[setting_idx].clk_en)
379                  clk_disable_unprepare(ldb->setting[setting_idx].ldb_di_clk);
380         pixel_clk = (PICOS2KHZ(fbi->var.pixclock)) * 1000UL;
381         ldb_clk_parent = clk_get_parent(ldb->setting[setting_idx].ldb_di_clk);
382         if (IS_ERR(ldb_clk_parent)) {
383                 dev_err(&ldb->pdev->dev, "get ldb di parent clk fail\n");
384                 return PTR_ERR(ldb_clk_parent);
385         }
386         if ((ldb->mode == LDB_SPL_DI0) || (ldb->mode == LDB_SPL_DI1))
387                 ret = clk_set_rate(ldb_clk_parent, pixel_clk * 7 / 2);
388         else
389                 ret = clk_set_rate(ldb_clk_parent, pixel_clk * 7);
390         if (ret < 0) {
391                 dev_err(&ldb->pdev->dev, "set ldb parent clk fail:%d\n", ret);
392                 return ret;
393         }
394         rounded_pixel_clk = clk_round_rate(ldb->setting[setting_idx].ldb_di_clk,
395                                                 pixel_clk);
396         dev_dbg(&ldb->pdev->dev, "pixel_clk:%d, rounded_pixel_clk:%d\n",
397                         pixel_clk, rounded_pixel_clk);
398         ret = clk_set_rate(ldb->setting[setting_idx].ldb_di_clk,
399                                 rounded_pixel_clk);
400         if (ret < 0) {
401                 dev_err(&ldb->pdev->dev, "set ldb di clk fail:%d\n", ret);
402                 return ret;
403         }
404         ret = clk_prepare_enable(ldb->setting[setting_idx].ldb_di_clk);
405         if (ret < 0) {
406                 dev_err(&ldb->pdev->dev, "enable ldb di clk fail:%d\n", ret);
407                 return ret;
408         }
409
410         if (!ldb->setting[setting_idx].clk_en)
411                 ldb->setting[setting_idx].clk_en = true;
412
413         return 0;
414 }
415
416 int ldb_fb_event(struct notifier_block *nb, unsigned long val, void *v)
417 {
418         struct ldb_data *ldb = container_of(nb, struct ldb_data, nb);
419         struct fb_event *event = v;
420         struct fb_info *fbi = event->info;
421         int index;
422         uint32_t data;
423
424         index = find_ldb_setting(ldb, fbi);
425         if (index < 0)
426                 return 0;
427
428         fbi->mode = (struct fb_videomode *)fb_match_mode(&fbi->var,
429                         &fbi->modelist);
430
431         if (!fbi->mode) {
432                 dev_warn(&ldb->pdev->dev,
433                                 "LDB: can not find mode for xres=%d, yres=%d\n",
434                                 fbi->var.xres, fbi->var.yres);
435                 if (ldb->setting[index].clk_en) {
436                         clk_disable(ldb->setting[index].ldb_di_clk);
437                         ldb->setting[index].clk_en = false;
438                         data = readl(ldb->control_reg);
439                         data &= ~ldb->setting[index].ch_mask;
440                         writel(data, ldb->control_reg);
441                 }
442                 return 0;
443         }
444
445         switch (val) {
446         case FB_EVENT_BLANK:
447         {
448                 if (*((int *)event->data) == FB_BLANK_UNBLANK) {
449                         if (!ldb->setting[index].clk_en) {
450                                 clk_enable(ldb->setting[index].ldb_di_clk);
451                                 ldb->setting[index].clk_en = true;
452                         }
453                 } else {
454                         if (ldb->setting[index].clk_en) {
455                                 clk_disable(ldb->setting[index].ldb_di_clk);
456                                 ldb->setting[index].clk_en = false;
457                                 data = readl(ldb->control_reg);
458                                 data &= ~ldb->setting[index].ch_mask;
459                                 writel(data, ldb->control_reg);
460                                 dev_dbg(&ldb->pdev->dev,
461                                         "LDB blank, control reg: 0x%08x\n",
462                                                 readl(ldb->control_reg));
463                         }
464                 }
465                 break;
466         }
467         case FB_EVENT_SUSPEND:
468                 if (ldb->setting[index].clk_en) {
469                         clk_disable(ldb->setting[index].ldb_di_clk);
470                         ldb->setting[index].clk_en = false;
471                 }
472                 break;
473         default:
474                 break;
475         }
476         return 0;
477 }
478
479 #define LVDS_MUX_CTL_WIDTH      2
480 #define LVDS_MUX_CTL_MASK       3
481 #define LVDS0_MUX_CTL_OFFS      6
482 #define LVDS1_MUX_CTL_OFFS      8
483 #define LVDS0_MUX_CTL_MASK      (LVDS_MUX_CTL_MASK << 6)
484 #define LVDS1_MUX_CTL_MASK      (LVDS_MUX_CTL_MASK << 8)
485 #define ROUTE_IPU_DI(ipu, di)   (((ipu << 1) | di) & LVDS_MUX_CTL_MASK)
486 static int ldb_ipu_ldb_route(int ipu, int di, struct ldb_data *ldb)
487 {
488         uint32_t reg;
489         int channel;
490         int shift;
491         int mode = ldb->mode;
492
493         reg = readl(ldb->gpr3_reg);
494         if (mode < LDB_SIN0) {
495                 reg &= ~(LVDS0_MUX_CTL_MASK | LVDS1_MUX_CTL_MASK);
496                 reg |= (ROUTE_IPU_DI(ipu, di) << LVDS0_MUX_CTL_OFFS) |
497                         (ROUTE_IPU_DI(ipu, di) << LVDS1_MUX_CTL_OFFS);
498                 dev_dbg(&ldb->pdev->dev,
499                         "Dual/Split mode both channels route to IPU%d-DI%d\n",
500                         ipu, di);
501         } else if ((mode == LDB_SIN0) || (mode == LDB_SIN1)) {
502                 reg &= ~(LVDS0_MUX_CTL_MASK | LVDS1_MUX_CTL_MASK);
503                 channel = mode - LDB_SIN0;
504                 shift = LVDS0_MUX_CTL_OFFS + channel * LVDS_MUX_CTL_WIDTH;
505                 reg |= ROUTE_IPU_DI(ipu, di) << shift;
506                 dev_dbg(&ldb->pdev->dev,
507                         "Single mode channel %d route to IPU%d-DI%d\n",
508                                 channel, ipu, di);
509         } else {
510                 static bool first = true;
511
512                 if (first) {
513                         if (mode == LDB_SEP0) {
514                                 reg &= ~LVDS0_MUX_CTL_MASK;
515                                 channel = 0;
516                         } else {
517                                 reg &= ~LVDS1_MUX_CTL_MASK;
518                                 channel = 1;
519                         }
520                         first = false;
521                 } else {
522                         if (mode == LDB_SEP0) {
523                                 reg &= ~LVDS1_MUX_CTL_MASK;
524                                 channel = 1;
525                         } else {
526                                 reg &= ~LVDS0_MUX_CTL_MASK;
527                                 channel = 0;
528                         }
529                 }
530
531                 shift = LVDS0_MUX_CTL_OFFS + channel * LVDS_MUX_CTL_WIDTH;
532                 reg |= ROUTE_IPU_DI(ipu, di) << shift;
533
534                 dev_dbg(&ldb->pdev->dev,
535                         "Separate mode channel %d route to IPU%d-DI%d\n",
536                         channel, ipu, di);
537         }
538         writel(reg, ldb->gpr3_reg);
539
540         return 0;
541 }
542
543 static int ldb_disp_init(struct mxc_dispdrv_handle *disp,
544         struct mxc_dispdrv_setting *setting)
545 {
546         int ret = 0, i, lvds_channel = 0;
547         struct ldb_data *ldb = mxc_dispdrv_getdata(disp);
548         struct fsl_mxc_ldb_platform_data *plat_data = ldb->pdev->dev.platform_data;
549         struct resource *res;
550         uint32_t reg, setting_idx;
551         uint32_t ch_mask = 0, ch_val = 0;
552         uint32_t ipu_id, disp_id;
553         char di_clk[] = "ipu1_di0_sel";
554         char ldb_clk[] = "ldb_di0";
555         char div_3_5_clk[] = "di0_div_3_5";
556         char div_7_clk[] = "di0_div_7";
557         char div_sel_clk[] = "di0_div_sel";
558
559         /* if input format not valid, make RGB666 as default*/
560         if (!valid_mode(setting->if_fmt)) {
561                 dev_warn(&ldb->pdev->dev, "Input pixel format not valid"
562                                         " use default RGB666\n");
563                 setting->if_fmt = IPU_PIX_FMT_RGB666;
564         }
565
566         if (!ldb->inited) {
567                 setting_idx = 0;
568                 res = platform_get_resource(ldb->pdev, IORESOURCE_MEM, 0);
569                 if (!res) {
570                         dev_err(&ldb->pdev->dev, "get iomem fail.\n");
571                         return -ENOMEM;
572                 }
573
574                 ldb->reg = devm_ioremap(&ldb->pdev->dev, res->start,
575                                         resource_size(res));
576                 ldb->control_reg = ldb->reg + 2;
577                 ldb->gpr3_reg = ldb->reg + 3;
578
579                 /* ipu selected by platform data setting */
580                 setting->dev_id = plat_data->ipu_id;
581
582                 reg = readl(ldb->control_reg);
583
584                 /* refrence resistor select */
585                 reg &= ~LDB_BGREF_RMODE_MASK;
586                 if (plat_data->ext_ref)
587                         reg |= LDB_BGREF_RMODE_EXT;
588                 else
589                         reg |= LDB_BGREF_RMODE_INT;
590
591                 /* TODO: now only use SPWG data mapping for both channel */
592                 reg &= ~(LDB_BIT_MAP_CH0_MASK | LDB_BIT_MAP_CH1_MASK);
593                 reg |= LDB_BIT_MAP_CH0_SPWG | LDB_BIT_MAP_CH1_SPWG;
594
595                 /* channel mode setting */
596                 reg &= ~(LDB_CH0_MODE_MASK | LDB_CH1_MODE_MASK);
597                 reg &= ~(LDB_DATA_WIDTH_CH0_MASK | LDB_DATA_WIDTH_CH1_MASK);
598
599                 if (bits_per_pixel(setting->if_fmt) == 24)
600                         reg |= LDB_DATA_WIDTH_CH0_24 | LDB_DATA_WIDTH_CH1_24;
601                 else
602                         reg |= LDB_DATA_WIDTH_CH0_18 | LDB_DATA_WIDTH_CH1_18;
603
604                 if (g_ldb_mode >= LDB_SPL_DI0)
605                         ldb->mode = g_ldb_mode;
606                 else
607                         ldb->mode = plat_data->mode;
608
609                 if ((ldb->mode == LDB_SIN0) || (ldb->mode == LDB_SIN1)) {
610                         ret = ldb->mode - LDB_SIN0;
611                         if (plat_data->disp_id != ret) {
612                                 dev_warn(&ldb->pdev->dev,
613                                         "change IPU DI%d to IPU DI%d for LDB "
614                                         "channel%d.\n",
615                                         plat_data->disp_id, ret, ret);
616                                 plat_data->disp_id = ret;
617                         }
618                 } else if (((ldb->mode == LDB_SEP0) || (ldb->mode == LDB_SEP1))
619                                 && is_imx6_ldb(plat_data)) {
620                         if (plat_data->disp_id == plat_data->sec_disp_id) {
621                                 dev_err(&ldb->pdev->dev,
622                                         "For LVDS separate mode,"
623                                         "two DIs should be different!\n");
624                                 return -EINVAL;
625                         }
626
627                         if (((!plat_data->disp_id) && (ldb->mode == LDB_SEP1))
628                                 || ((plat_data->disp_id) &&
629                                         (ldb->mode == LDB_SEP0))) {
630                                 dev_dbg(&ldb->pdev->dev,
631                                         "LVDS separate mode:"
632                                         "swap DI configuration!\n");
633                                 ipu_id = plat_data->ipu_id;
634                                 disp_id = plat_data->disp_id;
635                                 plat_data->ipu_id = plat_data->sec_ipu_id;
636                                 plat_data->disp_id = plat_data->sec_disp_id;
637                                 plat_data->sec_ipu_id = ipu_id;
638                                 plat_data->sec_disp_id = disp_id;
639                         }
640                 }
641
642                 if (ldb->mode == LDB_SPL_DI0) {
643                         reg |= LDB_SPLIT_MODE_EN | LDB_CH0_MODE_EN_TO_DI0
644                                 | LDB_CH1_MODE_EN_TO_DI0;
645                         setting->disp_id = 0;
646                 } else if (ldb->mode == LDB_SPL_DI1) {
647                         reg |= LDB_SPLIT_MODE_EN | LDB_CH0_MODE_EN_TO_DI1
648                                 | LDB_CH1_MODE_EN_TO_DI1;
649                         setting->disp_id = 1;
650                 } else if (ldb->mode == LDB_DUL_DI0) {
651                         reg &= ~LDB_SPLIT_MODE_EN;
652                         reg |= LDB_CH0_MODE_EN_TO_DI0 | LDB_CH1_MODE_EN_TO_DI0;
653                         setting->disp_id = 0;
654                 } else if (ldb->mode == LDB_DUL_DI1) {
655                         reg &= ~LDB_SPLIT_MODE_EN;
656                         reg |= LDB_CH0_MODE_EN_TO_DI1 | LDB_CH1_MODE_EN_TO_DI1;
657                         setting->disp_id = 1;
658                 } else if (ldb->mode == LDB_SIN0) {
659                         reg &= ~LDB_SPLIT_MODE_EN;
660                         setting->disp_id = plat_data->disp_id;
661                         if (setting->disp_id == 0)
662                                 reg |= LDB_CH0_MODE_EN_TO_DI0;
663                         else
664                                 reg |= LDB_CH0_MODE_EN_TO_DI1;
665                         ch_mask = LDB_CH0_MODE_MASK;
666                         ch_val = reg & LDB_CH0_MODE_MASK;
667                 } else if (ldb->mode == LDB_SIN1) {
668                         reg &= ~LDB_SPLIT_MODE_EN;
669                         setting->disp_id = plat_data->disp_id;
670                         if (setting->disp_id == 0)
671                                 reg |= LDB_CH1_MODE_EN_TO_DI0;
672                         else
673                                 reg |= LDB_CH1_MODE_EN_TO_DI1;
674                         ch_mask = LDB_CH1_MODE_MASK;
675                         ch_val = reg & LDB_CH1_MODE_MASK;
676                 } else { /* separate mode*/
677                         setting->disp_id = plat_data->disp_id;
678
679                         /* first output is LVDS0 or LVDS1 */
680                         if (ldb->mode == LDB_SEP0)
681                                 lvds_channel = 0;
682                         else
683                                 lvds_channel = 1;
684
685                         reg &= ~LDB_SPLIT_MODE_EN;
686
687                         if ((lvds_channel == 0) && (setting->disp_id == 0))
688                                 reg |= LDB_CH0_MODE_EN_TO_DI0;
689                         else if ((lvds_channel == 0) && (setting->disp_id == 1))
690                                 reg |= LDB_CH0_MODE_EN_TO_DI1;
691                         else if ((lvds_channel == 1) && (setting->disp_id == 0))
692                                 reg |= LDB_CH1_MODE_EN_TO_DI0;
693                         else
694                                 reg |= LDB_CH1_MODE_EN_TO_DI1;
695                         ch_mask = lvds_channel ? LDB_CH1_MODE_MASK :
696                                         LDB_CH0_MODE_MASK;
697                         ch_val = reg & ch_mask;
698
699                         if (bits_per_pixel(setting->if_fmt) == 24) {
700                                 if (lvds_channel == 0)
701                                         reg &= ~LDB_DATA_WIDTH_CH1_24;
702                                 else
703                                         reg &= ~LDB_DATA_WIDTH_CH0_24;
704                         } else {
705                                 if (lvds_channel == 0)
706                                         reg &= ~LDB_DATA_WIDTH_CH1_18;
707                                 else
708                                         reg &= ~LDB_DATA_WIDTH_CH0_18;
709                         }
710                 }
711
712                 writel(reg, ldb->control_reg);
713                 if (ldb->mode <  LDB_SIN0) {
714                         ch_mask = LDB_CH0_MODE_MASK | LDB_CH1_MODE_MASK;
715                         ch_val = reg & (LDB_CH0_MODE_MASK | LDB_CH1_MODE_MASK);
716                 }
717         } else { /* second time for separate mode */
718                 if ((ldb->mode == LDB_SPL_DI0) ||
719                         (ldb->mode == LDB_SPL_DI1) ||
720                         (ldb->mode == LDB_DUL_DI0) ||
721                         (ldb->mode == LDB_DUL_DI1) ||
722                         (ldb->mode == LDB_SIN0) ||
723                         (ldb->mode == LDB_SIN1)) {
724                         dev_err(&ldb->pdev->dev, "for second ldb disp"
725                                         "ldb mode should in separate mode\n");
726                         return -EINVAL;
727                 }
728
729                 setting_idx = 1;
730                 if (is_imx6_ldb(plat_data)) {
731                         setting->dev_id = plat_data->sec_ipu_id;
732                         setting->disp_id = plat_data->sec_disp_id;
733                 } else {
734                         setting->dev_id = plat_data->ipu_id;
735                         setting->disp_id = !plat_data->disp_id;
736                 }
737                 if (setting->disp_id == ldb->setting[0].di) {
738                         dev_err(&ldb->pdev->dev, "Err: for second ldb disp in"
739                                 "separate mode, DI should be different!\n");
740                         return -EINVAL;
741                 }
742
743                 /* second output is LVDS0 or LVDS1 */
744                 if (ldb->mode == LDB_SEP0)
745                         lvds_channel = 1;
746                 else
747                         lvds_channel = 0;
748
749                 reg = readl(ldb->control_reg);
750                 if ((lvds_channel == 0) && (setting->disp_id == 0))
751                         reg |= LDB_CH0_MODE_EN_TO_DI0;
752                 else if ((lvds_channel == 0) && (setting->disp_id == 1))
753                         reg |= LDB_CH0_MODE_EN_TO_DI1;
754                 else if ((lvds_channel == 1) && (setting->disp_id == 0))
755                         reg |= LDB_CH1_MODE_EN_TO_DI0;
756                 else
757                         reg |= LDB_CH1_MODE_EN_TO_DI1;
758                 ch_mask = lvds_channel ?  LDB_CH1_MODE_MASK :
759                                 LDB_CH0_MODE_MASK;
760                 ch_val = reg & ch_mask;
761
762                 if (bits_per_pixel(setting->if_fmt) == 24) {
763                         if (lvds_channel == 0)
764                                 reg |= LDB_DATA_WIDTH_CH0_24;
765                         else
766                                 reg |= LDB_DATA_WIDTH_CH1_24;
767                 } else {
768                         if (lvds_channel == 0)
769                                 reg |= LDB_DATA_WIDTH_CH0_18;
770                         else
771                                 reg |= LDB_DATA_WIDTH_CH1_18;
772                 }
773                 writel(reg, ldb->control_reg);
774         }
775
776         /* get clocks */
777         if (is_imx6_ldb(plat_data) &&
778                 ((ldb->mode == LDB_SEP0) || (ldb->mode == LDB_SEP1))) {
779                 ldb_clk[6] += lvds_channel;
780                 div_3_5_clk[2] += lvds_channel;
781                 div_7_clk[2] += lvds_channel;
782                 div_sel_clk[2] += lvds_channel;
783         } else {
784                 ldb_clk[6] += setting->disp_id;
785                 div_3_5_clk[2] += setting->disp_id;
786                 div_7_clk[2] += setting->disp_id;
787                 div_sel_clk[2] += setting->disp_id;
788         }
789         ldb->setting[setting_idx].ldb_di_clk = clk_get(&ldb->pdev->dev,
790                                                         ldb_clk);
791         if (IS_ERR(ldb->setting[setting_idx].ldb_di_clk)) {
792                 dev_err(&ldb->pdev->dev, "get ldb clk failed\n");
793                 return PTR_ERR(ldb->setting[setting_idx].ldb_di_clk);
794         }
795
796         ldb->setting[setting_idx].div_3_5_clk = clk_get(&ldb->pdev->dev,
797                                                         div_3_5_clk);
798         if (IS_ERR(ldb->setting[setting_idx].div_3_5_clk)) {
799                 dev_err(&ldb->pdev->dev, "get div 3.5 clk failed\n");
800                 return PTR_ERR(ldb->setting[setting_idx].div_3_5_clk);
801         }
802         ldb->setting[setting_idx].div_7_clk = clk_get(&ldb->pdev->dev,
803                                                         div_7_clk);
804         if (IS_ERR(ldb->setting[setting_idx].div_7_clk)) {
805                 dev_err(&ldb->pdev->dev, "get div 7 clk failed\n");
806                 return PTR_ERR(ldb->setting[setting_idx].div_7_clk);
807         }
808
809         ldb->setting[setting_idx].div_sel_clk = clk_get(&ldb->pdev->dev,
810                                                         div_sel_clk);
811         if (IS_ERR(ldb->setting[setting_idx].div_sel_clk)) {
812                 dev_err(&ldb->pdev->dev, "get div sel clk failed\n");
813                 return PTR_ERR(ldb->setting[setting_idx].div_sel_clk);
814         }
815
816         di_clk[3] += setting->dev_id;
817         di_clk[7] += setting->disp_id;
818         ldb->setting[setting_idx].di_clk = clk_get(&ldb->pdev->dev,
819                                                         di_clk);
820         if (IS_ERR(ldb->setting[setting_idx].di_clk)) {
821                 dev_err(&ldb->pdev->dev, "get di clk failed\n");
822                 return PTR_ERR(ldb->setting[setting_idx].di_clk);
823         }
824
825         ldb->setting[setting_idx].ch_mask = ch_mask;
826         ldb->setting[setting_idx].ch_val = ch_val;
827
828         if (is_imx6_ldb(plat_data))
829                 ldb_ipu_ldb_route(setting->dev_id, setting->disp_id, ldb);
830
831         /* must use spec video mode defined by driver */
832         ret = fb_find_mode(&setting->fbi->var, setting->fbi, setting->dft_mode_str,
833                                 ldb_modedb, ldb_modedb_sz, NULL, setting->default_bpp);
834         if (ret != 1)
835                 fb_videomode_to_var(&setting->fbi->var, &ldb_modedb[0]);
836
837         INIT_LIST_HEAD(&setting->fbi->modelist);
838         for (i = 0; i < ldb_modedb_sz; i++) {
839                 struct fb_videomode m;
840                 fb_var_to_videomode(&m, &setting->fbi->var);
841                 if (fb_mode_is_equal(&m, &ldb_modedb[i])) {
842                         fb_add_videomode(&ldb_modedb[i],
843                                         &setting->fbi->modelist);
844                         break;
845                 }
846         }
847
848         ldb->setting[setting_idx].ipu = setting->dev_id;
849         ldb->setting[setting_idx].di = setting->disp_id;
850
851         return ret;
852 }
853
854 static int ldb_post_disp_init(struct mxc_dispdrv_handle *disp,
855                                 int ipu_id, int disp_id)
856 {
857         struct ldb_data *ldb = mxc_dispdrv_getdata(disp);
858         int setting_idx = ldb->inited ? 1 : 0;
859         int ret = 0;
860
861         if (!ldb->inited) {
862                 ldb->nb.notifier_call = ldb_fb_event;
863                 fb_register_client(&ldb->nb);
864         }
865
866         ret = clk_set_parent(ldb->setting[setting_idx].di_clk,
867                         ldb->setting[setting_idx].ldb_di_clk);
868         if (ret) {
869                 dev_err(&ldb->pdev->dev, "fail to set ldb_di clk as"
870                         "the parent of ipu_di clk\n");
871                 return ret;
872         }
873
874         if ((ldb->mode == LDB_SPL_DI0) || (ldb->mode == LDB_SPL_DI1)) {
875                 ret = clk_set_parent(ldb->setting[setting_idx].div_sel_clk,
876                                 ldb->setting[setting_idx].div_3_5_clk);
877                 if (ret) {
878                         dev_err(&ldb->pdev->dev, "fail to set div 3.5 clk as"
879                                 "the parent of div sel clk\n");
880                         return ret;
881                 }
882         } else {
883                 ret = clk_set_parent(ldb->setting[setting_idx].div_sel_clk,
884                                 ldb->setting[setting_idx].div_7_clk);
885                 if (ret) {
886                         dev_err(&ldb->pdev->dev, "fail to set div 7 clk as"
887                                 "the parent of div sel clk\n");
888                         return ret;
889                 }
890         }
891
892         /* save active ldb setting for fb notifier */
893         ldb->setting[setting_idx].active = true;
894
895         ldb->inited = true;
896         return ret;
897 }
898
899 static void ldb_disp_deinit(struct mxc_dispdrv_handle *disp)
900 {
901         struct ldb_data *ldb = mxc_dispdrv_getdata(disp);
902         int i;
903
904         writel(0, ldb->control_reg);
905
906         for (i = 0; i < 2; i++) {
907                 clk_disable(ldb->setting[i].ldb_di_clk);
908                 clk_put(ldb->setting[i].ldb_di_clk);
909                 clk_put(ldb->setting[i].div_3_5_clk);
910                 clk_put(ldb->setting[i].div_7_clk);
911                 clk_put(ldb->setting[i].div_sel_clk);
912         }
913
914         fb_unregister_client(&ldb->nb);
915 }
916
917 static struct mxc_dispdrv_driver ldb_drv = {
918         .name   = DISPDRV_LDB,
919         .init   = ldb_disp_init,
920         .post_init = ldb_post_disp_init,
921         .deinit = ldb_disp_deinit,
922         .setup = ldb_disp_setup,
923 };
924
925 static int ldb_suspend(struct platform_device *pdev, pm_message_t state)
926 {
927         struct ldb_data *ldb = dev_get_drvdata(&pdev->dev);
928         uint32_t        data;
929
930         if (!ldb->inited)
931                 return 0;
932         data = readl(ldb->control_reg);
933         ldb->control_reg_data = data;
934         data &= ~(LDB_CH0_MODE_MASK | LDB_CH1_MODE_MASK);
935         writel(data, ldb->control_reg);
936
937         return 0;
938 }
939
940 static int ldb_resume(struct platform_device *pdev)
941 {
942         struct ldb_data *ldb = dev_get_drvdata(&pdev->dev);
943
944         if (!ldb->inited)
945                 return 0;
946         writel(ldb->control_reg_data, ldb->control_reg);
947
948         return 0;
949 }
950
951 static struct platform_device_id imx_ldb_devtype[] = {
952         {
953                 .name = "ldb-imx6",
954                 .driver_data = LDB_IMX6,
955         }, {
956                 /* sentinel */
957         }
958 };
959
960 static const struct of_device_id imx_ldb_dt_ids[] = {
961         { .compatible = "fsl,imx6q-ldb", .data = &imx_ldb_devtype[IMX6_LDB],},
962         { /* sentinel */ }
963 };
964
965 /*!
966  * This function is called by the driver framework to initialize the LDB
967  * device.
968  *
969  * @param       dev     The device structure for the LDB passed in by the
970  *                      driver framework.
971  *
972  * @return      Returns 0 on success or negative error code on error
973  */
974 static int ldb_probe(struct platform_device *pdev)
975 {
976         int ret = 0;
977         struct ldb_data *ldb;
978         struct fsl_mxc_ldb_platform_data *plat_data;
979         const struct of_device_id *of_id =
980                         of_match_device(imx_ldb_dt_ids, &pdev->dev);
981
982         dev_dbg(&pdev->dev, "%s enter\n", __func__);
983         ldb = devm_kzalloc(&pdev->dev, sizeof(struct ldb_data), GFP_KERNEL);
984         if (!ldb)
985                 return -ENOMEM;
986
987         plat_data = devm_kzalloc(&pdev->dev,
988                                 sizeof(struct fsl_mxc_ldb_platform_data),
989                                 GFP_KERNEL);
990         if (!plat_data)
991                 return -ENOMEM;
992         pdev->dev.platform_data = plat_data;
993         if (of_id)
994                 pdev->id_entry = of_id->data;
995         plat_data->devtype = pdev->id_entry->driver_data;
996
997         ret = ldb_get_of_property(pdev, plat_data);
998         if (ret < 0) {
999                 dev_err(&pdev->dev, "get ldb of property fail\n");
1000                 return ret;
1001         }
1002
1003         ldb->pdev = pdev;
1004         ldb->disp_ldb = mxc_dispdrv_register(&ldb_drv);
1005         mxc_dispdrv_setdata(ldb->disp_ldb, ldb);
1006
1007         dev_set_drvdata(&pdev->dev, ldb);
1008
1009         dev_dbg(&pdev->dev, "%s exit\n", __func__);
1010         return ret;
1011 }
1012
1013 static int ldb_remove(struct platform_device *pdev)
1014 {
1015         struct ldb_data *ldb = dev_get_drvdata(&pdev->dev);
1016
1017         if (!ldb->inited)
1018                 return 0;
1019         mxc_dispdrv_puthandle(ldb->disp_ldb);
1020         mxc_dispdrv_unregister(ldb->disp_ldb);
1021         return 0;
1022 }
1023
1024 static struct platform_driver mxcldb_driver = {
1025         .driver = {
1026                 .name = "mxc_ldb",
1027                 .of_match_table = imx_ldb_dt_ids,
1028         },
1029         .probe = ldb_probe,
1030         .remove = ldb_remove,
1031         .suspend = ldb_suspend,
1032         .resume = ldb_resume,
1033 };
1034
1035 static int __init ldb_init(void)
1036 {
1037         return platform_driver_register(&mxcldb_driver);
1038 }
1039
1040 static void __exit ldb_uninit(void)
1041 {
1042         platform_driver_unregister(&mxcldb_driver);
1043 }
1044
1045 module_init(ldb_init);
1046 module_exit(ldb_uninit);
1047
1048 MODULE_AUTHOR("Freescale Semiconductor, Inc.");
1049 MODULE_DESCRIPTION("MXC LDB driver");
1050 MODULE_LICENSE("GPL");