/* * Copyright 2013 Lothar Waßmann * * The code contained herein is licensed under the GNU General Public * License. You may obtain a copy of the GNU General Public License * Version 2 at the following locations: * * http://www.opensource.org/licenses/gpl-license.html * http://www.gnu.org/copyleft/gpl.html */ #include #include #include / { aliases { can0 = &can2; can1 = &can1; display = &display; ethernet0 = &fec; lcdif_23bit_pins_a = &tx6_pinctrl_disp0_1; lcdif_24bit_pins_a = &tx6_pinctrl_disp0_2; lvds0 = &lvds0; lvds1 = &lvds1; pwm0 = &pwm1; pwm1 = &pwm2; reg_can_xcvr = ®_can_xcvr; stk5led = &user_led; usbotg = &usbotg; sdhc0 = &usdhc1; sdhc1 = &usdhc2; }; memory { reg = <0 0>; /* will be filled by U-Boot */ }; clocks { #address-cells = <1>; #size-cells = <0>; mclk: codec_clock { compatible = "fixed-clock"; reg = <0>; #clock-cells = <0>; clock-frequency = <27000000>; }; }; backlight: backlight@0 { compatible = "pwm-backlight"; pwms = <&pwm2 0 500000 PWM_POLARITY_INVERTED>; power-supply = <®_3v3>; /* * a poor man's way to create a 1:1 relationship between * the PWM value and the actual duty cycle */ brightness-levels = < 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100>; default-brightness-level = <50>; }; backlight@1 { compatible = "pwm-backlight"; pwms = <&pwm1 0 500000>; power-supply = <®_3v3>; /* * a poor man's way to create a 1:1 relationship between * the PWM value and the actual duty cycle */ brightness-levels = < 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100>; default-brightness-level = <50>; status = "disabled"; }; display: display@di0 { compatible = "fsl,imx-parallel-display"; crtcs = <&ipu1 0>; interface-pix-fmt = "rgb24"; pinctrl-names = "default"; pinctrl-0 = <&tx6_pinctrl_disp0_1>; status = "okay"; display-timings { VGA { clock-frequency = <25200000>; hactive = <640>; vactive = <480>; hback-porch = <48>; hsync-len = <96>; hfront-porch = <16>; vback-porch = <31>; vsync-len = <2>; vfront-porch = <12>; hsync-active = <0>; vsync-active = <0>; de-active = <1>; pixelclk-active = <0>; }; ETV570 { clock-frequency = <25200000>; hactive = <640>; vactive = <480>; hback-porch = <114>; hsync-len = <30>; hfront-porch = <16>; vback-porch = <32>; vsync-len = <3>; vfront-porch = <10>; hsync-active = <0>; vsync-active = <0>; de-active = <1>; pixelclk-active = <0>; }; ET0350 { clock-frequency = <6413760>; hactive = <320>; vactive = <240>; hback-porch = <34>; hsync-len = <34>; hfront-porch = <20>; vback-porch = <15>; vsync-len = <3>; vfront-porch = <4>; hsync-active = <0>; vsync-active = <0>; de-active = <1>; pixelclk-active = <0>; }; ET0430 { clock-frequency = <9009000>; hactive = <480>; vactive = <272>; hback-porch = <2>; hsync-len = <41>; hfront-porch = <2>; vback-porch = <2>; vsync-len = <10>; vfront-porch = <2>; hsync-active = <0>; vsync-active = <0>; de-active = <1>; pixelclk-active = <1>; }; ET0500 { clock-frequency = <33264000>; hactive = <800>; vactive = <480>; hback-porch = <88>; hsync-len = <128>; hfront-porch = <40>; vback-porch = <33>; vsync-len = <2>; vfront-porch = <10>; hsync-active = <0>; vsync-active = <0>; de-active = <1>; pixelclk-active = <0>; }; ET0700 { /* same as ET0500 */ clock-frequency = <33264000>; hactive = <800>; vactive = <480>; hback-porch = <88>; hsync-len = <128>; hfront-porch = <40>; vback-porch = <33>; vsync-len = <2>; vfront-porch = <10>; hsync-active = <0>; vsync-active = <0>; de-active = <1>; pixelclk-active = <0>; }; ETQ570 { clock-frequency = <6596040>; hactive = <320>; vactive = <240>; hback-porch = <38>; hsync-len = <30>; hfront-porch = <30>; vback-porch = <16>; vsync-len = <3>; vfront-porch = <4>; hsync-active = <0>; vsync-active = <0>; de-active = <1>; pixelclk-active = <0>; }; }; }; gpio-keys { compatible = "gpio-keys"; power { label = "Power Button"; gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>; linux,code = ; gpio-key,wakeup; }; }; leds { compatible = "gpio-leds"; user_led: user { label = "Heartbeat"; gpios = <&gpio2 20 GPIO_ACTIVE_HIGH>; linux,default-trigger = "heartbeat"; }; }; regulators { compatible = "simple-bus"; #address-cells = <1>; #size-cells = <0>; reg_3v3_etn: regulator@0 { compatible = "regulator-fixed"; reg = <0>; regulator-name = "3V3_ETN"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; gpio = <&gpio3 20 GPIO_ACTIVE_HIGH>; enable-active-high; }; reg_2v5: regulator@1 { compatible = "regulator-fixed"; reg = <1>; regulator-name = "2V5"; regulator-min-microvolt = <2500000>; regulator-max-microvolt = <2500000>; regulator-always-on; }; reg_3v3: regulator@2 { compatible = "regulator-fixed"; reg = <2>; regulator-name = "3V3"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-always-on; }; reg_can_xcvr: regulator@3 { compatible = "regulator-fixed"; reg = <3>; regulator-name = "CAN XCVR"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; gpio = <&gpio4 21 GPIO_ACTIVE_HIGH>; enable-active-low; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_tx6qdl_flexcan_xcvr>; }; reg_lcd_pwr0: regulator@4 { compatible = "regulator-fixed"; reg = <4>; regulator-name = "LCD0 POWER"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; gpio = <&gpio2 31 GPIO_ACTIVE_HIGH>; enable-active-high; }; reg_lcd_pwr1: regulator@5 { compatible = "regulator-fixed"; reg = <5>; regulator-name = "LCD1 POWER"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; gpio = <&gpio3 29 GPIO_ACTIVE_HIGH>; enable-active-high; }; reg_lcd_reset: regulator@6 { compatible = "regulator-fixed"; reg = <6>; regulator-name = "LCD RESET"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; gpio = <&gpio3 29 GPIO_ACTIVE_HIGH>; startup-delay-us = <300000>; enable-active-high; regulator-always-on; }; reg_usbh1_vbus: regulator@7 { compatible = "regulator-fixed"; reg = <7>; regulator-name = "usbh1_vbus"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; gpio = <&gpio3 31 GPIO_ACTIVE_HIGH>; enable-active-high; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_tx6_usbh1_vbus>; }; reg_usbotg_vbus: regulator@8 { compatible = "regulator-fixed"; reg = <8>; regulator-name = "usbotg_vbus"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; gpio = <&gpio1 7 GPIO_ACTIVE_HIGH>; enable-active-high; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_tx6_usbotg_vbus>; }; }; sound { compatible = "fsl,imx6qdl-tx6qdl-sgtl5000", "fsl,imx-audio-sgtl5000"; model = "sgtl5000-audio"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_audmux_5>; ssi-controller = <&ssi1>; audio-codec = <&sgtl5000>; audio-routing = "MIC_IN", "Mic Jack", "Mic Jack", "Mic Bias", "Headphone Jack", "HP_OUT"; mux-int-port = <1>; mux-ext-port = <5>; }; }; &audmux { status = "okay"; }; &can1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_flexcan1_3>; xceiver-supply = <®_can_xcvr>; status = "okay"; }; &can2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_flexcan2_1>; xceiver-supply = <®_can_xcvr>; status = "okay"; }; &fec { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet_4>; phy-mode = "rmii"; phy-reset-gpios = <&gpio7 6 GPIO_ACTIVE_HIGH>; phy-supply = <®_3v3_etn>; status = "okay"; }; &gpmi { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_tx6_gpmi_nand>; nand-on-flash-bbt; status = "okay"; }; &i2c1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c1_1>; clock-frequency = <400000>; status = "okay"; ds1339: rtc@68 { compatible = "dallas,ds1339"; reg = <0x68>; }; }; &i2c3 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c3_2>; clock-frequency = <400000>; status = "okay"; touchscreen: tsc2007@48 { compatible = "ti,tsc2007"; reg = <0x48>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_tsc2007_1>; interrupt-parent = <&gpio3>; interrupts = <26 0>; gpios = <&gpio3 26 GPIO_ACTIVE_LOW>; ti,x-plate-ohms = <660>; linux,wakeup; }; polytouch: edt-ft5x06@38 { compatible = "edt,edt-ft5x06"; reg = <0x38>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_edt_ft5x06_1>; interrupt-parent = <&gpio6>; interrupts = <15 0>; reset-gpios = <&gpio2 22 GPIO_ACTIVE_LOW>; wake-gpios = <&gpio2 21 GPIO_ACTIVE_HIGH>; }; sgtl5000: sgtl5000@0a { compatible = "fsl,sgtl5000"; reg = <0x0a>; VDDA-supply = <®_2v5>; VDDIO-supply = <®_3v3>; clocks = <&mclk>; }; }; &iomuxc { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_hog>; display { tx6_pinctrl_disp0_1: disp0grp-1 { fsl,pins = < MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10 /* PAD DISP0_DAT0 is used for the Flexcan transceiver control */ MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10 MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x10 MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x10 MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x10 MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x10 MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x10 MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x10 MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x10 MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x10 MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x10 MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x10 MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x10 MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x10 MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x10 MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x10 MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x10 MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x10 MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x10 MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x10 >; }; tx6_pinctrl_disp0_2: disp0grp-2 { fsl,pins = < MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10 MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x10 MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x10 MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x10 MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x10 MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x10 MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x10 MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x10 MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x10 MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x10 MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x10 MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x10 MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x10 MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x10 MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x10 MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x10 MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x10 MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x10 MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x10 >; }; }; flexcan { pinctrl_tx6qdl_flexcan_xcvr: flexcan-xcvrgrp-1 { fsl,pins = < MX6QDL_PAD_DISP0_DAT0__GPIO4_IO21 0x1b0b0 /* Flexcan XCVR enable */ >; }; }; hog { pinctrl_hog: hoggrp { fsl,pins = < MX6QDL_PAD_EIM_A18__GPIO2_IO20 0x1b0b1 /* LED */ MX6QDL_PAD_SD3_DAT2__GPIO7_IO06 0x1b0b1 /* ETN PHY RESET */ MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x1b0b1 /* ETN PHY POWER */ MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1b0b1 /* ETN PHY INT MX6QDL_PAD_SD3_CMD__GPIO7_IO02 0x1b0b0 /* SD1 CD */ MX6QDL_PAD_SD3_CLK__GPIO7_IO03 0x1b0b0 /* SD2 CD */ MX6QDL_PAD_EIM_EB3__GPIO2_IO31 0x1b0b1 /* LCD Power Enable */ MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1b0b1 /* LCD Reset */ MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x1b0b1 /* PWR BTN */ >; }; }; kpp { pinctrl_kpp: kppgrp { fsl,pins = < MX6QDL_PAD_GPIO_9__KEY_COL6 0x1b0b1 MX6QDL_PAD_GPIO_4__KEY_COL7 0x1b0b1 MX6QDL_PAD_KEY_COL2__KEY_COL2 0x1b0b1 MX6QDL_PAD_KEY_COL3__KEY_COL3 0x1b0b1 MX6QDL_PAD_GPIO_2__KEY_ROW6 0x1b0b1 MX6QDL_PAD_GPIO_5__KEY_ROW7 0x1b0b1 MX6QDL_PAD_KEY_ROW2__KEY_ROW2 0x1b0b1 MX6QDL_PAD_KEY_ROW3__KEY_ROW3 0x1b0b1 >; }; }; nand { pinctrl_tx6_gpmi_nand: tx6-gpmi-nand { fsl,pins = < MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000 MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 >; }; }; touchpanel { pinctrl_tsc2007_1: tsc2007grp-1 { fsl,pins = < MX6QDL_PAD_EIM_D26__GPIO3_IO26 0x1b0b0 /* Interrupt */ >; }; pinctrl_edt_ft5x06_1: edt-ft5x06grp-1 { fsl,pins = < MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x1b0b0 /* Interrupt */ MX6QDL_PAD_EIM_A16__GPIO2_IO22 0x1b0b0 /* Reset */ MX6QDL_PAD_EIM_A17__GPIO2_IO21 0x1b0b0 /* Wake */ >; }; }; usbh1 { pinctrl_tx6_usbh1_vbus: tx6-usbh1-vbusgrp { fsl,pins = < MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x1b0b0 /* USBH1_VBUSEN */ >; }; }; usbotg { pinctrl_tx6_usbotg: tx6-usbotggrp { fsl,pins = < MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x17059 >; }; pinctrl_tx6_usbotg_vbus: tx6-usbotg-vbusgrp { fsl,pins = < MX6QDL_PAD_GPIO_7__GPIO1_IO07 0x1b0b0 /* USBOTG_VBUSEN */ >; }; }; }; &kpp { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_kpp>; /* sample keymap */ /* row/col 0,1 are mapped to KPP row/col 6,7 */ linux,keymap = < 0x06060074 /* row 6, col 6, KEY_POWER */ 0x06070052 /* row 6, col 7, KEY_KP0 */ 0x0602004f /* row 6, col 2, KEY_KP1 */ 0x06030050 /* row 6, col 3, KEY_KP2 */ 0x07060051 /* row 7, col 6, KEY_KP3 */ 0x0707004b /* row 7, col 7, KEY_KP4 */ 0x0702004c /* row 7, col 2, KEY_KP5 */ 0x0703004d /* row 7, col 3, KEY_KP6 */ 0x02060047 /* row 2, col 6, KEY_KP7 */ 0x02070048 /* row 2, col 7, KEY_KP8 */ 0x02020049 /* row 2, col 2, KEY_KP9 */ >; }; &ldb { status = "okay"; lvds0: lvds-channel@0 { fsl,data-mapping = "spwg"; fsl,data-width = <18>; status = "okay"; display-timings { native-mode = <&lvds_timing0>; lvds_timing0: hsd100pxn1 { clock-frequency = <65000000>; hactive = <1024>; vactive = <768>; hback-porch = <220>; hfront-porch = <40>; vback-porch = <21>; vfront-porch = <7>; hsync-len = <60>; vsync-len = <10>; }; }; }; lvds1: lvds-channel@1 { fsl,data-mapping = "spwg"; fsl,data-width = <18>; status = "okay"; display-timings { native-mode = <&lvds_timing1>; lvds_timing1: hsd100pxn1 { clock-frequency = <65000000>; hactive = <1024>; vactive = <768>; hback-porch = <220>; hfront-porch = <40>; vback-porch = <21>; vfront-porch = <7>; hsync-len = <60>; vsync-len = <10>; }; }; }; }; &pwm1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm1_2>; status = "okay"; }; &pwm2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm2_1>; status = "okay"; }; &ssi1 { fsl,mode = "i2s-slave"; status = "okay"; }; &uart1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart1_2>; status = "okay"; }; &uart2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart2_3 &pinctrl_uart2_rtscts_3>; status = "okay"; }; &uart3 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart3_3 &pinctrl_uart3_rtscts_3>; status = "okay"; }; &usbh1 { vbus-supply = <®_usbh1_vbus>; dr_mode = "host"; disable-over-current; status = "okay"; }; &usbotg { vbus-supply = <®_usbotg_vbus>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_tx6_usbotg>; dr_mode = "peripheral"; disable-over-current; status = "okay"; }; &usdhc1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usdhc1_2>; cd-gpios = <&gpio7 2 GPIO_ACTIVE_HIGH>; status = "okay"; }; &usdhc2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usdhc2_2>; cd-gpios = <&gpio7 3 GPIO_ACTIVE_HIGH>; status = "okay"; };