ARM: dts: imx6ul: add support for Ka-Ro TXUL modules

[karo-tx-linux.git] / arch / arm / boot / dts / imx6ul.dtsi

diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi
index b67638947db00974e89ea0e0ce31e6ad9d7d3d5a..993d1cb09faf468a735fb5c1602fb67e2f1d68ec 100644 (file)
--- a/arch/arm/boot/dts/imx6ul.dtsi
+++ b/arch/arm/boot/dts/imx6ul.dtsi
@@ -8,6 +8,7 @@
 
 #include <dt-bindings/clock/imx6ul-clock.h>
 #include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include "imx6ul-pinfunc.h"
 #include "skeleton.dtsi"
@@ -267,6 +268,85 @@
                                        clock-names = "ipg", "per";
                                        status = "disabled";
                                };
+
+                               sai1: sai@02028000 {
+                                       #sound-dai-cells = <0>;
+                                       compatible = "fsl,imx6q-ssi",
+                                                       "fsl,imx51-ssi";
+                                       reg = <0x02028000 0x4000>;
+                                       interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
+                                       clocks = <&clks IMX6UL_CLK_SAI1_IPG>,
+                                                <&clks IMX6UL_CLK_SAI1>;
+                                       clock-names = "ipg", "baud";
+                                       dmas = <&sdma 35 1 0>,
+                                              <&sdma 36 1 0>;
+                                       dma-names = "rx", "tx";
+                                       fsl,fifo-depth = <15>;
+                                       status = "disabled";
+                               };
+
+                               sai2: sai@0202c000 {
+                                       #sound-dai-cells = <0>;
+                                       compatible = "fsl,imx6q-ssi",
+                                                       "fsl,imx51-ssi";
+                                       reg = <0x0202c000 0x4000>;
+                                       interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
+                                       clocks = <&clks IMX6UL_CLK_SAI2_IPG>,
+                                                <&clks IMX6UL_CLK_SAI2>;
+                                       clock-names = "ipg", "baud";
+                                       dmas = <&sdma 37 1 0>,
+                                              <&sdma 38 1 0>;
+                                       dma-names = "rx", "tx";
+                                       fsl,fifo-depth = <15>;
+                                       status = "disabled";
+                               };
+
+                               sai3: sai@02030000 {
+                                       #sound-dai-cells = <0>;
+                                       compatible = "fsl,imx6q-ssi",
+                                                       "fsl,imx51-ssi";
+                                       reg = <0x02030000 0x4000>;
+                                       interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
+                                       clocks = <&clks IMX6UL_CLK_SAI3_IPG>,
+                                                <&clks IMX6UL_CLK_SAI3>;
+                                       clock-names = "ipg", "baud";
+                                       dmas = <&sdma 39 1 0>,
+                                              <&sdma 40 1 0>;
+                                       dma-names = "rx", "tx";
+                                       fsl,fifo-depth = <15>;
+                                       status = "disabled";
+                               };
+                       };
+
+                       tsc: tsc@02040000 {
+                               compatible = "fsl,imx6ul-tsc";
+                               reg = <0x02040000 0x4000>, <0x0219c000 0x4000>;
+                               interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
+                                            <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
+                               clocks = <&clks IMX6UL_CLK_IPG>,
+                                        <&clks IMX6UL_CLK_ADC2>;
+                               clock-names = "tsc", "adc";
+                               status = "disabled";
+                       };
+
+                       can1: flexcan@02090000 {
+                               compatible = "fsl,imx6q-flexcan";
+                               reg = <0x02090000 0x4000>;
+                               interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
+                               clocks = <&clks IMX6UL_CLK_CAN1_IPG>,
+                                        <&clks IMX6UL_CLK_CAN1_SERIAL>;
+                               clock-names = "ipg", "per";
+                               status = "disabled";
+                       };
+
+                       can2: flexcan@02094000 {
+                               compatible = "fsl,imx6q-flexcan";
+                               reg = <0x02094000 0x4000>;
+                               interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
+                               clocks = <&clks IMX6UL_CLK_CAN2_IPG>,
+                                        <&clks IMX6UL_CLK_CAN2_SERIAL>;
+                               clock-names = "ipg", "per";
+                               status = "disabled";
                        };
 
                        gpt1: gpt@02098000 {
@@ -350,6 +430,14 @@
                                status = "disabled";
                        };
 
+                       kpp: kpp@020b8000 {
+                               compatible = "fsl,imx6q-kpp", "fsl,imx21-kpp";
+                               reg = <0x020b8000 0x4000>;
+                               interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
+                               clocks = <&clks IMX6UL_CLK_KPP>;
+                               status = "disabled";
+                       };
+
                        wdog1: wdog@020bc000 {
                                compatible = "fsl,imx6ul-wdt", "fsl,imx21-wdt";
                                reg = <0x020bc000 0x4000>;
@@ -520,17 +608,28 @@
                                compatible = "fsl,imx6ul-gpt", "fsl,imx6sx-gpt";
                                reg = <0x020e8000 0x4000>;
                                interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
-                               clocks = <&clks IMX6UL_CLK_DUMMY>,
-                                        <&clks IMX6UL_CLK_DUMMY>;
+                               clocks = <&clks IMX6UL_CLK_GPT2_BUS>,
+                                        <&clks IMX6UL_CLK_GPT2_SERIAL>;
                                clock-names = "ipg", "per";
                        };
 
+                       sdma: sdma@020ec000 {
+                               compatible = "fsl,imx6q-sdma", "fsl,imx35-sdma";
+                               reg = <0x020ec000 0x4000>;
+                               interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
+                               clocks = <&clks IMX6UL_CLK_SDMA>,
+                                        <&clks IMX6UL_CLK_SDMA>;
+                               clock-names = "ipg", "ahb";
+                               #dma-cells = <3>;
+                               fsl,sdma-ram-script-name = "imx/sdma/sdma-imx6q.bin";
+                       };
+
                        pwm5: pwm@020f0000 {
                                compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
                                reg = <0x020f0000 0x4000>;
                                interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
-                               clocks = <&clks IMX6UL_CLK_DUMMY>,
-                                        <&clks IMX6UL_CLK_DUMMY>;
+                               clocks = <&clks IMX6UL_CLK_PWM5>,
+                                        <&clks IMX6UL_CLK_PWM5>;
                                clock-names = "ipg", "per";
                                #pwm-cells = <2>;
                        };
@@ -539,8 +638,8 @@
                                compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
                                reg = <0x020f4000 0x4000>;
                                interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
-                               clocks = <&clks IMX6UL_CLK_DUMMY>,
-                                        <&clks IMX6UL_CLK_DUMMY>;
+                               clocks = <&clks IMX6UL_CLK_PWM6>,
+                                        <&clks IMX6UL_CLK_PWM6>;
                                clock-names = "ipg", "per";
                                #pwm-cells = <2>;
                        };
@@ -549,8 +648,8 @@
                                compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
                                reg = <0x020f8000 0x4000>;
                                interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
-                               clocks = <&clks IMX6UL_CLK_DUMMY>,
-                                        <&clks IMX6UL_CLK_DUMMY>;
+                               clocks = <&clks IMX6UL_CLK_PWM7>,
+                                        <&clks IMX6UL_CLK_PWM7>;
                                clock-names = "ipg", "per";
                                #pwm-cells = <2>;
                        };
@@ -559,8 +658,8 @@
                                compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
                                reg = <0x020fc000 0x4000>;
                                interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
-                               clocks = <&clks IMX6UL_CLK_DUMMY>,
-                                        <&clks IMX6UL_CLK_DUMMY>;
+                               clocks = <&clks IMX6UL_CLK_PWM8>,
+                                        <&clks IMX6UL_CLK_PWM8>;
                                clock-names = "ipg", "per";
                                #pwm-cells = <2>;
                        };
@@ -617,17 +716,6 @@
                                status = "disabled";
                        };
 
-                       tsc: tsc@02040000 {
-                               compatible = "fsl,imx6ul-tsc";
-                               reg = <0x02040000 0x4000>, <0x0219c000 0x4000>;
-                               interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
-                                            <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
-                               clocks = <&clks IMX6UL_CLK_IPG>,
-                                        <&clks IMX6UL_CLK_ADC2>;
-                               clock-names = "tsc", "adc";
-                               status = "disabled";
-                       };
-
                        usdhc1: usdhc@02190000 {
                                compatible = "fsl,imx6ul-usdhc", "fsl,imx6sx-usdhc";
                                reg = <0x02190000 0x4000>;