Merge branch 'for-v3.16/ti-clk-drv' of github.com:t-kristo/linux-pm into clk-next

[karo-tx-linux.git] / arch / arm / boot / dts / omap54xx-clocks.dtsi

diff --git a/arch/arm/boot/dts/omap54xx-clocks.dtsi b/arch/arm/boot/dts/omap54xx-clocks.dtsi
index d487fdab392169043e5a1ff12398e86b9fffa5e5..e67a23b5d7884725290b6348a54a97f3427ccbc3 100644 (file)
--- a/arch/arm/boot/dts/omap54xx-clocks.dtsi
+++ b/arch/arm/boot/dts/omap54xx-clocks.dtsi
@@ -120,10 +120,8 @@
                compatible = "ti,divider-clock";
                clocks = <&dpll_abe_x2_ck>;
                ti,max-div = <31>;
-               ti,autoidle-shift = <8>;
                reg = <0x01f0>;
                ti,index-starts-at-one;
-               ti,invert-autoidle-bit;
        };
 
        abe_24m_fclk: abe_24m_fclk {
@@ -145,10 +143,11 @@
 
        abe_iclk: abe_iclk {
                #clock-cells = <0>;
-               compatible = "fixed-factor-clock";
-               clocks = <&abe_clk>;
-               clock-mult = <1>;
-               clock-div = <2>;
+               compatible = "ti,divider-clock";
+               clocks = <&aess_fclk>;
+               ti,bit-shift = <24>;
+               reg = <0x0528>;
+               ti,dividers = <2>, <1>;
        };
 
        abe_lp_clk_div: abe_lp_clk_div {
@@ -164,10 +163,8 @@
                compatible = "ti,divider-clock";
                clocks = <&dpll_abe_x2_ck>;
                ti,max-div = <31>;
-               ti,autoidle-shift = <8>;
                reg = <0x01f4>;
                ti,index-starts-at-one;
-               ti,invert-autoidle-bit;
        };
 
        dpll_core_ck: dpll_core_ck {
@@ -188,10 +185,8 @@
                compatible = "ti,divider-clock";
                clocks = <&dpll_core_x2_ck>;
                ti,max-div = <63>;
-               ti,autoidle-shift = <8>;
                reg = <0x0150>;
                ti,index-starts-at-one;
-               ti,invert-autoidle-bit;
        };
 
        c2c_fclk: c2c_fclk {
@@ -215,10 +210,8 @@
                compatible = "ti,divider-clock";
                clocks = <&dpll_core_x2_ck>;
                ti,max-div = <63>;
-               ti,autoidle-shift = <8>;
                reg = <0x0138>;
                ti,index-starts-at-one;
-               ti,invert-autoidle-bit;
        };
 
        dpll_core_h12x2_ck: dpll_core_h12x2_ck {
@@ -226,10 +219,8 @@
                compatible = "ti,divider-clock";
                clocks = <&dpll_core_x2_ck>;
                ti,max-div = <63>;
-               ti,autoidle-shift = <8>;
                reg = <0x013c>;
                ti,index-starts-at-one;
-               ti,invert-autoidle-bit;
        };
 
        dpll_core_h13x2_ck: dpll_core_h13x2_ck {
@@ -237,10 +228,8 @@
                compatible = "ti,divider-clock";
                clocks = <&dpll_core_x2_ck>;
                ti,max-div = <63>;
-               ti,autoidle-shift = <8>;
                reg = <0x0140>;
                ti,index-starts-at-one;
-               ti,invert-autoidle-bit;
        };
 
        dpll_core_h14x2_ck: dpll_core_h14x2_ck {
@@ -248,10 +237,8 @@
                compatible = "ti,divider-clock";
                clocks = <&dpll_core_x2_ck>;
                ti,max-div = <63>;
-               ti,autoidle-shift = <8>;
                reg = <0x0144>;
                ti,index-starts-at-one;
-               ti,invert-autoidle-bit;
        };
 
        dpll_core_h22x2_ck: dpll_core_h22x2_ck {
@@ -259,10 +246,8 @@
                compatible = "ti,divider-clock";
                clocks = <&dpll_core_x2_ck>;
                ti,max-div = <63>;
-               ti,autoidle-shift = <8>;
                reg = <0x0154>;
                ti,index-starts-at-one;
-               ti,invert-autoidle-bit;
        };
 
        dpll_core_h23x2_ck: dpll_core_h23x2_ck {
@@ -270,10 +255,8 @@
                compatible = "ti,divider-clock";
                clocks = <&dpll_core_x2_ck>;
                ti,max-div = <63>;
-               ti,autoidle-shift = <8>;
                reg = <0x0158>;
                ti,index-starts-at-one;
-               ti,invert-autoidle-bit;
        };
 
        dpll_core_h24x2_ck: dpll_core_h24x2_ck {
@@ -281,10 +264,8 @@
                compatible = "ti,divider-clock";
                clocks = <&dpll_core_x2_ck>;
                ti,max-div = <63>;
-               ti,autoidle-shift = <8>;
                reg = <0x015c>;
                ti,index-starts-at-one;
-               ti,invert-autoidle-bit;
        };
 
        dpll_core_m2_ck: dpll_core_m2_ck {
@@ -292,10 +273,8 @@
                compatible = "ti,divider-clock";
                clocks = <&dpll_core_ck>;
                ti,max-div = <31>;
-               ti,autoidle-shift = <8>;
                reg = <0x0130>;
                ti,index-starts-at-one;
-               ti,invert-autoidle-bit;
        };
 
        dpll_core_m3x2_ck: dpll_core_m3x2_ck {
@@ -303,10 +282,8 @@
                compatible = "ti,divider-clock";
                clocks = <&dpll_core_x2_ck>;
                ti,max-div = <31>;
-               ti,autoidle-shift = <8>;
                reg = <0x0134>;
                ti,index-starts-at-one;
-               ti,invert-autoidle-bit;
        };
 
        iva_dpll_hs_clk_div: iva_dpll_hs_clk_div {
@@ -335,10 +312,8 @@
                compatible = "ti,divider-clock";
                clocks = <&dpll_iva_x2_ck>;
                ti,max-div = <63>;
-               ti,autoidle-shift = <8>;
                reg = <0x01b8>;
                ti,index-starts-at-one;
-               ti,invert-autoidle-bit;
        };
 
        dpll_iva_h12x2_ck: dpll_iva_h12x2_ck {
@@ -346,10 +321,8 @@
                compatible = "ti,divider-clock";
                clocks = <&dpll_iva_x2_ck>;
                ti,max-div = <63>;
-               ti,autoidle-shift = <8>;
                reg = <0x01bc>;
                ti,index-starts-at-one;
-               ti,invert-autoidle-bit;
        };
 
        mpu_dpll_hs_clk_div: mpu_dpll_hs_clk_div {
@@ -362,7 +335,7 @@
 
        dpll_mpu_ck: dpll_mpu_ck {
                #clock-cells = <0>;
-               compatible = "ti,omap4-dpll-clock";
+               compatible = "ti,omap5-mpu-dpll-clock";
                clocks = <&sys_clkin>, <&mpu_dpll_hs_clk_div>;
                reg = <0x0160>, <0x0164>, <0x016c>, <0x0168>;
        };
@@ -372,10 +345,8 @@
                compatible = "ti,divider-clock";
                clocks = <&dpll_mpu_ck>;
                ti,max-div = <31>;
-               ti,autoidle-shift = <8>;
                reg = <0x0170>;
                ti,index-starts-at-one;
-               ti,invert-autoidle-bit;
        };
 
        per_dpll_hs_clk_div: per_dpll_hs_clk_div {
@@ -642,10 +613,8 @@
                compatible = "ti,divider-clock";
                clocks = <&dpll_per_x2_ck>;
                ti,max-div = <63>;
-               ti,autoidle-shift = <8>;
                reg = <0x0158>;
                ti,index-starts-at-one;
-               ti,invert-autoidle-bit;
        };
 
        dpll_per_h12x2_ck: dpll_per_h12x2_ck {
@@ -653,10 +622,8 @@
                compatible = "ti,divider-clock";
                clocks = <&dpll_per_x2_ck>;
                ti,max-div = <63>;
-               ti,autoidle-shift = <8>;
                reg = <0x015c>;
                ti,index-starts-at-one;
-               ti,invert-autoidle-bit;
        };
 
        dpll_per_h14x2_ck: dpll_per_h14x2_ck {
@@ -664,10 +631,8 @@
                compatible = "ti,divider-clock";
                clocks = <&dpll_per_x2_ck>;
                ti,max-div = <63>;
-               ti,autoidle-shift = <8>;
                reg = <0x0164>;
                ti,index-starts-at-one;
-               ti,invert-autoidle-bit;
        };
 
        dpll_per_m2_ck: dpll_per_m2_ck {
@@ -675,10 +640,8 @@
                compatible = "ti,divider-clock";
                clocks = <&dpll_per_ck>;
                ti,max-div = <31>;
-               ti,autoidle-shift = <8>;
                reg = <0x0150>;
                ti,index-starts-at-one;
-               ti,invert-autoidle-bit;
        };
 
        dpll_per_m2x2_ck: dpll_per_m2x2_ck {
@@ -686,10 +649,8 @@
                compatible = "ti,divider-clock";
                clocks = <&dpll_per_x2_ck>;
                ti,max-div = <31>;
-               ti,autoidle-shift = <8>;
                reg = <0x0150>;
                ti,index-starts-at-one;
-               ti,invert-autoidle-bit;
        };
 
        dpll_per_m3x2_ck: dpll_per_m3x2_ck {
@@ -697,10 +658,8 @@
                compatible = "ti,divider-clock";
                clocks = <&dpll_per_x2_ck>;
                ti,max-div = <31>;
-               ti,autoidle-shift = <8>;
                reg = <0x0154>;
                ti,index-starts-at-one;
-               ti,invert-autoidle-bit;
        };
 
        dpll_unipro1_ck: dpll_unipro1_ck {
@@ -723,10 +682,8 @@
                compatible = "ti,divider-clock";
                clocks = <&dpll_unipro1_ck>;
                ti,max-div = <127>;
-               ti,autoidle-shift = <8>;
                reg = <0x0210>;
                ti,index-starts-at-one;
-               ti,invert-autoidle-bit;
        };
 
        dpll_unipro2_ck: dpll_unipro2_ck {
@@ -749,10 +706,8 @@
                compatible = "ti,divider-clock";
                clocks = <&dpll_unipro2_ck>;
                ti,max-div = <127>;
-               ti,autoidle-shift = <8>;
                reg = <0x01d0>;
                ti,index-starts-at-one;
-               ti,invert-autoidle-bit;
        };
 
        dpll_usb_ck: dpll_usb_ck {
@@ -775,10 +730,8 @@
                compatible = "ti,divider-clock";
                clocks = <&dpll_usb_ck>;
                ti,max-div = <127>;
-               ti,autoidle-shift = <8>;
                reg = <0x0190>;
                ti,index-starts-at-one;
-               ti,invert-autoidle-bit;
        };
 
        func_128m_clk: func_128m_clk {
@@ -851,6 +804,7 @@
                clocks = <&dpll_per_h12x2_ck>;
                ti,bit-shift = <8>;
                reg = <0x1420>;
+               ti,set-rate-parent;
        };
 
        dss_sys_clk: dss_sys_clk {