Merge remote-tracking branch 'drivers-x86/for-next'

[karo-tx-linux.git] / arch / arm64 / boot / dts / qcom / msm8916.dtsi

diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
index 5911de008dd5010da246c809c0252babcd606ab3..8d184ff196429f2d7300d4f03a4edde343235b5b 100644 (file)
--- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
@@ -99,9 +99,19 @@
                        compatible = "qcom,gcc-msm8916";
                        #clock-cells = <1>;
                        #reset-cells = <1>;
+                       #power-domain-cells = <1>;
                        reg = <0x1800000 0x80000>;
                };
 
+               blsp1_uart1: serial@78af000 {
+                       compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
+                       reg = <0x78af000 0x200>;
+                       interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&gcc GCC_BLSP1_UART1_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>;
+                       clock-names = "core", "iface";
+                       status = "disabled";
+               };
+
                blsp1_uart2: serial@78b0000 {
                        compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
                        reg = <0x78b0000 0x200>;
@@ -224,6 +234,21 @@
                        status = "disabled";
                };
 
+               blsp_i2c2: i2c@78b6000 {
+                       compatible = "qcom,i2c-qup-v2.2.1";
+                       reg = <0x78b6000 0x1000>;
+                       interrupts = <GIC_SPI 96 0>;
+                       clocks = <&gcc GCC_BLSP1_AHB_CLK>,
+                               <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>;
+                       clock-names = "iface", "core";
+                       pinctrl-names = "default", "sleep";
+                       pinctrl-0 = <&i2c2_default>;
+                       pinctrl-1 = <&i2c2_sleep>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       status = "disabled";
+               };
+
                blsp_i2c4: i2c@78b8000 {
                        compatible = "qcom,i2c-qup-v2.2.1";
                        reg = <0x78b8000 0x1000>;
@@ -239,6 +264,21 @@
                        status = "disabled";
                };
 
+               blsp_i2c6: i2c@78ba000 {
+                       compatible = "qcom,i2c-qup-v2.2.1";
+                       reg = <0x78ba000 0x1000>;
+                       interrupts = <GIC_SPI 100 0>;
+                       clocks = <&gcc GCC_BLSP1_AHB_CLK>,
+                               <&gcc GCC_BLSP1_QUP6_I2C_APPS_CLK>;
+                       clock-names = "iface", "core";
+                       pinctrl-names = "default", "sleep";
+                       pinctrl-0 = <&i2c6_default>;
+                       pinctrl-1 = <&i2c6_sleep>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       status = "disabled";
+               };
+
                sdhc_1: sdhci@07824000 {
                        compatible = "qcom,sdhci-msm-v4";
                        reg = <0x07824900 0x11c>, <0x07824000 0x800>;
@@ -390,6 +430,13 @@
                        interrupt-controller;
                        #interrupt-cells = <4>;
                };
+
+               rng@22000 {
+                       compatible = "qcom,prng";
+                       reg = <0x00022000 0x200>;
+                       clocks = <&gcc GCC_PRNG_AHB_CLK>;
+                       clock-names = "core";
+               };
        };
 };