]> git.kernelconcepts.de Git - karo-tx-linux.git/blobdiff - drivers/clocksource/rockchip_timer.c
Merge branch 'for-4.8/core' of git://git.kernel.dk/linux-block
[karo-tx-linux.git] / drivers / clocksource / rockchip_timer.c
index b991b288c8032740f4eb0a0a4a30d056fcbb6694..23e267acba25c6c9374d24e6266ed9cc7ceb7cff 100644 (file)
@@ -19,7 +19,8 @@
 
 #define TIMER_LOAD_COUNT0      0x00
 #define TIMER_LOAD_COUNT1      0x04
-#define TIMER_CONTROL_REG      0x10
+#define TIMER_CONTROL_REG3288  0x10
+#define TIMER_CONTROL_REG3399  0x1c
 #define TIMER_INT_STATUS       0x18
 
 #define TIMER_DISABLE          0x0
@@ -31,6 +32,7 @@
 struct bc_timer {
        struct clock_event_device ce;
        void __iomem *base;
+       void __iomem *ctrl;
        u32 freq;
 };
 
@@ -46,15 +48,20 @@ static inline void __iomem *rk_base(struct clock_event_device *ce)
        return rk_timer(ce)->base;
 }
 
+static inline void __iomem *rk_ctrl(struct clock_event_device *ce)
+{
+       return rk_timer(ce)->ctrl;
+}
+
 static inline void rk_timer_disable(struct clock_event_device *ce)
 {
-       writel_relaxed(TIMER_DISABLE, rk_base(ce) + TIMER_CONTROL_REG);
+       writel_relaxed(TIMER_DISABLE, rk_ctrl(ce));
 }
 
 static inline void rk_timer_enable(struct clock_event_device *ce, u32 flags)
 {
        writel_relaxed(TIMER_ENABLE | TIMER_INT_UNMASK | flags,
-                      rk_base(ce) + TIMER_CONTROL_REG);
+                      rk_ctrl(ce));
 }
 
 static void rk_timer_update_counter(unsigned long cycles,
@@ -106,37 +113,42 @@ static irqreturn_t rk_timer_interrupt(int irq, void *dev_id)
        return IRQ_HANDLED;
 }
 
-static void __init rk_timer_init(struct device_node *np)
+static int __init rk_timer_init(struct device_node *np, u32 ctrl_reg)
 {
        struct clock_event_device *ce = &bc_timer.ce;
        struct clk *timer_clk;
        struct clk *pclk;
-       int ret, irq;
+       int ret = -EINVAL, irq;
 
        bc_timer.base = of_iomap(np, 0);
        if (!bc_timer.base) {
                pr_err("Failed to get base address for '%s'\n", TIMER_NAME);
-               return;
+               return -ENXIO;
        }
+       bc_timer.ctrl = bc_timer.base + ctrl_reg;
 
        pclk = of_clk_get_by_name(np, "pclk");
        if (IS_ERR(pclk)) {
+               ret = PTR_ERR(pclk);
                pr_err("Failed to get pclk for '%s'\n", TIMER_NAME);
                goto out_unmap;
        }
 
-       if (clk_prepare_enable(pclk)) {
+       ret = clk_prepare_enable(pclk);
+       if (ret) {
                pr_err("Failed to enable pclk for '%s'\n", TIMER_NAME);
                goto out_unmap;
        }
 
        timer_clk = of_clk_get_by_name(np, "timer");
        if (IS_ERR(timer_clk)) {
+               ret = PTR_ERR(timer_clk);
                pr_err("Failed to get timer clock for '%s'\n", TIMER_NAME);
                goto out_timer_clk;
        }
 
-       if (clk_prepare_enable(timer_clk)) {
+       ret = clk_prepare_enable(timer_clk);
+       if (ret) {
                pr_err("Failed to enable timer clock\n");
                goto out_timer_clk;
        }
@@ -145,17 +157,19 @@ static void __init rk_timer_init(struct device_node *np)
 
        irq = irq_of_parse_and_map(np, 0);
        if (!irq) {
+               ret = -EINVAL;
                pr_err("Failed to map interrupts for '%s'\n", TIMER_NAME);
                goto out_irq;
        }
 
        ce->name = TIMER_NAME;
-       ce->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT;
+       ce->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT |
+                      CLOCK_EVT_FEAT_DYNIRQ;
        ce->set_next_event = rk_timer_set_next_event;
        ce->set_state_shutdown = rk_timer_shutdown;
        ce->set_state_periodic = rk_timer_set_periodic;
        ce->irq = irq;
-       ce->cpumask = cpumask_of(0);
+       ce->cpumask = cpu_possible_mask;
        ce->rating = 250;
 
        rk_timer_interrupt_clear(ce);
@@ -169,7 +183,7 @@ static void __init rk_timer_init(struct device_node *np)
 
        clockevents_config_and_register(ce, bc_timer.freq, 1, UINT_MAX);
 
-       return;
+       return 0;
 
 out_irq:
        clk_disable_unprepare(timer_clk);
@@ -177,6 +191,21 @@ out_timer_clk:
        clk_disable_unprepare(pclk);
 out_unmap:
        iounmap(bc_timer.base);
+
+       return ret;
+}
+
+static int __init rk3288_timer_init(struct device_node *np)
+{
+       return rk_timer_init(np, TIMER_CONTROL_REG3288);
+}
+
+static int __init rk3399_timer_init(struct device_node *np)
+{
+       return rk_timer_init(np, TIMER_CONTROL_REG3399);
 }
 
-CLOCKSOURCE_OF_DECLARE(rk_timer, "rockchip,rk3288-timer", rk_timer_init);
+CLOCKSOURCE_OF_DECLARE(rk3288_timer, "rockchip,rk3288-timer",
+                      rk3288_timer_init);
+CLOCKSOURCE_OF_DECLARE(rk3399_timer, "rockchip,rk3399-timer",
+                      rk3399_timer_init);