mtd: nand: rename the cellinfo to bits_per_cell

[karo-tx-linux.git] / include / linux / mtd / nand.h

diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index 5c05bab0ad896a50737c487928b1626390402aa1..9e6c8f9f306e016923a0c32d3ae0e2d9f0ce0d1f 100644 (file)
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -198,6 +198,7 @@ typedef enum {
 /* Cell info constants */
 #define NAND_CI_CHIPNR_MSK     0x03
 #define NAND_CI_CELLTYPE_MSK   0x0C
+#define NAND_CI_CELLTYPE_SHIFT 2
 
 /* Keep gcc happy */
 struct nand_chip;
@@ -477,7 +478,7 @@ struct nand_buffers {
  * @badblockbits:      [INTERN] minimum number of set bits in a good block's
  *                     bad block marker position; i.e., BBM == 11110111b is
  *                     not bad when badblockbits == 7
- * @cellinfo:          [INTERN] MLC/multichip data from chip ident
+ * @bits_per_cell:     [INTERN] number of bits per cell. i.e., 1 means SLC.
  * @ecc_strength_ds:   [INTERN] ECC correctability from the datasheet.
  *                     Minimum amount of bit errors per @ecc_step_ds guaranteed
  *                     to be correctable. If unknown, set to zero.
@@ -558,7 +559,7 @@ struct nand_chip {
        int pagebuf;
        unsigned int pagebuf_bitflips;
        int subpagesize;
-       uint8_t cellinfo;
+       uint8_t bits_per_cell;
        uint16_t ecc_strength_ds;
        uint16_t ecc_step_ds;
        int badblockpos;
@@ -802,6 +803,6 @@ static inline int onfi_get_sync_timing_mode(struct nand_chip *chip)
  */
 static inline bool nand_is_slc(struct nand_chip *chip)
 {
-       return !(chip->cellinfo & NAND_CI_CELLTYPE_MSK);
+       return chip->bits_per_cell == 1;
 }
 #endif /* __LINUX_MTD_NAND_H */