The Aspeed 2400/2500 families have a variant of UHCI which requires
some quirks to the driver to work:
- The register offsets are different. We add a remapping helper.
- All accesses have to be done via 32-bit loads and stores. We
force all accessors to use readl/writel. This is of no consequence
for reads as we never read "in the middle" of a register. For writes
it also works fine as the registers only actually implement the bits
we try to write (16-bit for the registers accessed with writew and
8-bit for the register accessed with writeb), so always using a
32-bit write will have no negative effect. We never do partial writes.
- The resume detect interrupt is broken
- The number of ports is (optionally) provided via the device-tree
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Alan Stern <stern@rowland.harvard.edu>
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