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ENGR00221161 [MX6SL]- Add audio bus freq mode support.
authorRanjani Vaidyanathan <ra5478@freescale.com>
Wed, 22 Aug 2012 18:26:11 +0000 (13:26 -0500)
committerLothar Waßmann <LW@KARO-electronics.de>
Fri, 24 May 2013 06:35:19 +0000 (08:35 +0200)
commit9d0a75717d954f99d815fb3fb3830a2bf5f58c54
treeb04618dfc6168ea7563cd5d260407fc26df43ec5tree | snapshot
parent1647054941205e223037b727e9ba06e9da27df2dcommit | diff
ENGR00221161 [MX6SL]- Add audio bus freq mode support.

Set DDR to 50MHz in low power audio playback.
AHB/AXI are at 24MHz.
Also fix correct usecount for PLL1 main clock. If not
it causes issues when pll1_sw_clk's parent is changed.

Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
arch/arm/mach-mx6/bus_freq.c diff | blob | history
arch/arm/mach-mx6/clock_mx6sl.c diff | blob | history
arch/arm/mach-mx6/mx6sl_ddr.S diff | blob | history
arch/arm/mach-mx6/mx6sl_wfi.S diff | blob | history
arch/arm/mach-mx6/system.c diff | blob | history
Linux kernel for KaRo TX COM modules