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(parent: d5d14ed) | patch
arch/tile: support <asm/cachectl.h> header for cacheflush() syscall
authorChris Metcalf <cmetcalf@tilera.com>
Thu, 29 Mar 2012 19:25:59 +0000 (15:25 -0400)
committerChris Metcalf <cmetcalf@tilera.com>
Fri, 25 May 2012 16:48:24 +0000 (12:48 -0400)
commitcd6f32aa088f4d328e676c35f51b440f2fe5b98c
tree5668ff37a8690e5f5d919992756edb4466c37de2tree | snapshot
parentd5d14ed6f2db7287a5088e1350cf422bf72140b3commit | diff
arch/tile: support <asm/cachectl.h> header for cacheflush() syscall

We already had a syscall that did some dcache flushing, but it was
not used in practice.  Make it MIPS compatible instead so it can
do both the DCACHE and ICACHE actions.  We have code that wants to
be able to use the ICACHE flush mode from userspace so this change
enables that.

Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
arch/tile/include/asm/Kbuild diff | blob | history
arch/tile/include/asm/cachectl.h [new file with mode: 0644] blob
arch/tile/include/asm/compat.h diff | blob | history
arch/tile/include/asm/syscalls.h diff | blob | history
arch/tile/include/asm/unistd.h diff | blob | history
arch/tile/kernel/sys.c diff | blob | history
Linux kernel for KaRo TX COM modules