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PCI: faraday: Add clock bindings
authorLinus Walleij <linus.walleij@linaro.org>
Mon, 15 May 2017 17:23:12 +0000 (19:23 +0200)
committerBjorn Helgaas <bhelgaas@google.com>
Sun, 2 Jul 2017 23:42:35 +0000 (18:42 -0500)
commitd1ef28900d6607ea7a25c39a3bd1ce152f6ab24a
treea709d1e6d9e2ca8327bb45929ddf7ed3d40118b1tree | snapshot
parent769b461fc0c0451bacf75826d5830fc07c5a57e4commit | diff
PCI: faraday: Add clock bindings

The Faraday FTPCI100 controller has two clock ports, PCLK and PCICLK.  Add
bindings for these two clocks so we can assign them in the device tree.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Rob Herring <robh@kernel.org>
Documentation/devicetree/bindings/pci/faraday,ftpci100.txt diff | blob | history
Linux kernel for KaRo TX COM modules