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MIPS: IP28: Select correct L1_CACHE_SHIFT
authorThomas Bogendoerfer <tsbogend@alpha.franken.de>
Tue, 19 Aug 2014 20:00:07 +0000 (22:00 +0200)
committerRalf Baechle <ralf@linux-mips.org>
Tue, 26 Aug 2014 00:18:58 +0000 (02:18 +0200)
commitdc24d68d5e25a384ad32cc60bbaccd18b3da30d8
tree345c7642ad5b266a36ee15ec65e486e3edf2e941tree | snapshot
parentbbc5367f50d930bbe6ad4750d3250614c7babcc0commit | diff
MIPS: IP28: Select correct L1_CACHE_SHIFT

IP28 has 128 byte cache lines.

Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/7548/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/Kconfig diff | blob | history
Linux kernel for KaRo TX COM modules