Merge tag 'nand/fixes-for-4.13-rc4' of git://git.infradead.org/l2-mtd into MTD
authorBrian Norris <computersforpeace@gmail.com>
Sat, 5 Aug 2017 01:42:37 +0000 (18:42 -0700)
committerBrian Norris <computersforpeace@gmail.com>
Sat, 5 Aug 2017 01:42:37 +0000 (18:42 -0700)
"""
This PR contains both core and drivers fixes for 4.13.

Core fixes:
- Fix data interface setup for ONFI NANDs that do not support the SET
  FEATURES command
- Fix a kernel doc header
- Fix potential integer overflow when retrieving timing information
  from the parameter page
- Fix wrong OOB layout for small page NANDs

Driver fixes:
- Fix potential division-by-zero bug
- Fix backward compat with old atmel-nand DT bindings
- Fix ->setup_data_interface() in the atmel NAND driver
"""

drivers/mtd/nand/atmel/nand-controller.c
drivers/mtd/nand/atmel/pmecc.c
drivers/mtd/nand/nand_base.c
drivers/mtd/nand/nand_timings.c
drivers/mtd/nand/sunxi_nand.c
include/linux/mtd/nand.h

index d922a88..2c8baa0 100644 (file)
@@ -1201,7 +1201,7 @@ static int atmel_smc_nand_prepare_smcconf(struct atmel_nand *nand,
         * tRC < 30ns implies EDO mode. This controller does not support this
         * mode.
         */
-       if (conf->timings.sdr.tRC_min < 30)
+       if (conf->timings.sdr.tRC_min < 30000)
                return -ENOTSUPP;
 
        atmel_smc_cs_conf_init(smcconf);
index 55a8ee5..8c210a5 100644 (file)
@@ -945,6 +945,7 @@ struct atmel_pmecc *devm_atmel_pmecc_get(struct device *userdev)
                 */
                struct platform_device *pdev = to_platform_device(userdev);
                const struct atmel_pmecc_caps *caps;
+               const struct of_device_id *match;
 
                /* No PMECC engine available. */
                if (!of_property_read_bool(userdev->of_node,
@@ -953,21 +954,11 @@ struct atmel_pmecc *devm_atmel_pmecc_get(struct device *userdev)
 
                caps = &at91sam9g45_caps;
 
-               /*
-                * Try to find the NFC subnode and extract the associated caps
-                * from there.
-                */
-               np = of_find_compatible_node(userdev->of_node, NULL,
-                                            "atmel,sama5d3-nfc");
-               if (np) {
-                       const struct of_device_id *match;
-
-                       match = of_match_node(atmel_pmecc_legacy_match, np);
-                       if (match && match->data)
-                               caps = match->data;
-
-                       of_node_put(np);
-               }
+               /* Find the caps associated to the NAND dev node. */
+               match = of_match_node(atmel_pmecc_legacy_match,
+                                     userdev->of_node);
+               if (match && match->data)
+                       caps = match->data;
 
                pmecc = atmel_pmecc_create(pdev, caps, 1, 2);
        }
index 5fa5ddc..c6c18b8 100644 (file)
@@ -65,8 +65,14 @@ static int nand_ooblayout_ecc_sp(struct mtd_info *mtd, int section,
 
        if (!section) {
                oobregion->offset = 0;
-               oobregion->length = 4;
+               if (mtd->oobsize == 16)
+                       oobregion->length = 4;
+               else
+                       oobregion->length = 3;
        } else {
+               if (mtd->oobsize == 8)
+                       return -ERANGE;
+
                oobregion->offset = 6;
                oobregion->length = ecc->total - 4;
        }
@@ -1125,7 +1131,9 @@ static int nand_setup_data_interface(struct nand_chip *chip, int chipnr)
         * Ensure the timing mode has been changed on the chip side
         * before changing timings on the controller side.
         */
-       if (chip->onfi_version) {
+       if (chip->onfi_version &&
+           (le16_to_cpu(chip->onfi_params.opt_cmd) &
+            ONFI_OPT_CMD_SET_GET_FEATURES)) {
                u8 tmode_param[ONFI_SUBFEATURE_PARAM_LEN] = {
                        chip->onfi_timing_mode_default,
                };
@@ -2741,7 +2749,6 @@ static int nand_write_page_syndrome(struct mtd_info *mtd,
  * @buf: the data to write
  * @oob_required: must write chip->oob_poi to OOB
  * @page: page number to write
- * @cached: cached programming
  * @raw: use _raw version of write_page
  */
 static int nand_write_page(struct mtd_info *mtd, struct nand_chip *chip,
index f06312d..7e36d7d 100644 (file)
@@ -311,9 +311,9 @@ int onfi_init_data_interface(struct nand_chip *chip,
                struct nand_sdr_timings *timings = &iface->timings.sdr;
 
                /* microseconds -> picoseconds */
-               timings->tPROG_max = 1000000UL * le16_to_cpu(params->t_prog);
-               timings->tBERS_max = 1000000UL * le16_to_cpu(params->t_bers);
-               timings->tR_max = 1000000UL * le16_to_cpu(params->t_r);
+               timings->tPROG_max = 1000000ULL * le16_to_cpu(params->t_prog);
+               timings->tBERS_max = 1000000ULL * le16_to_cpu(params->t_bers);
+               timings->tR_max = 1000000ULL * le16_to_cpu(params->t_r);
 
                /* nanoseconds -> picoseconds */
                timings->tCCS_min = 1000UL * le16_to_cpu(params->t_ccs);
index d0b6f8f..6abd142 100644 (file)
@@ -1728,6 +1728,10 @@ static int sunxi_nfc_setup_data_interface(struct mtd_info *mtd, int csline,
         */
        chip->clk_rate = NSEC_PER_SEC / min_clk_period;
        real_clk_rate = clk_round_rate(nfc->mod_clk, chip->clk_rate);
+       if (real_clk_rate <= 0) {
+               dev_err(nfc->dev, "Unable to round clk %lu\n", chip->clk_rate);
+               return -EINVAL;
+       }
 
        /*
         * ONFI specification 3.1, paragraph 4.15.2 dictates that EDO data
index 892148c..5216d2e 100644 (file)
@@ -681,10 +681,10 @@ struct nand_buffers {
  * @tWW_min: WP# transition to WE# low
  */
 struct nand_sdr_timings {
-       u32 tBERS_max;
+       u64 tBERS_max;
        u32 tCCS_min;
-       u32 tPROG_max;
-       u32 tR_max;
+       u64 tPROG_max;
+       u64 tR_max;
        u32 tALH_min;
        u32 tADL_min;
        u32 tALS_min;