crypto: tegra-aes - bitwise vs logical and

The bug here is that:

	while (eng_busy & (!icq_empty) & dma_busy)

is never true because it's using bitwise instead of logical ANDs.  The
other bitwise AND conditions work as intended but I changed them as well
for consistency.

Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

diff --git a/drivers/crypto/tegra-aes.c b/drivers/crypto/tegra-aes.c
index 85ea7525fa36242bda4cb21c37ce788981d3b502..2d58da972ae279f44b91f05dd472f6287c13f081 100644 (file)
--- a/drivers/crypto/tegra-aes.c
+++ b/drivers/crypto/tegra-aes.c
@@ -275,7 +275,7 @@ static int aes_start_crypt(struct tegra_aes_dev *dd, u32 in_addr, u32 out_addr,
                        value = aes_readl(dd, TEGRA_AES_INTR_STATUS);
                        eng_busy = value & TEGRA_AES_ENGINE_BUSY_FIELD;
                        icq_empty = value & TEGRA_AES_ICQ_EMPTY_FIELD;
-               } while (eng_busy & (!icq_empty));
+               } while (eng_busy && !icq_empty);
                aes_writel(dd, cmdq[i], TEGRA_AES_ICMDQUE_WR);
        }
 
@@ -365,7 +365,7 @@ static int aes_set_key(struct tegra_aes_dev *dd)
                eng_busy = value & TEGRA_AES_ENGINE_BUSY_FIELD;
                icq_empty = value & TEGRA_AES_ICQ_EMPTY_FIELD;
                dma_busy = value & TEGRA_AES_DMA_BUSY_FIELD;
-       } while (eng_busy & (!icq_empty) & dma_busy);
+       } while (eng_busy && !icq_empty && dma_busy);
 
        /* settable command to get key into internal registers */
        value = CMD_SETTABLE << CMDQ_OPCODE_SHIFT |
@@ -379,7 +379,7 @@ static int aes_set_key(struct tegra_aes_dev *dd)
                value = aes_readl(dd, TEGRA_AES_INTR_STATUS);
                eng_busy = value & TEGRA_AES_ENGINE_BUSY_FIELD;
                icq_empty = value & TEGRA_AES_ICQ_EMPTY_FIELD;
-       } while (eng_busy & (!icq_empty));
+       } while (eng_busy && !icq_empty);
 
        return 0;
 }