There's a start-up time after FLL_ENA bit is set. While the driver didn't
run the delay code which already exists in the set_fll() function.
This patch let the driver run into the delay section, and made it work more
perfectly.
Acked-by: Wang Shengjiu <b02247@freescale.com>
Signed-off-by: Nicolin Chen <b42378@freescale.com>
WM8962_FLL_FRAC | WM8962_FLL_REFCLK_SRC_MASK |
WM8962_FLL_ENA, fll1 | WM8962_FLL_ENA);
+ fll1 |= WM8962_FLL_ENA;
+
dev_dbg(codec->dev, "FLL configured for %dHz->%dHz\n", Fref, Fout);
ret = 0;