arm64: dts: fixup SMD RPM CLK names

SMD RPM CLK names were changed in 564b5c9fdcf3e7752d66a2aba0f813b9ca013262,
compared to the previous version of the patch that we had.

Signed-off-by: Nicolas Dechesne <nicolas.dechesne@linaro.org>

diff --git a/arch/arm64/boot/dts/qcom/msm8916-bus.dtsi b/arch/arm64/boot/dts/qcom/msm8916-bus.dtsi
index 77f76fd37fa4b11b5ad5d292e3e6006cd86eb4a2..11e707cef476f1e7a07556d3a01dd7c06f199f18 100644 (file)
--- a/arch/arm64/boot/dts/qcom/msm8916-bus.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916-bus.dtsi
@@ -95,8 +95,8 @@
                qcom,qos-off = <0x1000>;
                qcom,bus-type = <1>;
                clock-names = "bus_clk", "bus_a_clk";
-               clocks = <&rpmcc  RPM_SNOC_CLK>,
-                      <&rpmcc  RPM_SNOC_A_CLK>;
+               clocks = <&rpmcc  RPM_SMD_SNOC_CLK>,
+                      <&rpmcc  RPM_SMD_SNOC_A_CLK>;
        };
 
        fab_bimc: fab-bimc {
@@ -106,8 +106,8 @@
                qcom,base-name = "bimc-base";
                qcom,bus-type = <2>;
                clock-names = "bus_clk", "bus_a_clk";
-               clocks = <&rpmcc  RPM_BIMC_CLK>,
-                      <&rpmcc  RPM_BIMC_A_CLK>;
+               clocks = <&rpmcc  RPM_SMD_BIMC_CLK>,
+                      <&rpmcc  RPM_SMD_BIMC_A_CLK>;
        };
 
        fab_pnoc: fab-pnoc {
@@ -119,8 +119,8 @@
                qcom,qos-delta = <0x1000>;
                qcom,bus-type = <1>;
                clock-names = "bus_clk", "bus_a_clk";
-               clocks = <&rpmcc  RPM_PCNOC_CLK>,
-                      <&rpmcc  RPM_PCNOC_A_CLK>;
+               clocks = <&rpmcc  RPM_SMD_PCNOC_CLK>,
+                      <&rpmcc  RPM_SMD_PCNOC_A_CLK>;
        };
 
        /* SNOC Devices */

diff --git a/arch/arm64/boot/dts/qcom/msm8916-coresight.dtsi b/arch/arm64/boot/dts/qcom/msm8916-coresight.dtsi
index c008dc7a32bb9495262f004d7162a3f4e310390d..9cac742817aae5024200851ce0cc585d5ae26136 100644 (file)
--- a/arch/arm64/boot/dts/qcom/msm8916-coresight.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916-coresight.dtsi
@@ -17,7 +17,7 @@
                compatible = "arm,coresight-tpiu", "arm,primecell";
                reg = <0x820000 0x1000>;
 
-               clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
+               clocks = <&rpmcc RPM_SMD_QDSS_CLK>, <&rpmcc RPM_SMD_QDSS_A_CLK>;
                clock-names = "apb_pclk", "atclk";
 
                port {
@@ -32,7 +32,7 @@
                compatible = "arm,coresight-funnel", "arm,primecell";
                reg = <0x821000 0x1000>;
 
-               clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
+               clocks = <&rpmcc RPM_SMD_QDSS_CLK>, <&rpmcc RPM_SMD_QDSS_A_CLK>;
                clock-names = "apb_pclk", "atclk";
 
                ports {
@@ -69,7 +69,7 @@
                compatible = "qcom,coresight-replicator1x", "arm,primecell";
                reg = <0x824000 0x1000>;
 
-               clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
+               clocks = <&rpmcc RPM_SMD_QDSS_CLK>, <&rpmcc RPM_SMD_QDSS_A_CLK>;
                clock-names = "apb_pclk", "atclk";
 
                ports {
@@ -102,7 +102,7 @@
                compatible = "arm,coresight-tmc", "arm,primecell";
                reg = <0x825000 0x1000>;
 
-               clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
+               clocks = <&rpmcc RPM_SMD_QDSS_CLK>, <&rpmcc RPM_SMD_QDSS_A_CLK>;
                clock-names = "apb_pclk", "atclk";
 
                ports {
@@ -129,7 +129,7 @@
                compatible = "arm,coresight-tmc", "arm,primecell";
                reg = <0x826000 0x1000>;
 
-               clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
+               clocks = <&rpmcc RPM_SMD_QDSS_CLK>, <&rpmcc RPM_SMD_QDSS_A_CLK>;
                clock-names = "apb_pclk", "atclk";
 
                port {
@@ -144,7 +144,7 @@
                compatible = "arm,coresight-funnel", "arm,primecell";
                reg = <0x841000 0x1000>;
 
-               clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
+               clocks = <&rpmcc RPM_SMD_QDSS_CLK>, <&rpmcc RPM_SMD_QDSS_A_CLK>;
                clock-names = "apb_pclk", "atclk";
 
                ports {
@@ -192,7 +192,7 @@
                compatible = "arm,coresight-etm4x", "arm,primecell";
                reg = <0x85c000 0x1000>;
 
-               clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
+               clocks = <&rpmcc RPM_SMD_QDSS_CLK>, <&rpmcc RPM_SMD_QDSS_A_CLK>;
                clock-names = "apb_pclk", "atclk";
 
                cpu = <&CPU0>;
@@ -208,7 +208,7 @@
                compatible = "arm,coresight-etm4x", "arm,primecell";
                reg = <0x85d000 0x1000>;
 
-               clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
+               clocks = <&rpmcc RPM_SMD_QDSS_CLK>, <&rpmcc RPM_SMD_QDSS_A_CLK>;
                clock-names = "apb_pclk", "atclk";
 
                cpu = <&CPU1>;
@@ -224,7 +224,7 @@
                compatible = "arm,coresight-etm4x", "arm,primecell";
                reg = <0x85e000 0x1000>;
 
-               clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
+               clocks = <&rpmcc RPM_SMD_QDSS_CLK>, <&rpmcc RPM_SMD_QDSS_A_CLK>;
                clock-names = "apb_pclk", "atclk";
 
                cpu = <&CPU2>;
@@ -240,7 +240,7 @@
                compatible = "arm,coresight-etm4x", "arm,primecell";
                reg = <0x85f000 0x1000>;
 
-               clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
+               clocks = <&rpmcc RPM_SMD_QDSS_CLK>, <&rpmcc RPM_SMD_QDSS_A_CLK>;
                clock-names = "apb_pclk", "atclk";
 
                cpu = <&CPU3>;

diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
index 4df860adfb2b556ed4fe257a329f300208735bfb..ab39e3a3272a16919da701caa432bc406cf1aca7 100644 (file)
--- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
@@ -858,7 +858,7 @@
                        iris {
                                compatible = "qcom,wcn3620";
 
-                               clocks = <&rpmcc RPM_RF_CLK2>;
+                               clocks = <&rpmcc RPM_SMD_RF_CLK2>;
                                clock-names = "xo";
 
                                vddxo-supply = <&pm8916_l7>;