]> git.kernelconcepts.de Git - karo-tx-linux.git/commitdiff
ENGR00275031-2 ARM: dts: add lcdif and backlight support
authorRobby Cai <R63905@freescale.com>
Thu, 22 Aug 2013 06:39:42 +0000 (14:39 +0800)
committerLothar Waßmann <LW@KARO-electronics.de>
Wed, 20 Aug 2014 08:06:18 +0000 (10:06 +0200)
Add dts for lcdif, backlight(pwm).
- use display timing dts bindings for lcd timing setting.
- add an axi clock node for mx23/mx28 to accommadate the change in driver

Signed-off-by: Robby Cai <R63905@freescale.com>
arch/arm/boot/dts/imx23.dtsi
arch/arm/boot/dts/imx28.dtsi
arch/arm/boot/dts/imx6sl-evk.dts
arch/arm/boot/dts/imx6sl.dtsi

index bbcfb5a19c77009e2cf77253f1e49cee8c6d7035..ff2918b5b42fb1d535a47fad90d35b1d264dd3a3 100644 (file)
                                compatible = "fsl,imx23-lcdif";
                                reg = <0x80030000 2000>;
                                interrupts = <46 45>;
-                               clocks = <&clks 38>;
+                               clocks = <&clks 38>, <&clks 38>;
+                               clock-names = "pix", "axi";
                                status = "disabled";
                        };
 
index a95cc5358ff460cc688d97535bccc8722c9f0358..005e950c2f18d46c9205bf9e84f8487ec5dc536b 100644 (file)
                        lcdif: lcdif@80030000 {
                                compatible = "fsl,imx28-lcdif";
                                reg = <0x80030000 0x2000>;
-                               interrupts = <38>;
-                               clocks = <&clks 55>;
+                               interrupts = <38 86>;
+                               clocks = <&clks 55>, <&clks 55>;
+                               clock-names = "pix", "axi";
                                dmas = <&dma_apbh 13>;
                                dma-names = "rx";
                                status = "disabled";
index 2b71fea982cdb57320838f7ae2fd11aa76249a11..cfca214b31272cc0a77995484beab7add47a219a 100644 (file)
        status = "okay";
 };
 
+&lcdif {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_lcdif_dat_0
+                    &pinctrl_lcdif_ctrl_0>;
+       lcd-supply = <&reg_lcd_3v3>;
+       display = <&display>;
+       status = "okay";
+
+       display: display {
+               bits-per-pixel = <16>;
+               bus-width = <24>;
+
+               display-timings {
+                       native-mode = <&timing0>;
+                       timing0: timing0 {
+                               clock-frequency = <33500000>;
+                               hactive = <800>;
+                               vactive = <480>;
+                               hback-porch = <89>;
+                               hfront-porch = <164>;
+                               vback-porch = <23>;
+                               vfront-porch = <10>;
+                               hsync-len = <10>;
+                               vsync-len = <10>;
+                               hsync-active = <0>;
+                               vsync-active = <0>;
+                               de-active = <1>;
+                               pixelclk-active = <0>;
+                       };
+               };
+       };
+};
+
+&pwm1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_pwm1_0>;
+       status = "okay";
+};
+
 &ssi2 {
        fsl,mode = "i2s-slave";
        status = "okay";
index 2bea479269b364cc0a334f810e2d01ddfad0cfab..55432437a11e2ced46fcb49b6dc1ca14e67bfc6d 100644 (file)
                        };
 
                        lcdif: lcdif@020f8000 {
+                               compatible = "fsl,imx6sl-lcdif", "fsl,imx28-lcdif";
                                reg = <0x020f8000 0x4000>;
                                interrupts = <0 39 IRQ_TYPE_LEVEL_HIGH>;
+                               clocks = <&clks IMX6SL_CLK_LCDIF_PIX>,
+                                        <&clks IMX6SL_CLK_LCDIF_AXI>;
+                               clock-names = "pix", "axi";
+                               status = "disabled";
                        };
 
                        dcp: dcp@020fc000 {