sky2: fix power settings on Yukon XL

patch ff35164e72648e0bf0b10ec4410c195e8607e88b in mainline.

Make sure PCI register for PHY power gets set correctly.

Signed-off-by: Stephen Hemminger <shemminger@linux-foundation.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>

diff --git a/drivers/net/sky2.c b/drivers/net/sky2.c
index d292aefc39a6b5d043ccf2465f9d18c89e030246..257507793a3ca0c5e2701db08d70d4be9cfae51b 100644 (file)
--- a/drivers/net/sky2.c
+++ b/drivers/net/sky2.c
@@ -603,21 +603,22 @@ static void sky2_phy_init(struct sky2_hw *hw, unsigned port)
 static void sky2_phy_power(struct sky2_hw *hw, unsigned port, int onoff)
 {
        u32 reg1;
-       static const u32 phy_power[]
-               = { PCI_Y2_PHY1_POWD, PCI_Y2_PHY2_POWD };
-
-       /* looks like this XL is back asswards .. */
-       if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > 1)
-               onoff = !onoff;
+       static const u32 phy_power[] = { PCI_Y2_PHY1_POWD, PCI_Y2_PHY2_POWD };
+       static const u32 coma_mode[] = { PCI_Y2_PHY1_COMA, PCI_Y2_PHY2_COMA };
 
        sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
        reg1 = sky2_pci_read32(hw, PCI_DEV_REG1);
+
        if (onoff)
                /* Turn off phy power saving */
                reg1 &= ~phy_power[port];
        else
                reg1 |= phy_power[port];
 
+       if (onoff && hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > 1)
+               reg1 |= coma_mode[port];
+
+
        sky2_pci_write32(hw, PCI_DEV_REG1, reg1);
        sky2_pci_read32(hw, PCI_DEV_REG1);
        sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);