]> git.kernelconcepts.de Git - karo-tx-linux.git/commitdiff
staging: sm750fb: use BIT macro for I2C_CTRL fields
authorMike Rapoport <mike.rapoport@gmail.com>
Wed, 10 Feb 2016 16:34:20 +0000 (18:34 +0200)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Fri, 12 Feb 2016 03:52:37 +0000 (19:52 -0800)
Replace complex definition of I2C_CTRL register fields with BIT() macro and
use open-coded implementation for register manipulation

Signed-off-by: Mike Rapoport <mike.rapoport@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/staging/sm750fb/ddk750_hwi2c.c
drivers/staging/sm750fb/ddk750_reg.h

index 40253bd8cf2a6bbf93546f7d9eed02e7796705fb..1811c4bd007fc783d1153fa443b13228c282ca8f 100644 (file)
@@ -26,12 +26,10 @@ unsigned char bus_speed_mode
        enableI2C(1);
 
        /* Enable the I2C Controller and set the bus speed mode */
-       value = PEEK32(I2C_CTRL);
-       if (bus_speed_mode == 0)
-               value = FIELD_SET(value, I2C_CTRL, MODE, STANDARD);
-       else
-               value = FIELD_SET(value, I2C_CTRL, MODE, FAST);
-       value = FIELD_SET(value, I2C_CTRL, EN, ENABLE);
+       value = PEEK32(I2C_CTRL) & ~(I2C_CTRL_MODE | I2C_CTRL_EN);
+       if (bus_speed_mode)
+               value |= I2C_CTRL_MODE;
+       value |= I2C_CTRL_EN;
        POKE32(I2C_CTRL, value);
 
        return 0;
@@ -42,8 +40,7 @@ void sm750_hw_i2c_close(void)
        unsigned int value;
 
        /* Disable I2C controller */
-       value = PEEK32(I2C_CTRL);
-       value = FIELD_SET(value, I2C_CTRL, EN, DISABLE);
+       value = PEEK32(I2C_CTRL) & ~I2C_CTRL_EN;
        POKE32(I2C_CTRL, value);
 
        /* Disable I2C Power */
@@ -120,8 +117,7 @@ static unsigned int hw_i2c_write_data(
                        POKE32(I2C_DATA0 + i, *buf++);
 
                /* Start the I2C */
-               POKE32(I2C_CTRL,
-                      FIELD_SET(PEEK32(I2C_CTRL), I2C_CTRL, CTRL, START));
+               POKE32(I2C_CTRL, PEEK32(I2C_CTRL) | I2C_CTRL_CTRL);
 
                /* Wait until the transfer is completed. */
                if (hw_i2c_wait_tx_done() != 0)
@@ -183,8 +179,7 @@ static unsigned int hw_i2c_read_data(
                POKE32(I2C_BYTE_COUNT, count);
 
                /* Start the I2C */
-               POKE32(I2C_CTRL,
-                      FIELD_SET(PEEK32(I2C_CTRL), I2C_CTRL, CTRL, START));
+               POKE32(I2C_CTRL, PEEK32(I2C_CTRL) | I2C_CTRL_CTRL);
 
                /* Wait until transaction done. */
                if (hw_i2c_wait_tx_done() != 0)
index d033d4ff05495605ffe26c4f812cbae93e4a9bb8..2a8ad57e6311d159b200aadd88432033acc0788f 100644 (file)
 #define I2C_BYTE_COUNT_COUNT                            3:0
 
 #define I2C_CTRL                                        0x010041
-#define I2C_CTRL_INT                                    4:4
-#define I2C_CTRL_INT_DISABLE                            0
-#define I2C_CTRL_INT_ENABLE                             1
-#define I2C_CTRL_DIR                                    3:3
-#define I2C_CTRL_DIR_WR                                 0
-#define I2C_CTRL_DIR_RD                                 1
-#define I2C_CTRL_CTRL                                   2:2
-#define I2C_CTRL_CTRL_STOP                              0
-#define I2C_CTRL_CTRL_START                             1
-#define I2C_CTRL_MODE                                   1:1
-#define I2C_CTRL_MODE_STANDARD                          0
-#define I2C_CTRL_MODE_FAST                              1
-#define I2C_CTRL_EN                                     0:0
-#define I2C_CTRL_EN_DISABLE                             0
-#define I2C_CTRL_EN_ENABLE                              1
+#define I2C_CTRL_INT                                    BIT(4)
+#define I2C_CTRL_DIR                                    BIT(3)
+#define I2C_CTRL_CTRL                                   BIT(2)
+#define I2C_CTRL_MODE                                   BIT(1)
+#define I2C_CTRL_EN                                     BIT(0)
 
 #define I2C_STATUS                                      0x010042
 #define I2C_STATUS_TX                                   3:3