ENGR00259693 MX6DL/S-Enable routing of ENET interrupt to GPIO

In order to fix the performance issue on ENET when WAIT mode
is activated, route the ENET interrupts to a GPIO on all MX6DL boards.

This patch must be applied on top of:
MX6Q/DL-Fix Ethernet performance issue when WAIT mode is active
808863866d2c17aeb3e70a7fcd094bd96db4b601
bae4d40849f3acdd9663f5a0857c9415ed7e6d5d

Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>

diff --git a/arch/arm/mach-mx6/board-mx6dl_arm2.h b/arch/arm/mach-mx6/board-mx6dl_arm2.h
index 429febb9813d3d4ea8f42022e3632137fe9e2fbc..dd7e66588785e55585c6f4c75d5a5088620d0e98 100644 (file)
--- a/arch/arm/mach-mx6/board-mx6dl_arm2.h
+++ b/arch/arm/mach-mx6/board-mx6dl_arm2.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2012 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright (C) 2012-2013 Freescale Semiconductor, Inc. All Rights Reserved.
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -183,11 +183,14 @@ static iomux_v3_cfg_t mx6dl_arm2_pads[] = {
        /* USBOTG ID pin */
        MX6DL_PAD_GPIO_1__USBOTG_ID,
 
+#ifdef CONFIG_MX6_ENET_IRQ_TO_GPIO
+       MX6DL_PAD_GPIO_6__OBSERVE_MUX_OBSRV_INT_OUT1,
+#else
        /* MLB150 */
        MX6DL_PAD_GPIO_3__MLB_MLBCLK,
        MX6DL_PAD_GPIO_6__MLB_MLBSIG,
        MX6DL_PAD_GPIO_2__MLB_MLBDAT,
-
+#endif
 };
 
 static iomux_v3_cfg_t mx6dl_arm2_epdc_pads[] = {

diff --git a/arch/arm/mach-mx6/board-mx6dl_sabresd.h b/arch/arm/mach-mx6/board-mx6dl_sabresd.h
index fe278e82491fa62743b747c65c590ace2f351ffc..0096c1ff0229991d40cee494c0cca3c406d30bce 100644 (file)
--- a/arch/arm/mach-mx6/board-mx6dl_sabresd.h
+++ b/arch/arm/mach-mx6/board-mx6dl_sabresd.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2012 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright (C) 2012-2013 Freescale Semiconductor, Inc. All Rights Reserved.
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -64,9 +64,13 @@ static iomux_v3_cfg_t mx6dl_sabresd_pads[] = {
        MX6DL_PAD_KEY_COL3__I2C2_SCL,
        MX6DL_PAD_KEY_ROW3__I2C2_SDA,
 
+#ifdef CONFIG_MX6_ENET_IRQ_TO_GPIO
+       MX6DL_PAD_GPIO_6__OBSERVE_MUX_OBSRV_INT_OUT1,
+#else
        /* I2C3 */
        MX6DL_PAD_GPIO_3__I2C3_SCL,
        MX6DL_PAD_GPIO_6__I2C3_SDA,
+#endif
 
        /* DISPLAY */
        MX6DL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK,

diff --git a/arch/arm/mach-mx6/board-mx6solo_sabreauto.h b/arch/arm/mach-mx6/board-mx6solo_sabreauto.h
index 31c3a6182b93d1cf7c1a6cbcdf4c47c883af3ae4..b0edb5e52b5258882e83ccb60d3fa8ad5cd224f7 100644 (file)
--- a/arch/arm/mach-mx6/board-mx6solo_sabreauto.h
+++ b/arch/arm/mach-mx6/board-mx6solo_sabreauto.h
@@ -1,6 +1,6 @@
 
 /*
- * Copyright (C) 2012 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright (C) 2012-2013 Freescale Semiconductor, Inc. All Rights Reserved.
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -205,10 +205,14 @@ static iomux_v3_cfg_t mx6dl_sabreauto_pads[] = {
        /* HDMI */
        MX6DL_PAD_EIM_A25__HDMI_TX_CEC_LINE,
 
+#ifdef CONFIG_MX6_ENET_IRQ_TO_GPIO
+       MX6DL_PAD_GPIO_6__OBSERVE_MUX_OBSRV_INT_OUT1,
+#else
        /* MLB150 */
        MX6DL_PAD_ENET_TXD1__MLB_MLBCLK,
        MX6DL_PAD_GPIO_6__MLB_MLBSIG,
        MX6DL_PAD_GPIO_2__MLB_MLBDAT,
+#endif
 };
 
 static iomux_v3_cfg_t mx6dl_sabreauto_can0_pads[] = {

diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx6dl.h b/arch/arm/plat-mxc/include/mach/iomux-mx6dl.h
index dbfc9a2d801216feb9948f287c7cd53400abc49f..513cc8d33a2c425041290de5cc73cc367ff54dc4 100644 (file)
--- a/arch/arm/plat-mxc/include/mach/iomux-mx6dl.h
+++ b/arch/arm/plat-mxc/include/mach/iomux-mx6dl.h
@@ -89,6 +89,9 @@
 #define MX6DL_GPMI_PAD_CTRL2 (MX6DL_GPMI_PAD_CTRL0 | MX6DL_GPMI_PAD_CTRL1)
 #define MX6DL_SPDIF_OUT_PAD_CTRL (PAD_CTL_DSE_120ohm | PAD_CTL_SRE_FAST)
 
+#define ENET_IRQ_PAD_CTRL (PAD_CTL_SRE_FAST | PAD_CTL_DSE_40ohm | \
+               PAD_CTL_SPEED_MED)
+
 #define MX6DL_PAD_CSI0_DAT10__IPU1_CSI0_D_10                                   \
                IOMUX_PAD(0x0360, 0x004C, 0, 0x0000, 0, NO_PAD_CTRL)
 #define MX6DL_PAD_CSI0_DAT10__AUDMUX_AUD3_RXC                                  \
@@ -2524,10 +2527,14 @@
 #define MX6DL_PAD_GPIO_5__SIMBA_EVENTI                                         \
                IOMUX_PAD(0x0600, 0x0230, 7, 0x0000, 0, NO_PAD_CTRL)
 
-#define MX6DL_PAD_GPIO_6__ESAI1_SCKT                                           \
-               IOMUX_PAD(0x0604, 0x0234, 0, 0x0840, 1, NO_PAD_CTRL)
+#ifdef CONFIG_MX6_ENET_IRQ_TO_GPIO
+#define MX6DL_PAD_GPIO_6__OBSERVE_MUX_OBSRV_INT_OUT1                           \
+               IOMUX_PAD(0x0604, 0x0234, 1 | IOMUX_CONFIG_SION, 0x0000, 0, ENET_IRQ_PAD_CTRL)
+#else
 #define MX6DL_PAD_GPIO_6__OBSERVE_MUX_OBSRV_INT_OUT1                           \
                IOMUX_PAD(0x0604, 0x0234, 1, 0x0000, 0, NO_PAD_CTRL)
+#define MX6DL_PAD_GPIO_6__ESAI1_SCKT                                           \
+               IOMUX_PAD(0x0604, 0x0234, 0, 0x0840, 1, NO_PAD_CTRL)
 #define MX6DL_PAD_GPIO_6__I2C3_SDA                                             \
                IOMUX_PAD(0x0604, 0x0234, 2 | IOMUX_CONFIG_SION, 0x087C, 2, MX6DL_I2C_PAD_CTRL)
 #define MX6DL_PAD_GPIO_6__CCM_CCM_OUT_0                                        \
@@ -2540,6 +2547,7 @@
                IOMUX_PAD(0x0604, 0x0234, 6, 0x0000, 0, MX6DL_USDHC_PAD_CTRL)
 #define MX6DL_PAD_GPIO_6__MLB_MLBSIG                                           \
                IOMUX_PAD(0x0604, 0x0234, 7, 0x08E4, 1, MX6DL_MLB150_PAD_CTRL)
+#endif
 
 #define MX6DL_PAD_GPIO_7__ESAI1_TX4_RX1                                        \
                IOMUX_PAD(0x0608, 0x0238, 0, 0x0854, 1, NO_PAD_CTRL)