ARM: dts: imx6ul: add pwm[1-4] nodes

Add device nodes for the PWM uinits 1..4 which were missing in the
original commit for i.MX6UL support.

diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi
index 863777ebacba5cd427d9dbd1e8868c67f48201dc..40ea5f0c724992afc314d29ce35ebf7dcfb415d9 100644 (file)
--- a/arch/arm/boot/dts/imx6ul.dtsi
+++ b/arch/arm/boot/dts/imx6ul.dtsi
@@ -248,6 +248,50 @@
                                status = "disabled";
                        };
 
+                       pwm1: pwm@02080000 {
+                               compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
+                               reg = <0x02080000 0x4000>;
+                               interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
+                               clocks = <&clks IMX6UL_CLK_PWM1>,
+                                        <&clks IMX6UL_CLK_PWM1>;
+                               clock-names = "ipg", "per";
+                               #pwm-cells = <2>;
+                               status = "disabled";
+                       };
+
+                       pwm2: pwm@02084000 {
+                               compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
+                               reg = <0x02084000 0x4000>;
+                               interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
+                               clocks = <&clks IMX6UL_CLK_PWM2>,
+                                        <&clks IMX6UL_CLK_PWM2>;
+                               clock-names = "ipg", "per";
+                               #pwm-cells = <2>;
+                               status = "disabled";
+                       };
+
+                       pwm3: pwm@02088000 {
+                               compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
+                               reg = <0x02088000 0x4000>;
+                               interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
+                               clocks = <&clks IMX6UL_CLK_PWM3>,
+                                        <&clks IMX6UL_CLK_PWM3>;
+                               clock-names = "ipg", "per";
+                               #pwm-cells = <2>;
+                               status = "disabled";
+                       };
+
+                       pwm4: pwm@0208c000 {
+                               compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
+                               reg = <0x0208c000 0x4000>;
+                               interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
+                               clocks = <&clks IMX6UL_CLK_PWM4>,
+                                        <&clks IMX6UL_CLK_PWM4>;
+                               clock-names = "ipg", "per";
+                               #pwm-cells = <2>;
+                               status = "disabled";
+                       };
+
                        gpt1: gpt@02098000 {
                                compatible = "fsl,imx6ul-gpt", "fsl,imx6sx-gpt";
                                reg = <0x02098000 0x4000>;