ARM: vexpress/MCPM: fix cache disable sequence when CONFIG_FRAME_POINTER=y

If CONFIG_FRAME_POINTER=y we get the following error:

arch/arm/mach-vexpress/tc2_pm.c: In function 'tc2_pm_down':
arch/arm/mach-vexpress/tc2_pm.c:200:1: error: fp cannot be used in asm here

Let's fix that by explicitly preserving r11 on the stack and removing it
from the clobber list.

Reported-by: Russell King <rmk+kernel@arm.linux.org.uk>
Reviewed-by: Dave Martin <Dave.Martin@arm.com>
Signed-off-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>

diff --git a/arch/arm/mach-vexpress/dcscb.c b/arch/arm/mach-vexpress/dcscb.c
index 85fffa702f5bc12696290f28be064e338e373fa1..3a6384c6c4356129733962ec286a8fae5d83f779 100644 (file)
--- a/arch/arm/mach-vexpress/dcscb.c
+++ b/arch/arm/mach-vexpress/dcscb.c
@@ -144,8 +144,13 @@ static void dcscb_power_down(void)
                 * Let's do it in the safest possible way i.e. with
                 * no memory access within the following sequence
                 * including to the stack.
+                *
+                * Note: fp is preserved to the stack explicitly prior doing
+                * this since adding it to the clobber list is incompatible
+                * with having CONFIG_FRAME_POINTER=y.
                 */
                asm volatile(
+               "str    fp, [sp, #-4]! \n\t"
                "mrc    p15, 0, r0, c1, c0, 0   @ get CR \n\t"
                "bic    r0, r0, #"__stringify(CR_C)" \n\t"
                "mcr    p15, 0, r0, c1, c0, 0   @ set CR \n\t"
@@ -156,9 +161,10 @@ static void dcscb_power_down(void)
                "bic    r0, r0, #(1 << 6)       @ disable local coherency \n\t"
                "mcr    p15, 0, r0, c1, c0, 1   @ set AUXCR \n\t"
                "isb    \n\t"
-               "dsb    "
+               "dsb    \n\t"
+               "ldr    fp, [sp], #4"
                : : : "r0","r1","r2","r3","r4","r5","r6","r7",
-                     "r9","r10","r11","lr","memory");
+                     "r9","r10","lr","memory");
 
                /*
                 * This is a harmless no-op.  On platforms with a real
@@ -182,6 +188,7 @@ static void dcscb_power_down(void)
                 * Let's do it in the safest possible way as above.
                 */
                asm volatile(
+               "str    fp, [sp, #-4]! \n\t"
                "mrc    p15, 0, r0, c1, c0, 0   @ get CR \n\t"
                "bic    r0, r0, #"__stringify(CR_C)" \n\t"
                "mcr    p15, 0, r0, c1, c0, 0   @ set CR \n\t"
@@ -192,9 +199,10 @@ static void dcscb_power_down(void)
                "bic    r0, r0, #(1 << 6)       @ disable local coherency \n\t"
                "mcr    p15, 0, r0, c1, c0, 1   @ set AUXCR \n\t"
                "isb    \n\t"
-               "dsb    "
+               "dsb    \n\t"
+               "ldr    fp, [sp], #4"
                : : : "r0","r1","r2","r3","r4","r5","r6","r7",
-                     "r9","r10","r11","lr","memory");
+                     "r9","r10","lr","memory");
        }
 
        __mcpm_cpu_down(cpu, cluster);

diff --git a/arch/arm/mach-vexpress/tc2_pm.c b/arch/arm/mach-vexpress/tc2_pm.c
index ddd97dd4e9b759d9cd98ab8b4d1b6ce667a83f63..2b7c93a724ede88c7f755f5fcd4750ad77e0e8ad 100644 (file)
--- a/arch/arm/mach-vexpress/tc2_pm.c
+++ b/arch/arm/mach-vexpress/tc2_pm.c
@@ -150,8 +150,13 @@ static void tc2_pm_down(u64 residency)
                 * Let's do it in the safest possible way i.e. with
                 * no memory access within the following sequence
                 * including the stack.
+                *
+                * Note: fp is preserved to the stack explicitly prior doing
+                * this since adding it to the clobber list is incompatible
+                * with having CONFIG_FRAME_POINTER=y.
                 */
                asm volatile(
+               "str    fp, [sp, #-4]! \n\t"
                "mrc    p15, 0, r0, c1, c0, 0   @ get CR \n\t"
                "bic    r0, r0, #"__stringify(CR_C)" \n\t"
                "mcr    p15, 0, r0, c1, c0, 0   @ set CR \n\t"
@@ -162,9 +167,10 @@ static void tc2_pm_down(u64 residency)
                "bic    r0, r0, #(1 << 6)       @ disable local coherency \n\t"
                "mcr    p15, 0, r0, c1, c0, 1   @ set AUXCR \n\t"
                "isb    \n\t"
-               "dsb    "
+               "dsb    \n\t"
+               "ldr    fp, [sp], #4"
                : : : "r0","r1","r2","r3","r4","r5","r6","r7",
-                     "r9","r10","r11","lr","memory");
+                     "r9","r10","lr","memory");
 
                cci_disable_port_by_cpu(mpidr);
 
@@ -185,6 +191,7 @@ static void tc2_pm_down(u64 residency)
                 * Let's do it in the safest possible way as above.
                 */
                asm volatile(
+               "str    fp, [sp, #-4]! \n\t"
                "mrc    p15, 0, r0, c1, c0, 0   @ get CR \n\t"
                "bic    r0, r0, #"__stringify(CR_C)" \n\t"
                "mcr    p15, 0, r0, c1, c0, 0   @ set CR \n\t"
@@ -195,9 +202,10 @@ static void tc2_pm_down(u64 residency)
                "bic    r0, r0, #(1 << 6)       @ disable local coherency \n\t"
                "mcr    p15, 0, r0, c1, c0, 1   @ set AUXCR \n\t"
                "isb    \n\t"
-               "dsb    "
+               "dsb    \n\t"
+               "ldr    fp, [sp], #4"
                : : : "r0","r1","r2","r3","r4","r5","r6","r7",
-                     "r9","r10","r11","lr","memory");
+                     "r9","r10","lr","memory");
        }
 
        __mcpm_cpu_down(cpu, cluster);