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7 years agopowerpc/64s: Consolidate Altivec 0x1700 interrupt
Nicholas Piggin [Wed, 21 Sep 2016 07:44:03 +0000 (17:44 +1000)]
powerpc/64s: Consolidate Altivec 0x1700 interrupt

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc/64s: Consolidate Debug 0x1600 interrupt
Nicholas Piggin [Wed, 21 Sep 2016 07:44:02 +0000 (17:44 +1000)]
powerpc/64s: Consolidate Debug 0x1600 interrupt

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc/64s: Consolidate Softpatch 0x1500 interrupt
Nicholas Piggin [Wed, 21 Sep 2016 07:44:01 +0000 (17:44 +1000)]
powerpc/64s: Consolidate Softpatch 0x1500 interrupt

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc/64s: Consolidate Instruction Breakpoint 0x1300 interrupt
Nicholas Piggin [Wed, 21 Sep 2016 07:44:00 +0000 (17:44 +1000)]
powerpc/64s: Consolidate Instruction Breakpoint 0x1300 interrupt

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc/64s: Consolidate CBE System Error 0x1200 interrupt
Nicholas Piggin [Wed, 21 Sep 2016 07:43:59 +0000 (17:43 +1000)]
powerpc/64s: Consolidate CBE System Error 0x1200 interrupt

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc/64s: Consolidate Reserved 0xfa0-0x1200 interrupts
Nicholas Piggin [Wed, 21 Sep 2016 07:43:58 +0000 (17:43 +1000)]
powerpc/64s: Consolidate Reserved 0xfa0-0x1200 interrupts

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc/64s: Consolidate Hypervisor Facility Unavailable 0xf80 interrupt
Nicholas Piggin [Wed, 21 Sep 2016 07:43:57 +0000 (17:43 +1000)]
powerpc/64s: Consolidate Hypervisor Facility Unavailable 0xf80 interrupt

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc/64s: Consolidate Facility Unavailable 0xf60 interrupt
Nicholas Piggin [Wed, 21 Sep 2016 07:43:56 +0000 (17:43 +1000)]
powerpc/64s: Consolidate Facility Unavailable 0xf60 interrupt

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc/64s: Consolidate VSX Unavailable 0xf40 interrupt
Nicholas Piggin [Wed, 21 Sep 2016 07:43:55 +0000 (17:43 +1000)]
powerpc/64s: Consolidate VSX Unavailable 0xf40 interrupt

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc/64s: Consolidate Vector Unavailable 0xf20 interrupt
Nicholas Piggin [Wed, 21 Sep 2016 07:43:54 +0000 (17:43 +1000)]
powerpc/64s: Consolidate Vector Unavailable 0xf20 interrupt

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc/64s: Consolidate Performance Monitor 0xf00 interrupt
Nicholas Piggin [Wed, 21 Sep 2016 07:43:53 +0000 (17:43 +1000)]
powerpc/64s: Consolidate Performance Monitor 0xf00 interrupt

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc/64s: Consolidate Reserved 0xec0, 0xee0 interrupts
Nicholas Piggin [Wed, 21 Sep 2016 07:43:52 +0000 (17:43 +1000)]
powerpc/64s: Consolidate Reserved 0xec0, 0xee0 interrupts

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc/64s: Consolidate Hypervisor Virtualization 0xea0 interrupt
Nicholas Piggin [Wed, 21 Sep 2016 07:43:51 +0000 (17:43 +1000)]
powerpc/64s: Consolidate Hypervisor Virtualization 0xea0 interrupt

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc/64s: Consolidate Directed Hypervisor Doorbell 0xe80 interrupt
Nicholas Piggin [Wed, 21 Sep 2016 07:43:50 +0000 (17:43 +1000)]
powerpc/64s: Consolidate Directed Hypervisor Doorbell 0xe80 interrupt

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc/64s: Consolidate Hypervisor Maintenance 0xe60 interrupt
Nicholas Piggin [Wed, 21 Sep 2016 07:43:49 +0000 (17:43 +1000)]
powerpc/64s: Consolidate Hypervisor Maintenance 0xe60 interrupt

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc/64s: Consolidate Hypervisor Emulation Assistance 0xe40 interrupt
Nicholas Piggin [Wed, 21 Sep 2016 07:43:48 +0000 (17:43 +1000)]
powerpc/64s: Consolidate Hypervisor Emulation Assistance 0xe40 interrupt

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc/64s: Consolidate Hypervisor Instruction Storage 0xe20 interrupt
Nicholas Piggin [Wed, 21 Sep 2016 07:43:47 +0000 (17:43 +1000)]
powerpc/64s: Consolidate Hypervisor Instruction Storage 0xe20 interrupt

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc/64s: Consolidate Hypervisor Data Storage 0xe00 interrupt
Nicholas Piggin [Wed, 21 Sep 2016 07:43:46 +0000 (17:43 +1000)]
powerpc/64s: Consolidate Hypervisor Data Storage 0xe00 interrupt

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc/64s: Consolidate Trace 0xd00 interrupt
Nicholas Piggin [Wed, 21 Sep 2016 07:43:45 +0000 (17:43 +1000)]
powerpc/64s: Consolidate Trace 0xd00 interrupt

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc/64s: Consolidate System Call 0xc00 interrupt
Nicholas Piggin [Wed, 21 Sep 2016 07:43:44 +0000 (17:43 +1000)]
powerpc/64s: Consolidate System Call 0xc00 interrupt

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc/64s: Consolidate Reserved 0xb00 interrupt
Nicholas Piggin [Wed, 21 Sep 2016 07:43:43 +0000 (17:43 +1000)]
powerpc/64s: Consolidate Reserved 0xb00 interrupt

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc/64s: Consolidate Directed Privileged Doorbell 0xa00 interrupt
Nicholas Piggin [Wed, 21 Sep 2016 07:43:42 +0000 (17:43 +1000)]
powerpc/64s: Consolidate Directed Privileged Doorbell 0xa00 interrupt

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc/64s: Consolidate Hypervisor Decrementer 0x980 interrupt
Nicholas Piggin [Wed, 21 Sep 2016 07:43:41 +0000 (17:43 +1000)]
powerpc/64s: Consolidate Hypervisor Decrementer 0x980 interrupt

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc/64s: Consolidate Decrementer 0x900 interrupt
Nicholas Piggin [Wed, 21 Sep 2016 07:43:40 +0000 (17:43 +1000)]
powerpc/64s: Consolidate Decrementer 0x900 interrupt

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc/64s: Consolidate FP Unavailable 0x800 interrupt
Nicholas Piggin [Wed, 21 Sep 2016 07:43:39 +0000 (17:43 +1000)]
powerpc/64s: Consolidate FP Unavailable 0x800 interrupt

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc/64s: Consolidate Program 0x700 interrupt
Nicholas Piggin [Wed, 21 Sep 2016 07:43:38 +0000 (17:43 +1000)]
powerpc/64s: Consolidate Program 0x700 interrupt

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc/64s: Consolidate Alignment 0x600 interrupt
Nicholas Piggin [Wed, 21 Sep 2016 07:43:37 +0000 (17:43 +1000)]
powerpc/64s: Consolidate Alignment 0x600 interrupt

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc/64s: Consolidate External 0x500 interrupt
Nicholas Piggin [Wed, 21 Sep 2016 07:43:36 +0000 (17:43 +1000)]
powerpc/64s: Consolidate External 0x500 interrupt

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc/64s: Consolidate Instruction Segment 0x480 interrupt
Nicholas Piggin [Wed, 21 Sep 2016 07:43:35 +0000 (17:43 +1000)]
powerpc/64s: Consolidate Instruction Segment 0x480 interrupt

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc/64s: Consolidate Instruction Storage 0x400 interrupt
Nicholas Piggin [Wed, 21 Sep 2016 07:43:34 +0000 (17:43 +1000)]
powerpc/64s: Consolidate Instruction Storage 0x400 interrupt

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc/64s: Consolidate Data Segment 0x380 interrupt
Nicholas Piggin [Wed, 21 Sep 2016 07:43:33 +0000 (17:43 +1000)]
powerpc/64s: Consolidate Data Segment 0x380 interrupt

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc/64s: Consolidate Data Storage 0x300 interrupt
Nicholas Piggin [Wed, 21 Sep 2016 07:43:32 +0000 (17:43 +1000)]
powerpc/64s: Consolidate Data Storage 0x300 interrupt

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc/64s: Consolidate Machine Check 0x200 interrupt
Nicholas Piggin [Wed, 21 Sep 2016 07:43:31 +0000 (17:43 +1000)]
powerpc/64s: Consolidate Machine Check 0x200 interrupt

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc/64s: Consolidate System Reset 0x100 interrupt
Nicholas Piggin [Wed, 21 Sep 2016 07:43:30 +0000 (17:43 +1000)]
powerpc/64s: Consolidate System Reset 0x100 interrupt

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc: Use gas sections for arranging exception vectors
Nicholas Piggin [Wed, 28 Sep 2016 01:31:48 +0000 (11:31 +1000)]
powerpc: Use gas sections for arranging exception vectors

Use assembler sections of fixed size and location to arrange the 64-bit
Book3S exception vector code (64-bit Book3E also uses it in head_64.S
for 0x0..0x100).

This allows better flexibility in arranging exception code and hiding
unimportant details behind macros.

Gas sections can be a bit painful to use this way, mainly because the
assembler does not know where they will be finally linked. Taking
absolute addresses requires a bit of trickery for example, but it can
be hidden behind macros for the most part.

Generated code is mostly the same except locations, offsets, alignments.

The "+ 0x2" is only required for the trap number / kvm exit number,
which gets loaded as a constant into a register.

Previously, code also used + 0x2 for label names, but we changed to
using "H" to distinguish HV case for that. Remove the last vestiges
of that.

__after_prom_start is taking absolute address of a label in another
fixed section. Newer toolchains seemed to compile this okay, but older
ones do not. FIXED_SYMBOL_ABS_ADDR is more foolproof, it just takes an
additional line to define.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc/64: Change the way relocation copy is calculated
Nicholas Piggin [Wed, 28 Sep 2016 01:31:47 +0000 (11:31 +1000)]
powerpc/64: Change the way relocation copy is calculated

With a subsequent patch to put text into different sections,
(_end - _stext) can no longer be computed at link time to determine
the end of the copy. Instead, calculate it at runtime with
(copy_to_here - _stext) + (_end - copy_to_here).

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc/64s: Consolidate exception handler alignment
Nicholas Piggin [Wed, 21 Sep 2016 07:43:28 +0000 (17:43 +1000)]
powerpc/64s: Consolidate exception handler alignment

Move exception handler alignment directives into the head-64.h macros,
beause they will no longer work in-place after the next patch. This
slightly changes functions that have alignments applied and therefore
code generation, which is why it was not done initially (see earlier
patch).

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc/64s: Add new exception vector macros
Michael Ellerman [Fri, 30 Sep 2016 09:43:18 +0000 (19:43 +1000)]
powerpc/64s: Add new exception vector macros

Create arch/powerpc/include/asm/head-64.h with macros that specify
an exception vector (name, type, location), which will be used to
label and lay out exceptions into the object file.

Naming is moved out of exception-64s.h, which is used to specify the
implementation of exception handlers.

objdump of generated code in exception vectors is unchanged except for
names. Alignment directives scattered around are annoying, but done
this way so that disassembly can verify identical instruction
generation before and after patch. These get cleaned up in future
patch.

We change the way KVMTEST works, explicitly passing EXC_HV or EXC_STD
rather than overloading the trap number. This removes the need to have
SOFTEN values for the overloaded trap numbers, eg. 0x502.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc/vdso64: Use double word compare on pointers
Anton Blanchard [Sun, 25 Sep 2016 07:16:53 +0000 (17:16 +1000)]
powerpc/vdso64: Use double word compare on pointers

__kernel_get_syscall_map() and __kernel_clock_getres() use cmpli to
check if the passed in pointer is non zero. cmpli maps to a 32 bit
compare on binutils, so we ignore the top 32 bits.

A simple test case can be created by passing in a bogus pointer with
the bottom 32 bits clear. Using a clk_id that is handled by the VDSO,
then one that is handled by the kernel shows the problem:

  printf("%d\n", clock_getres(CLOCK_REALTIME, (void *)0x100000000));
  printf("%d\n", clock_getres(CLOCK_BOOTTIME, (void *)0x100000000));

And we get:

  0
  -1

The bigger issue is if we pass a valid pointer with the bottom 32 bits
clear, in this case we will return success but won't write any data
to the pointer.

I stumbled across this issue because the LLVM integrated assembler
doesn't accept cmpli with 3 arguments. Fix this by converting them to
cmpldi.

Fixes: a7f290dad32e ("[PATCH] powerpc: Merge vdso's and add vdso support to 32 bits kernel")
Cc: stable@vger.kernel.org # v2.6.15+
Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agoKVM: PPC: Book3S HV: Migrate pinned pages out of CMA
Balbir Singh [Tue, 6 Sep 2016 06:27:31 +0000 (16:27 +1000)]
KVM: PPC: Book3S HV: Migrate pinned pages out of CMA

When PCI Device pass-through is enabled via VFIO, KVM-PPC will
pin pages using get_user_pages_fast(). One of the downsides of
the pinning is that the page could be in CMA region. The CMA
region is used for other allocations like the hash page table.
Ideally we want the pinned pages to be from non CMA region.

This patch (currently only for KVM PPC with VFIO) forcefully
migrates the pages out (huge pages are omitted for the moment).
There are more efficient ways of doing this, but that might
be elaborate and might impact a larger audience beyond just
the kvm ppc implementation.

The magic is in new_iommu_non_cma_page() which allocates the
new page from a non CMA region.

I've tested the patches lightly at my end. The full solution
requires migration of THP pages in the CMA region. That work
will be done incrementally on top of this.

Signed-off-by: Balbir Singh <bsingharora@gmail.com>
Acked-by: Alexey Kardashevskiy <aik@ozlabs.ru>
[mpe: Merged via powerpc tree as that's where the changes are]
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agodrivers/pci/hotplug: Support surprise hotplug in powernv driver
Gavin Shan [Wed, 28 Sep 2016 04:34:58 +0000 (14:34 +1000)]
drivers/pci/hotplug: Support surprise hotplug in powernv driver

This supports PCI surprise hotplug. The design is highlighted as
below:

   * The PCI slot's surprise hotplug capability is exposed through
     device node property "ibm,slot-surprise-pluggable", meaning
     PCI surprise hotplug will be disabled if skiboot doesn't support
     it yet.
   * The interrupt because of presence or link state change is raised
     on surprise hotplug event. One event is allocated and queued to
     the PCI slot for workqueue to pick it up and process in serialized
     fashion. The code flow for surprise hotplug is same to that for
     managed hotplug except: the affected PEs are put into frozen state
     to avoid unexpected EEH error reporting in surprise hot remove path.

Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agodrivers/pci/hotplug: Remove likely() and unlikely() in powernv driver
Gavin Shan [Wed, 28 Sep 2016 04:34:57 +0000 (14:34 +1000)]
drivers/pci/hotplug: Remove likely() and unlikely() in powernv driver

This removes likely() and unlikely() in pnv_php.c as the code isn't
running in hot path. Those macros to affect CPU's branch stream don't
help a lot for performance. I used them to identify the cases are
likely or unlikely to happen. No logical changes introduced.

Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc/powernv: Unfreeze PE on allocation
Gavin Shan [Wed, 28 Sep 2016 04:34:56 +0000 (14:34 +1000)]
powerpc/powernv: Unfreeze PE on allocation

This unfreezes PE when it's initialized because the PE might be put
into frozen state in the last hot remove path. It's not harmful to
do so if the PE is already in unfrozen state.

Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc/eeh: Export eeh_pe_state_mark()
Gavin Shan [Wed, 28 Sep 2016 04:34:55 +0000 (14:34 +1000)]
powerpc/eeh: Export eeh_pe_state_mark()

This exports eeh_pe_state_mark(). It will be used to mark the surprise
hot removed PE as isolated to avoid unexpected EEH error reporting in
surprise remove path.

Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc/eeh: Export confirm_error_lock
Gavin Shan [Wed, 28 Sep 2016 04:34:54 +0000 (14:34 +1000)]
powerpc/eeh: Export confirm_error_lock

This exports @confirm_error_lock so that eeh_serialize_{lock, unlock}()
can be used to freeze the affected PE in PCI surprise hot remove path.

Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc/eeh: Allow to freeze PE in eeh_pe_set_option()
Gavin Shan [Wed, 28 Sep 2016 04:34:53 +0000 (14:34 +1000)]
powerpc/eeh: Allow to freeze PE in eeh_pe_set_option()

Function eeh_pe_set_option() is used to apply the requested options
(enable, disable, unfreeze) in EEH virtualization path. The semantics
of this function isn't complete until freezing is supported.

This allows to freeze the indicated PE. The new semantics is going to
be used in PCI surprise hot remove path, to freeze removed PCI devices
(PE) to avoid unexpected EEH error reporting.

Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc/powernv: Call opal_pci_poll() if needed
Gavin Shan [Fri, 24 Jun 2016 06:44:19 +0000 (16:44 +1000)]
powerpc/powernv: Call opal_pci_poll() if needed

When issuing PHB reset, OPAL API opal_pci_poll() is called to drive
the state machine in OPAL forward. However, we needn't always call
the function under some circumstances like reset deassert.

This avoids calling opal_pci_poll() when OPAL_SUCCESS is returned
from opal_pci_reset(). Except the overhead introduced by additional
one unnecessary OPAL call, I didn't run into real issue because of
this.

Reported-by: Pridhiviraj Paidipeddi <ppaiddipe@in.ibm.com>
Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc/boot: Add support for XZ compression
Oliver O'Halloran [Thu, 22 Sep 2016 06:54:34 +0000 (16:54 +1000)]
powerpc/boot: Add support for XZ compression

This patch adds an option to use XZ compression for the kernel image.

Currently this is only enabled for 64-bit Book3S targets, which is
roughly equivalent to the platforms that use the kernel's zImage
wrapper, and that have been tested.

The bulk of the 32-bit platforms and 64-bit BookE use uboot images,
which relies on uboot implementing XZ. In future we can enable XZ
support for those targets once someone has tested it.

Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc/boot: Add XZ support to the wrapper script
Oliver O'Halloran [Thu, 22 Sep 2016 06:54:33 +0000 (16:54 +1000)]
powerpc/boot: Add XZ support to the wrapper script

This modifies the wrapper script so that the -Z option takes an argument
to specify the compression type. It can either be 'gz', 'xz' or 'none'.

The legazy --no-gzip and -z options are still supported and will set the
compression to none and gzip respectively, but they are not documented.

Only XZ -6 is used for compression rather than XZ -9. Using compression
levels higher than 6 requires the decompressor to build a large (64MB)
dictionary when decompressing and some environments cannot satisfy such
large allocations (e.g. POWER 6 LPAR partition firmware).

Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc/boot: Remove the legacy gzip wrapper
Oliver O'Halloran [Thu, 22 Sep 2016 06:54:32 +0000 (16:54 +1000)]
powerpc/boot: Remove the legacy gzip wrapper

This code is no longer used and can be removed.

Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc/boot: Use the pre-boot decompression API
Oliver O'Halloran [Thu, 22 Sep 2016 06:54:31 +0000 (16:54 +1000)]
powerpc/boot: Use the pre-boot decompression API

Currently the powerpc boot wrapper has its own wrapper around zlib to
handle decompressing gzipped kernels. The kernel decompressor library
functions now provide a generic interface that can be used in the
pre-boot environment. This allows boot wrappers to easily support
different compression algorithms. This patch converts the wrapper to use
this new API, but does not add support for using new algorithms.

Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc/boot: Use CONFIG_KERNEL_GZIP
Oliver O'Halloran [Thu, 22 Sep 2016 06:54:30 +0000 (16:54 +1000)]
powerpc/boot: Use CONFIG_KERNEL_GZIP

Most architectures allow the compression algorithm used to produced the
vmlinuz image to be selected as a kernel config option. In preperation
for supporting algorithms other than gzip in the powerpc boot wrapper
the makefile needs to be modified to use these config options.

Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc/boot: Add sed script
Oliver O'Halloran [Thu, 22 Sep 2016 06:54:29 +0000 (16:54 +1000)]
powerpc/boot: Add sed script

The powerpc boot wrapper is potentially compiled with a separate
toolchain and/or toolchain flags than the rest of the kernel. The usual
case is a 64-bit big endian kernel builds a 32-bit big endian wrapper.

The main problem with this is that the wrapper does not have access to
the kernel headers (without a lot of gross hacks). To get around this
the required headers are copied into the build directory via several sed
scripts which rewrite problematic includes. This patch moves these
fixups out of the makefile into a separate .sed script file to clean up
makefile slightly.

Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
[mpe: Reword first paragraph of change log a little]
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agoselftests/powerpc: Compile selftests against headers without AT_HWCAP2
Cyril Bur [Fri, 23 Sep 2016 06:18:07 +0000 (16:18 +1000)]
selftests/powerpc: Compile selftests against headers without AT_HWCAP2

It might be nice to compile selftests against older kernels and
headers but which may not have HWCAP2.

Signed-off-by: Cyril Bur <cyrilbur@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc: Clean up tm_abort duplication in hash_utils_64.c
Rui Teng [Fri, 2 Sep 2016 06:17:26 +0000 (14:17 +0800)]
powerpc: Clean up tm_abort duplication in hash_utils_64.c

The same logic appears twice and should probably be pulled out into a
function.

Suggested-by: Michael Ellerman <mpe@ellerman.id.au>
Signed-off-by: Rui Teng <rui.teng@linux.vnet.ibm.com>
[mpe: Rename to tm_flush_hash_page() and move comment into the function]
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc/powernv: Fix comment style and spelling
Andrew Donnellan [Fri, 16 Sep 2016 10:39:44 +0000 (20:39 +1000)]
powerpc/powernv: Fix comment style and spelling

Signed-off-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc/32: Remove CLR_TOP32
Christophe Leroy [Fri, 5 Aug 2016 11:27:59 +0000 (13:27 +0200)]
powerpc/32: Remove CLR_TOP32

CLR_TOP32() is defined as blank. Last useful instance of CLR_TOP32()
was removed by commit 40ef8cbc6d360 ("powerpc: Get 64-bit configs to
compile with ARCH=powerpc") in 2005.

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc: Fix usage of _PAGE_RO in hugepage
Christophe Leroy [Mon, 19 Sep 2016 10:58:54 +0000 (12:58 +0200)]
powerpc: Fix usage of _PAGE_RO in hugepage

On some CPUs like the 8xx, _PAGE_RW hence _PAGE_WRITE is defined
as 0 and _PAGE_RO has to be set when a page is not writable

_PAGE_RO is defined by default in pte-common.h, however BOOK3S/64
doesn't include that file so _PAGE_RO has to be defined explicitly
in book3s/64/pgtable.h

Fixes: a7b9f671f2d14 ("powerpc32: adds handling of _PAGE_RO")
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Reviewed-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc/eeh: Skip finding bus until after failure reporting
Russell Currey [Mon, 12 Sep 2016 04:17:24 +0000 (14:17 +1000)]
powerpc/eeh: Skip finding bus until after failure reporting

In eeh_handle_special_event(), eeh_pe_bus_get() is called before calling
eeh_report_failure() on every device under a PE.  If a PE was missing a
bus for some reason, the error would occur before reporting failure, even
though eeh_report_failure() doesn't require a bus.

Fix this by moving the bus retrieval and error check after the
eeh_report_failure() calls.

Signed-off-by: Russell Currey <ruscur@russell.cc>
Reviewed-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc/powernv/eeh: Skip finding bus for VF resets
Russell Currey [Mon, 12 Sep 2016 04:17:23 +0000 (14:17 +1000)]
powerpc/powernv/eeh: Skip finding bus for VF resets

When the PE used in pnv_eeh_reset() is that of a VF,
pnv_eeh_reset_vf_pe() is used.  Unlike the other reset functions called
in pnv_eeh_reset(), the VF reset doesn't require a bus, and if a bus was
missing the function would error out before resetting the VF PE.

To avoid this, reorder the VF reset function to occur before finding and
checking the bus.

Signed-off-by: Russell Currey <ruscur@russell.cc>
Reviewed-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc/eeh: Null check uses of eeh_pe_bus_get
Russell Currey [Mon, 12 Sep 2016 04:17:22 +0000 (14:17 +1000)]
powerpc/eeh: Null check uses of eeh_pe_bus_get

eeh_pe_bus_get() can return NULL if a PCI bus isn't found for a given PE.
Some callers don't check this, and can cause a null pointer dereference
under certain circumstances.

Fix this by checking NULL everywhere eeh_pe_bus_get() is called.

Fixes: 8a6b1bc70dbb ("powerpc/eeh: EEH core to handle special event")
Cc: stable@vger.kernel.org # v3.11+
Signed-off-by: Russell Currey <ruscur@russell.cc>
Reviewed-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc/pseries: Remove unnecessary syscall trampoline
Nicholas Piggin [Tue, 13 Sep 2016 03:08:40 +0000 (13:08 +1000)]
powerpc/pseries: Remove unnecessary syscall trampoline

When we originally added the ability to split the exception vectors from
the kernel (commit 1f6a93e4c35e ("powerpc: Make it possible to move the
interrupt handlers away from the kernel" 2008-09-15)), the LOAD_HANDLER() macro
used an addi instruction to compute the offset of the common handler
from the kernel base address.

Using addi meant the handler had to be within 32K of the kernel base
address, due to the addi instruction taking a signed immediate value.
That necessitated creating a trampoline for the system call handler,
because system_call_common (in entry64.S) is not linked within 32K of
the kernel base address.

Later in commit 61e2390ede3c ("powerpc: Make load_hander handle upto 64k
offset" 2012-11-15) we changed LOAD_HANDLER to take a 64K offset, by
changing it to use ori.

Although system_call_common is not in head_64.S or exceptions-64s.S, it
is included in head-y, which causes it to be linked early in the kernel
text, so in practice it ends up below 64K. Additionally if it can't be
placed below 64K the linker will fail to build with a "relocation
truncated to fit" error.

So remove the trampoline.

Newer toolchains are able to work out that the ori in LOAD_HANDLER only
takes a 16 bit offset, and so they generate a 16 bit relocation. Older
toolchains (binutils 2.22 at least) are not so smart, so we have to add
the @l annotation to tell the assembler to generate a 16 bit relocation.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc/pseries: Fix HV facility unavailable to use correct handler
Nicholas Piggin [Tue, 13 Sep 2016 03:08:39 +0000 (13:08 +1000)]
powerpc/pseries: Fix HV facility unavailable to use correct handler

The 0xf80 hv_facility_unavailable trampoline branches to the 0xf60
handler. This works because they both do the same thing, but it should
be fixed.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc/powernv/pci: Add PHB register dump debugfs handle
Russell Currey [Thu, 28 Jul 2016 05:05:03 +0000 (15:05 +1000)]
powerpc/powernv/pci: Add PHB register dump debugfs handle

On EEH events the kernel will print a dump of relevant registers.
If EEH is unavailable (i.e. CONFIG_EEH is disabled, a new platform
doesn't have EEH support, etc) this information isn't readily available.

Add a new debugfs handler to trigger a PHB register dump, so that this
information can be made available on demand.

Signed-off-by: Russell Currey <ruscur@russell.cc>
Reviewed-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc/64/kexec: Remove BookE special default_machine_kexec_prepare()
Benjamin Herrenschmidt [Fri, 19 Aug 2016 08:52:39 +0000 (14:22 +0530)]
powerpc/64/kexec: Remove BookE special default_machine_kexec_prepare()

The only difference is now the TCE table check which doesn't need
to be ifdef'ed out, it will basically do nothing on BookE (it is
only useful for ancient IBM machines).

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc/64/kexec: Copy image with MMU off when possible
Benjamin Herrenschmidt [Fri, 19 Aug 2016 08:52:38 +0000 (14:22 +0530)]
powerpc/64/kexec: Copy image with MMU off when possible

Currently we turn the MMU off after copying the image, and we make
sure there is no overlap between the hash table and the target pages
in that case.

That doesn't work for Radix however. In that case, the page tables
are scattered and we can't really enforce that the target of the
image isn't overlapping one of them.

So instead, let's turn the MMU off before copying the image in radix
mode. Thankfully, in radix mode, even under a hypervisor, we know we
don't have the same kind of RMA limitations that hash mode has.

While at it, also turn the MMU off early when using hash in non-LPAR
mode, that way we can get rid of the collision check completely.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Acked-by: Balbir Singh <bsingharora@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc/mm: Add radix flush all with IS=3
Aneesh Kumar K.V [Tue, 23 Aug 2016 10:57:48 +0000 (16:27 +0530)]
powerpc/mm: Add radix flush all with IS=3

Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc/64/kexec: Fix MMU cleanup on radix
Benjamin Herrenschmidt [Fri, 19 Aug 2016 08:52:37 +0000 (14:22 +0530)]
powerpc/64/kexec: Fix MMU cleanup on radix

Just using the hash ops won't work anymore since radix will have
NULL in there. Instead create an mmu_cleanup_all() function which
will do the right thing based on the MMU mode.

For Radix, for now I clear UPRT and the PTCR, effectively switching
back to Radix with no partition table setup.

Currently set it to NULL on BookE thought it might be a good idea
to wipe the TLB there (Scott ?)

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Acked-by: Balbir Singh <bsingharora@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc/64/kexec: NULL check "clear_all" in kexec_sequence
Benjamin Herrenschmidt [Fri, 19 Aug 2016 08:52:35 +0000 (14:22 +0530)]
powerpc/64/kexec: NULL check "clear_all" in kexec_sequence

With Radix, it can be NULL even on !BOOKE these days so replace
the ifdef with a NULL check which is cleaner anyway.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Acked-by: Balbir Singh <bsingharora@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc: Remove all usages of NO_IRQ
Michael Ellerman [Tue, 6 Sep 2016 11:53:24 +0000 (21:53 +1000)]
powerpc: Remove all usages of NO_IRQ

NO_IRQ has been == 0 on powerpc for just over ten years (since commit
0ebfff1491ef ("[POWERPC] Add new interrupt mapping core and change
platforms to use it")). It's also 0 on most other arches.

Although it's fairly harmless, every now and then it causes confusion
when a driver is built on powerpc and another arch which doesn't define
NO_IRQ. There's at least 6 definitions of NO_IRQ in drivers/, at least
some of which are to work around that problem.

So we'd like to remove it. This is fairly trivial in the arch code, we
just convert:

    if (irq == NO_IRQ) to if (!irq)
    if (irq != NO_IRQ) to if (irq)
    irq = NO_IRQ; to irq = 0;
    return NO_IRQ; to return 0;

And a few other odd cases as well.

At least for now we keep the #define NO_IRQ, because there is driver
code that uses NO_IRQ and the fixes to remove those will go via other
trees.

Note we also change some occurrences in PPC sound drivers, drivers/ps3,
and drivers/macintosh.

Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agoMAINTAINERS: Update cxl maintainers
Michael Neuling [Fri, 16 Sep 2016 04:28:44 +0000 (14:28 +1000)]
MAINTAINERS: Update cxl maintainers

Fred has taken over the cxl maintenance I was doing.  This updates the
MAINTAINERS file to reflect this.

It also removes a duplicate entry in the files covered and adds an entry
for the CXL PCI code in arch/powerpc.

Signed-off-by: Michael Neuling <mikey@neuling.org>
Reviewed-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
Reviewed-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
Acked-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc/pseries: fix memory leak in queue_hotplug_event() error path
Andrew Donnellan [Mon, 19 Sep 2016 06:41:32 +0000 (16:41 +1000)]
powerpc/pseries: fix memory leak in queue_hotplug_event() error path

If we fail to allocate work, we don't end up using hp_errlog_copy. Free it
in the error path.

Signed-off-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
Reviewed-by: Nathan Fontenot <nfont@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc/nvram: Fix an incorrect partition merge
Pan Xinhui [Thu, 10 Dec 2015 07:30:02 +0000 (15:30 +0800)]
powerpc/nvram: Fix an incorrect partition merge

When we merge two contiguous partitions whose signatures are marked
NVRAM_SIG_FREE, We need update prev's length and checksum, then write it
to nvram, not cur's. So lets fix this mistake now.

Also use memset instead of strncpy to set the partition's name. It's
more readable if we want to fill up with duplicate chars .

Fixes: fa2b4e54d41f ("powerpc/nvram: Improve partition removal")
Signed-off-by: Pan Xinhui <xinhui.pan@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc/nvram: Fix a memory leak in err path
Pan Xinhui [Wed, 9 Dec 2015 10:00:53 +0000 (18:00 +0800)]
powerpc/nvram: Fix a memory leak in err path

If kmemdup fails, We need kfree *buff* first then return -ENOMEM.
Otherwise there is a memory leak.

Signed-off-by: Pan Xinhui <xinhui.pan@linux.vnet.ibm.com>
Reviewed-by: Nathan Fontenot <nfont@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc/64s: Optimise MSR handling in exception handling
Nicholas Piggin [Thu, 15 Sep 2016 09:04:46 +0000 (19:04 +1000)]
powerpc/64s: Optimise MSR handling in exception handling

mtmsrd with L=1 only affects MSR_EE and MSR_RI bits, and we always
know what state those bits are, so the kernel MSR does not need to be
loaded when modifying them.

mtmsrd is often in the critical execution path, so avoiding dependency
on even L1 load is noticable. On a POWER8 this saves about 3 cycles
from the syscall path, and possibly a few from other exception returns
(not measured).

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc/64: Optimise syscall entry for virtual, relocatable case
Nicholas Piggin [Thu, 15 Sep 2016 09:03:21 +0000 (19:03 +1000)]
powerpc/64: Optimise syscall entry for virtual, relocatable case

The mflr r10 instruction was left over from when the code used LR to
branch to system_call_entry from the exception handler. That was
changed by commit 6a404806dfce ("powerpc: Avoid link stack corruption in
MMU on syscall entry path") to use the count register. The value is
never used now, so mflr can be removed, and r10 can be used for storage
rather than spilling to the SPR scratch register.

The scratch register spill causes a long pipeline stall due to the SPR
read after write. This change brings getppid syscall cost from 406 to
376 cycles on POWER8. getppid for non-relocatable case is 371 cycles.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Acked-by: Balbir Singh <bsingharora@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc/mm: Update FORCE_MAX_ZONEORDER range to allow hugetlb w/4K
Aneesh Kumar K.V [Mon, 19 Sep 2016 17:31:33 +0000 (23:01 +0530)]
powerpc/mm: Update FORCE_MAX_ZONEORDER range to allow hugetlb w/4K

For hugetlb to work with 4K page size, we need MAX_ORDER to be 13 or
more. When switching from a 64K page size to 4K linux page size using
make oldconfig, we end up with a CONFIG_FORCE_MAX_ZONEORDER value of 9.
This results in a 16M hugepage beiing considered as a gigantic huge page
which in turn results in failure to setup hugepages if gigantic hugepage
support is not enabled.

This also results in kernel crash with 4K radix configuration. We
hit the below BUG_ON on radix:

  kernel BUG at mm/huge_memory.c:364!
  Oops: Exception in kernel mode, sig: 5 [#1]
  SMP NR_CPUS=2048 NUMA PowerNV
  CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.8.0-rc1-00006-gbae9cc6 #1
  task: c0000000f1af8000 task.stack: c0000000f1aec000
  NIP: c000000000c5fa0c LR: c000000000c5f9d8 CTR: c000000000c5f9a4
  REGS: c0000000f1aef920 TRAP: 0700   Not tainted (4.8.0-rc1-00006-gbae9cc6)
  MSR: 9000000102029033 <SF,HV,VEC,EE,ME,IR,DR,RI,LE,TM[E]>  CR: 24000844  XER: 00000000
  CFAR: c000000000c5f9e0 SOFTE: 1
  ....
  NIP [c000000000c5fa0c] hugepage_init+0x68/0x238
  LR [c000000000c5f9d8] hugepage_init+0x34/0x238

Fixes: a7ee539584acf ("powerpc/Kconfig: Update config option based on page size")
Cc: stable@vger.kernel.org # v4.7+
Reported-by: Santhosh <santhog4@linux.vnet.ibm.com>
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Acked-by: Balbir Singh <bsingharora@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc/64: Document the syscall ABI
Nicholas Piggin [Wed, 14 Sep 2016 03:21:47 +0000 (13:21 +1000)]
powerpc/64: Document the syscall ABI

Add some documentation for the 64-bit syscall ABI, which doesn't seem
to be documented elsewhere.

This attempts to document existing practice. The only small discrepancy
is glibc clobbers not quite matching the kernel (e.g., xer, some
vsyscalls trash cr1 whereas glibc only clobbers cr0). These will be
resolved after this document is merged.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc/64: Replay hypervisor maintenance interrupt first
Nicholas Piggin [Wed, 14 Sep 2016 03:01:21 +0000 (13:01 +1000)]
powerpc/64: Replay hypervisor maintenance interrupt first

The HMI (Hypervisor Maintenance Interrupt) is defined by the
architecture to be higher priority than other maskable interrupts, so
replay it first, as a best-effort to replay according to hardware
priorities.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc: Ensure .mem(init|exit).text are within _stext/_etext
Michael Ellerman [Thu, 15 Sep 2016 05:11:59 +0000 (15:11 +1000)]
powerpc: Ensure .mem(init|exit).text are within _stext/_etext

In our linker script we open code the list of text sections, because we
need to include the __ftr_alt sections, which are arch-specific.

This means we can't use TEXT_TEXT as defined in vmlinux.lds.h, and so we
don't have the MEM_KEEP() logic for memory hotplug sections.

If we build the kernel with the gold linker, and with CONFIG_MEMORY_HOTPLUG=y,
we see that functions marked __meminit can end up outside of the
_stext/_etext range, and also outside of _sinittext/_einittext, eg:

    c000000000000000 T _stext
    c0000000009e0000 A _etext
    c0000000009e3f18 T hash__vmemmap_create_mapping
    c000000000ca0000 T _sinittext
    c000000000d00844 T _einittext

This causes them to not be recognised as text by is_kernel_text(), and
prevents them being patched by jump_label (and presumably ftrace/kprobes
etc.).

Fix it by adding MEM_KEEP() directives, mirroring what TEXT_TEXT does.

This isn't a problem when CONFIG_MEMORY_HOTPLUG=n, because we use the
standard INIT_TEXT_SECTION() and EXIT_TEXT macros from vmlinux.lds.h.

Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Tested-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc: Don't change the section in _GLOBAL()
Michael Ellerman [Thu, 15 Sep 2016 00:40:20 +0000 (10:40 +1000)]
powerpc: Don't change the section in _GLOBAL()

Currently the _GLOBAL() macro unilaterally sets the assembler section to
".text" at the start of the macro. This is rude as the caller may be
using a different section.

So let the caller decide which section to emit the code into. On big
endian we do need to switch to the ".opd" section to emit the OPD, but
do that with pushsection/popsection, thereby leaving the original
section intact.

I verified that the order of all entries in System.map is unchanged
after this patch. The actual addresses shift around slightly so you
can't just diff the System.map.

Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Reviewed-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc/kernel: Use kprobe blacklist for asm functions
Nicholas Piggin [Fri, 16 Sep 2016 10:48:17 +0000 (20:48 +1000)]
powerpc/kernel: Use kprobe blacklist for asm functions

Rather than forcing the whole function into the ".kprobes.text" section,
just add the symbol's address to the kprobe blacklist.

This also lets us drop the three versions of the_KPROBE macro, in
exchange for just one version of _ASM_NOKPROBE_SYMBOL - which is a good
cleanup.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc: Use kprobe blacklist for exception handlers
Nicholas Piggin [Fri, 16 Sep 2016 10:48:08 +0000 (20:48 +1000)]
powerpc: Use kprobe blacklist for exception handlers

Currently we mark the C implementations of some exception handlers as
__kprobes. This has the effect of putting them in the ".kprobes.text"
section, which separates them from the rest of the text.

Instead we can use the blacklist macros to add the symbols to a
blacklist which kprobes will check. This allows the linker to move
exception handler functions close to callers and avoids trampolines in
larger kernels.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
[mpe: Reword change log a bit]
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc: Set used_(vsr|vr|spe) in sigreturn path when MSR bits are active
Simon Guo [Tue, 26 Jul 2016 08:06:01 +0000 (16:06 +0800)]
powerpc: Set used_(vsr|vr|spe) in sigreturn path when MSR bits are active

Normally, when MSR[VSX/VR/SPE] bits == 1, the used_vsr/used_vr/used_spe
bit have already been set. However when loading a signal frame from user
space we need to explicitly set used_vsr/used_vr/used_spe to make them
consistent with the MSR bits from the signal frame.

For example, CRIU application, who utilizes sigreturn to restore
checkpointed process, will lead to the case where MSR[VSX] bit is active
in signal frame, but used_vsr bit is not set in the kernel. (the same
applies to VR/SPE).

This patch fixes this by always setting used_* bit when MSR related bits
are active in signal frame and we are doing sigreturn.

Based on a proposal by Benh.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Simon Guo <wei.guo.simon@gmail.com>
[mpe: Massage change log]
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc/ptrace: Fix cppcheck issue in gpr32_set_common/gpr32_get_common()
Simon Guo [Sun, 11 Sep 2016 13:44:13 +0000 (21:44 +0800)]
powerpc/ptrace: Fix cppcheck issue in gpr32_set_common/gpr32_get_common()

The ckpt_regs usage in gpr32_set_common/gpr32_get_common() will lead to
following cppcheck error at ifndef CONFIG_PPC_TRANSACTIONAL_MEM case:

[arch/powerpc/kernel/ptrace.c:2062]:
(error) Uninitialized variable: ckpt_regs
[arch/powerpc/kernel/ptrace.c:2130]:
(error) Uninitialized variable: ckpt_regs

The problem is due to gpr32_set_common() used ckpt_regs variable which
only makes sense at #ifdef CONFIG_PPC_TRANSACTIONAL_MEM.

This patch fix this issue by passing in "regs" parameter instead.

Reported-by: Daniel Axtens <dja@axtens.net>
Signed-off-by: Simon Guo <wei.guo.simon@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agocxl: Fix informational message
Frederic Barrat [Mon, 12 Sep 2016 10:37:43 +0000 (12:37 +0200)]
cxl: Fix informational message

When set_sl_ops() is called, the adapter data structure is not fully
initialized yet. Therefore the device name is not showing up in the
trace. Fix is simply to get the device name from the pci_dev
structure.

Fixes: 6d382616ac22 ("cxl: Abstract the differences between the PSL and XSL")
Signed-off-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc/32: Add missing \n and switch to pr_warn()
Colin Ian King [Mon, 12 Sep 2016 10:12:24 +0000 (11:12 +0100)]
powerpc/32: Add missing \n and switch to pr_warn()

The message is missing a \n, add it. Switch to pr_warn(), it's shorter
and less ugly.

Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc/mm: Update the HID bit when switching from radix to hash
Aneesh Kumar K.V [Wed, 24 Aug 2016 09:33:39 +0000 (15:03 +0530)]
powerpc/mm: Update the HID bit when switching from radix to hash

Power9 DD1 requires to update the hid0 register when switching from
hash to radix.

Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Acked-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc/mm/radix: Use different pte update sequence for different POWER9 revs
Aneesh Kumar K.V [Wed, 24 Aug 2016 09:33:38 +0000 (15:03 +0530)]
powerpc/mm/radix: Use different pte update sequence for different POWER9 revs

POWER9 DD1 requires pte to be marked invalid (V=0) before updating
it with the new value. This makes this distinction for the different
revisions.

Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Acked-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc/mm/radix: Use different RTS encoding for different POWER9 revs
Aneesh Kumar K.V [Wed, 24 Aug 2016 09:33:37 +0000 (15:03 +0530)]
powerpc/mm/radix: Use different RTS encoding for different POWER9 revs

POWER9 DD1 uses RTS - 28 for the RTS value but other revisions use
RTS - 31.  This makes this distinction for the different revisions

Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Acked-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc/book3s: Add a cpu table entry for different POWER9 revs
Aneesh Kumar K.V [Wed, 24 Aug 2016 09:33:36 +0000 (15:03 +0530)]
powerpc/book3s: Add a cpu table entry for different POWER9 revs

Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Acked-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc/pasemi: Fix device_type of Nemo SB600 node.
Darren Stevens [Wed, 31 Aug 2016 12:24:45 +0000 (13:24 +0100)]
powerpc/pasemi: Fix device_type of Nemo SB600 node.

The of_node for the SB600 (io-bridge) has its device_type set to
'io-bridge' Set it to 'isa' so that it can be found by
isa_bridge_find_early() instead of using patches in the kernel.

Signed-off-by: Darren Stevens <darren@stevens-zone.net>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc/pasemi: Fix Nemo SB600 i8259 interrupts.
Darren Stevens [Wed, 31 Aug 2016 12:24:40 +0000 (13:24 +0100)]
powerpc/pasemi: Fix Nemo SB600 i8259 interrupts.

The device tree on the Nemo passes all of the i8259 interrupts with
numbers between 212 and 222, and points their interrupt-parent property
to the pasemi-opic, requiring custom patches to the kernel. Fix the
values so that they can be controlled by the generic ppc i8259 code.

Signed-off-by: Darren Stevens <darren@stevens-zone.net>
[mpe: Rework deeply nested if and boundary checks]
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc/pasemi: Add Nemo motherboard config option.
Darren Stevens [Wed, 31 Aug 2016 12:24:34 +0000 (13:24 +0100)]
powerpc/pasemi: Add Nemo motherboard config option.

Add config option for the Nemo motherboard used in the Amigaone X1000.
This is a custom PASemi board with an AMD SB600 southbridge, and needs
some patches to it device tree. This option will be used to build these
into the kernel

Signed-off-by: Darren Stevens <darren@stevens-zone.net>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agohwrng: pasemi-rng - Use linux/io.h instead of asm/io.h
PrasannaKumar Muralidharan [Tue, 6 Sep 2016 08:28:39 +0000 (13:58 +0530)]
hwrng: pasemi-rng - Use linux/io.h instead of asm/io.h

Checkpatch.pl warns about usage of asm/io.h. Use linux/io.h instead.

Signed-off-by: PrasannaKumar Muralidharan <prasannatsmkumar@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc/ps3: fix spelling mistake in function name
Colin Ian King [Sun, 28 Aug 2016 10:59:00 +0000 (11:59 +0100)]
powerpc/ps3: fix spelling mistake in function name

Trivial fix to spelling mistake in dev_warn message and remove
extraneous trailing whitespace at end of the message.

Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc/Makefile: Construct the UTS_MACHINE value more concisely
Michael Ellerman [Thu, 11 Aug 2016 06:03:15 +0000 (16:03 +1000)]
powerpc/Makefile: Construct the UTS_MACHINE value more concisely

Use the standard Kbuild trick of foo-y to make the construction of
UTC_MACHINE less verbose.

Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc/Makefile: Drop CONFIG_WORD_SIZE for BITS
Michael Ellerman [Thu, 11 Aug 2016 06:03:14 +0000 (16:03 +1000)]
powerpc/Makefile: Drop CONFIG_WORD_SIZE for BITS

Commit 2578bfae84a7 ("[POWERPC] Create and use CONFIG_WORD_SIZE") added
CONFIG_WORD_SIZE, and suggests that other arches were going to do
likewise.

But that never happened, powerpc is the only architecture which uses it.

So switch to using a simple make variable, BITS, like x86, sh, sparc and
tile. It is also easier to spell and simpler, avoiding any confusion
about whether it's defined due to ordering of make vs kconfig.

Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc/boot: Use $(Q) to quiet build rules not @
Michael Ellerman [Thu, 11 Aug 2016 06:03:13 +0000 (16:03 +1000)]
powerpc/boot: Use $(Q) to quiet build rules not @

Some of the rules in the boot Makefile use @ to hide the command, this
means "make V=1" doesn't show them, which is confusing.

So use the Kbuild standard $(Q) which means KBUILD_VERBOSE=1 or V=1 will
work as expected.

Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
7 years agopowerpc/vdso64: Drop vdso64as
Michael Ellerman [Thu, 11 Aug 2016 06:03:12 +0000 (16:03 +1000)]
powerpc/vdso64: Drop vdso64as

We can just use the standard .S -> .o rule, cmd_as_o_S.

Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>