Maxime Ripard [Tue, 4 Mar 2014 16:28:39 +0000 (17:28 +0100)]
ARM: sun6i: Enable the I2C controllers
The A31 has 4 I2C controllers that are the same than the one in the
other Allwinner SoCs, except for the fact that they are asserted in
reset by the reset unit.
Add these i2c controllers to the DTSI.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Marvell Dove's pinctrl does require some PMU regs for muxing PMU
functions to MPP pins. Recently, a discussion started about consolidating
Power Management Unit (PMU) into a single DT node. As we don't want
anymore DT ABI in the way, drop the corresponding reg property from
pinctrl node now. The driver will derive the registers from existing
reg properties.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Gregory CLEMENT [Thu, 6 Mar 2014 15:17:55 +0000 (16:17 +0100)]
ARM: mvebu: add Device Tree for the Armada 385 RD board
The Armada 385 RD board is the reference design board from Marvell
for the Armada 385 SoC. This commit adds a Device Tree description for
this board, which enables the following features:
* Network interfaces
* I2C bus
* Serial port
* SPI bus, with a SPI flash
* PCIe interface
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
ARM: mvebu: use the correct phy connection mode on Armada 385 DB
On Armada 385 DB, while the "rgmii" PHY connection mode works fine
with the generic PHY driver, it fails to work when the Marvell PHY
driver is enabled in the kernel configuration, due to a finer handling
of the PHY configuration. This is due to the fact that the phy
connection mode should instead be "rgmii-id", i.e with the TX/RX delay
mechanisms enabled.
This fixes the network operation on Armada 385 DB with
CONFIG_MARVELL_PHY=y. Without this patch and this option enabled, one
would only get messages such as:
mvneta f1070000.ethernet eth1: bad rx status 0cc10000 (crc error), size=70
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Since the Armada XP Matrix board has 4 GB of RAM and not 2 GB, we
update the Device Tree to take into account the correct amount of
memory. As noted in the new comment, the last 256 MB of RAM are in
fact not usable, due to the overlap with the MBus Window address
range.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
ARM: mvebu: switch the Armada XP GP to use internal registers at 0xf1000000
Marvell has now provided bootloaders that are Device Tree capable for
the Armada XP GP board, and that also remap the internal register base
address to 0xf1000000. In addition, the bootloader now sets the MBus
Window base address to 0xf0000000, which allows to use much more RAM
in the last GB of RAM before the 4 GB limit (the entire space from
0xC0000000 to 0xFFFFFFFF was not usable due to being used for I/O, not
only the space from 0xF0000000 to 0xFFFFFFFF is used for I/O).
Therefore this commit:
* Updates the memory->reg Device Tree property with the fact that in
the first bank of RAM, memory up to 0xf0000000 can be used.
* Updates the soc->ranges Device Tree property with the fact that the
internal registers are now mapped at 0xf1000000.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
ARM: mvebu: switch the Armada XP DB to use internal registers at 0xf1000000
Marvell has now provided bootloaders that are Device Tree capable for
the Armada XP DB board, and that also remap the internal register base
address to 0xf1000000. In addition, the bootloader now sets the MBus
Window base address to 0xf0000000, but on this board, this change
doesn't make much difference since the board is by default equipped
with 2 GB of RAM.
Therefore this commit updates the soc->ranges Device Tree property
with the fact that the internal registers are now mapped at
0xf1000000.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
ARM: mvebu: change the default PCIe apertures for Armada 370/XP
The latest Marvell bootloaders for various boards change the MBus
Window base address from 0xC0000000 to 0xF0000000, in order to make
more RAM in the first 4 GB actually usable by the kernel (RAM that is
covered by the MBus window is "shadowed" and therefore not usable).
However, our default PCIe memory and I/O apertures where sitting at
0xe0000000 (for memory) and 0xe8000000 (for I/O), which will now be
outside of the MBus Window range on those platforms. To make things
work, we have to ensure those apertures use addresses in the
0xF0000000 -> 0xFFFFFFFF range.
Of course this change of the MBus Window base address from 0xC0000000
to 0xF0000000 also comes with a change of the internal register base
address from 0xD0000000 to 0xF1000000.
We have therefore designed the following memory map:
* 0xF0000000 -> 0xF1000000: 16 MB, used for NOR flashes on Armada XP
GP and Armada XP DB.
* 0xF1000000 -> 0xF1100000: 1 MB, used for internal registers.
* 0xF8000000 -> 0xFFE00000: 126 MB, used for PCIe memory.
* 0xFFE00000 -> 0xFFF00000: 1 MB, used for PCIe I/O.
* 0xFFF00000 -> 0xFFFFFFFF: 1 MB, used for the BootROM mapping
There is one exception to this layout: the Armada XP OpenBlocks, which
has a 128 MB NOR flash, mapped from 0xF0000000 to 0xF8000000. This
does not conflict with the current change for the PCIe I/O and memory
apertures, and continues to work because on Armada XP OpenBlocks, the
bootloader is an old one, and continues to have internal registers
mapped at 0xD0000000.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Stephen Warren [Mon, 3 Mar 2014 21:51:15 +0000 (14:51 -0700)]
ARM: tegra: use 2 address cells for Tegra124 DT
Tegra124 can support 4GB of RAM. With that much RAM (plus some memory-
mapped IO peripherals), more than 32-bits of physical address space is
required. Hence, convert all Tegra124 DTs to use 2 DT cells for address
space.
(I think this was suggested by Olof Johansson, but I'm not 100% sure)
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Add ABB device nodes for OMAP443x family of devices. abb_iva is
populated, but disabled as it is not used on current OMAP443x family,
but the node is used on OMAP446x family. Data is based on OMAP443x
Technical Reference Manual revision AN (April 2013).
ABB device nodes for OMAP4460 device Data is based on OMAP4460
Technical Reference Manual revision Z (April 2013)
[nm@ti.com: co-developer] Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Andrii.Tseglytskyi <andrii.tseglytskyi@ti.com> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
ARM: dts: omap5: added dt properties to adapt to the new phy framwork
Added device tree bindings for dwc3, usb2 and usb3 PHYs. The documentation
of these can be found at Documentation/devicetree/bindings/phy/phy-bindings.txt
and Documentation/devicetree/bindings/phy/ti-phy.txt.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Matt Porter [Wed, 19 Feb 2014 20:01:51 +0000 (15:01 -0500)]
ARM: dts: remove bcm11351-brt.dts
The BCM11351 BRT board will never see the light of day. Remove the BRT
dts since it is not maintainable.
Reviewed-by: Alex Elder <elder@linaro.org> Reviewed-by: Christian Daudt <bcm@fixthebug.org> Reviewed-by: Markus Mayer <markus.mayer@linaro.org> Signed-off-by: Matt Porter <mporter@linaro.org>
Roger Quadros [Thu, 27 Feb 2014 14:18:31 +0000 (16:18 +0200)]
ARM: dts: Update echi-omap DT binding example usage
Remove non-compatible id from examples.
CC: Alan Stern <stern@rowland.harvard.edu> CC: Nishant Menon <nm@ti.com> CC: Kevin Hilman <khilman@linaro.org> Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Roger Quadros [Thu, 27 Feb 2014 14:18:30 +0000 (16:18 +0200)]
ARM: dts: Get rid of incompatible ids for hci-omap USB host nodes
The OMAP EHCI and OHCI controllers are not compatible with drivers
other than "ti,ehci-omap" and "ti,ohci-omap3" respectively, so get
rid of the incompatible ids.
CC: Alan Stern <stern@rowland.harvard.edu> CC: Nishant Menon <nm@ti.com> CC: Kevin Hilman <khilman@linaro.org> Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
ARM: sun4i: dt: Add support for the INet-97F_Rev_02 board
This patch adds basic support for the INet-97F_Rev_02 board found in various
low cost consumer tablet devices (http://linux-sunxi.org/INet-97F_Rev_02)
Signed-off-by: David Lanzendörfer <david.lanzendoerfer@o2s.ch> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Roman Byshko [Sat, 1 Mar 2014 19:26:35 +0000 (20:26 +0100)]
ARM: sun7i: dt: Add USB host nodes to cubieboard2 dts
Add nodes for the usb-phy and ehci- and ohci-usb-host controllers.
Signed-off-by: Roman Byshko <rbyshko@gmail.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Roman Byshko [Sat, 1 Mar 2014 19:26:31 +0000 (20:26 +0100)]
ARM: sun5i: dt: Add USB host nodes to A13-Olinuxino
Add nodes for the usb-phy and ehci- and ohci-usb-host controllers.
Signed-off-by: Roman Byshko <rbyshko@gmail.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Roman Byshko [Sat, 1 Mar 2014 19:26:27 +0000 (20:26 +0100)]
ARM: sun4i: dt: Add USB host nodes to cubieboard dts
Add nodes for the usb-phy and ehci- and ohci-usb-host controllers.
Signed-off-by: Roman Byshko <rbyshko@gmail.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Roman Byshko [Sat, 1 Mar 2014 19:26:26 +0000 (20:26 +0100)]
ARM: sun4i: dt: Add USB host nodes to Mele A1000 dts
Add nodes for the usb-phy and ehci- and ohci-usb-host controllers.
Signed-off-by: Roman Byshko <rbyshko@gmail.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Roman Byshko [Sat, 1 Mar 2014 19:26:25 +0000 (20:26 +0100)]
ARM: sun7i: dt: Add USB host bindings
Add nodes for the usb-phy and ehci- and ohci-usb-host controllers.
Signed-off-by: Roman Byshko <rbyshko@gmail.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Roman Byshko [Sat, 1 Mar 2014 19:26:24 +0000 (20:26 +0100)]
ARM: sun5i: dt: Add USB host bindings
Add nodes for the usb-phy and ehci- and ohci-usb-host controllers.
Signed-off-by: Roman Byshko <rbyshko@gmail.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Roman Byshko [Sat, 1 Mar 2014 19:26:23 +0000 (20:26 +0100)]
ARM: sun4i: dt: Add USB host bindings
Add nodes for the usb-phy and ehci- and ohci-usb-host controllers.
Signed-off-by: Roman Byshko <rbyshko@gmail.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Hans de Goede [Sat, 1 Mar 2014 19:26:22 +0000 (20:26 +0100)]
ARM: sun7i: dt: Add ahci / sata support
This patch adds sunxi sata support to A20 boards that have such a connector.
Some boards also feature a regulator via a GPIO and support for this is also
added.
Signed-off-by: Olliver Schinagl <oliver@schinagl.nl> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Oliver Schinagl [Sat, 1 Mar 2014 19:26:21 +0000 (20:26 +0100)]
ARM: sun4i: dt: Add ahci / sata support
This patch adds sunxi sata support to A10 boards that have such a connector.
Some boards also feature a regulator via a GPIO and support for this is also
added.
Signed-off-by: Olliver Schinagl <oliver@schinagl.nl> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Hans de Goede [Sat, 1 Mar 2014 19:26:20 +0000 (20:26 +0100)]
ARM: sunxi: dt: Add sunxi-common-regulators include file
Most sunxi boards with a sata connector also have a gpio controlled connector
for sata target power and almost all sunxi boards have a gpio controlled vbus
for usb1 and usb2.
This commit adds an include file for the regulators representing these
supplies, avoiding the need to copy and paste the regulator code to allmost
all sunxi board dts files.
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
With all the DT support preparation done, we are able to move Dove
to MVEBU easily. Legacy non-DT mach-dove is left untouched to rot
for a while before removal.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Andrew Lunn [Tue, 25 Feb 2014 17:34:00 +0000 (18:34 +0100)]
ARM: kirkwood: Add i2c alias so setting bus number
When using platform_driver instantiation, the i2c bus was given bus
number 0. The kirkwood-t5325 audio driver has this bus number hard
coded for the address of the codec. However by default device tree i2c
busses are dynamically allocated a bus number, starting from 1. Thus
the kirkwood-t5325 cannot find its audio codec. By adding an alias in
the DT file we can control the bus number and set it to 0. The codec
can then be found.
Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Jason Cooper [Tue, 25 Feb 2014 17:00:10 +0000 (17:00 +0000)]
ARM: mvebu: select dtbs from MACH_ARMADA_*
With kirkwood migrating into mach-mvebu, mvebu_v5_defconfig needs to
select ARCH_MVEBU. Unfortunately, this means that when building a v5
kernel, we unnecessarily build dtbs for the armada v7 boards.
To fix this, we instead select based on MACH_ARMADA_* on a per SoC basis.
Reported-by: Kevin Hilman <khilman@linaro.org> Acked-by: Kevin Hilman <khilman@linaro.org> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Dove pinctrl uses additional registers to control MPPs. This patch first
increases existing pinctrl reg property by one register, and then adds
two new ranges for MPP4 and PMU MPP registers.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Andrew Lunn [Sat, 22 Feb 2014 19:14:59 +0000 (20:14 +0100)]
ARM: mvebu: Instantiate system controller in kirkwood.dtsi
Make use of the mvebu system controller, by placing a node into the
dtsi file.
Signed-off-by: Andrew Lunn <andrew@lunn.ch> Acked-by: Arnd Bergmann <arnd@arndb.de> Tested-by: Jason Gunthorpe <jgunthorpe@obsidianresearch.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Andrew Lunn [Sat, 22 Feb 2014 19:14:53 +0000 (20:14 +0100)]
ARM: kirkwood: Instantiate L2 cache from DT.
Now that the Feroceon L2 cache has a DT binding, make use of it.
Signed-off-by: Andrew Lunn <andrew@lunn.ch> Acked-by: Arnd Bergmann <arnd@arndb.de> Tested-by: Jason Gunthorpe <jgunthorpe@obsidianresearch.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Linus Walleij [Mon, 3 Feb 2014 23:35:56 +0000 (00:35 +0100)]
mfd: dbx500/abx500: root out hardcoded IRQ assignments
The DBx500 and ABx500 should be getting their IRQs from the
device tree and nowhere else. Get rid of all the static assignments
everywhere, delete it from the driver, platform data and the
board files in one swift strike.
Lots of cross-dependencies in the MFD drivers for PRCMU and
AB8500 makes it necessary to strike everywhere at once to
eradicate IRQs passed as resources and platform data to the left
and right around the platform.
Cc: Mark Brown <broonie@kernel.org> Cc: Samuel Ortiz <sameo@linux.intel.com> Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Pekon Gupta [Wed, 5 Feb 2014 13:28:34 +0000 (18:58 +0530)]
ARM: dts: am43xx: add support for parallel NAND flash
This patch:
- enables GPMC h/w and ELM h/w engine for AM43xx devices (am4372.dtsi)
- adds pinmux and DT node for Micron 4K-paged x8 NAND device (MT29F4G08AB)
present on following boards:
am43x-epos-evm:
On this board, NAND Flash control lines are muxed with QSPI, Thus only
one of the two can be used at a time. Selection is controlled by:
(a) dynamically driving following GPIO pin from software
GPMC_A0(GPIO) == 0 NAND is selected (default)
GPMC_A0(GPIO) == 1 eMMC is selected
Signed-off-by: Pekon Gupta <pekon@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Pekon Gupta [Wed, 5 Feb 2014 13:28:32 +0000 (18:58 +0530)]
ARM: dts: AM33xx: updated default ECC scheme in nand-ecc-opt
This patch updated MTD/NAND DT node binding to replace deprecated bindings
as per following commit.
commit ac65caf514ec3e55e8d3d510ee37f80dd97418fe
ARM: OMAP2+: cleaned-up DT support of various ECC schemes
Also Refer: Documentation/devicetree/bindings/mtd/gpmc-nand.txt
Reviewed-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Pekon Gupta <pekon@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch has following updates, specific to MTD/NAND DT
- update MTD NAND partition table to keep compatibility between
different boards and mainline u-boot.
- prefix 'NAND.' in names of NAND device MTD partitions to differentiate them
from other MTD device partitions (like NOR and QSPI)
Partition_Name Partition_Size
/dev/mtd0 NAND.SPL 1 block-size*
/dev/mtd1 NAND.SPL.backup1 1 block-size*
/dev/mtd2 NAND.SPL.backup2 1 block-size*
/dev/mtd3 NAND.SPL.backup3 1 block-size*
/dev/mtd5 NAND.u-boot-spl-os 2 block-size* [for falcon boot]
/dev/mtd4 NAND.u-boot 1 MB
/dev/mtd6 NAND.u-boot-env 1 block-size*
/dev/mtd7 NAND.u-boot-env.backup1 1 block-size*
/dev/mtd8 NAND.kernel till 0xA00000
/dev/mtd9 NAND.file-system till end of device
* am335x-evm uses NAND device with block-size=128KiB
Signed-off-by: Pekon Gupta <pekon@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Pekon Gupta [Wed, 5 Feb 2014 13:28:30 +0000 (18:58 +0530)]
ARM: OMAP2+: gpmc: update gpmc_hwecc_bch_capable() for new platforms and ECC schemes
This patch
- refactors gpmc_hwecc_bch_capable()
- add checks for new platforms like dra7xx, am43xx
- add checks for OMAP3 SoC, w.r.t. new ECC schemes spawned in following commit:
commit ac65caf514ec3e55e8d3d510ee37f80dd97418fe
ARM: OMAP2+: cleaned-up DT support of various ECC schemes
Signed-off-by: Pekon Gupta <pekon@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Nishanth Menon [Mon, 6 Jan 2014 22:37:33 +0000 (16:37 -0600)]
ARM: dts: omap3430-sdp: add dip switch information for MMC operation
MMC 8 bit mode operation depends on dip switch setting which is not
obvious - The current board file has this description. However, with
removal of the board file in the future, this information will be lost
and has to be rediscovered.
Nishanth Menon [Mon, 9 Dec 2013 21:55:50 +0000 (15:55 -0600)]
ARM: dts: Add basic devices for AM3517-craneboard
Craneboard is a hardware development platform based on the Sitara
AM3517 ARM Cortex - A8 microprocessor device - see [1] for more
details. Add basic devices for craneboard as replacement for the board
file scheduled for removal as part of device tree conversion
projects / karo-tx-linux.git / log