Maxime Ripard [Thu, 27 Mar 2014 15:27:41 +0000 (16:27 +0100)]
ARM: sunxi: Select HAVE_ARM_ARCH_TIMER
In order for the architected timers support to be enabled in the kernel, this
option has to be enabled. Otherwise, the architected timers driver won't be
compiled in, and we will not get to use them.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Kevin Hilman <khilman@linaro.org>
Arnd Bergmann [Tue, 11 Mar 2014 16:41:33 +0000 (17:41 +0100)]
ARM: cache-tauros2: remove ARMv6 code
When building a kernel with support for both ARMv6 and ARMv7 but
no MMU, the call from tauros2_internal_init to adjust_cr causes
a link error. While that could probably be resolved, we don't
actually support cache-tauros2 on ARMv6 any more. All PJ4 CPU
implementations support both ARMv6 and ARMv7 and we already assume
that we are using them only in ARMv7 mode.
Removing the ARMv6 code path reduces the code size and avoids
the linker error.
Arnd Bergmann [Thu, 27 Mar 2014 01:06:36 +0000 (02:06 +0100)]
Merge tag 'davinci-for-v3.15/soc-2' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/soc
Merge "DaVinci SoC fixes for v3.15" from Sekhar Nori:
Includes a patch to enable appended
DTB support for DT booting on DA850
boards with older bootloaders.
* tag 'davinci-for-v3.15/soc-2' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
ARM: davinci: fix DT booting with default defconfig
Arnd Bergmann [Mon, 24 Feb 2014 20:56:19 +0000 (21:56 +0100)]
ARM: mvebu: don't select CONFIG_NEON
CONFIG_NEON is meant to be user-selectable. Turning it on
unconditionally means we can't build a smaller kernel when
we don't need it, and causes build errors if CONFIG_VFP
is not also enabled.
To still have neon enabled however, we need to turn it on
now in multi_v7_defconfig and mvebu_v7_defconfig.
Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Jason Cooper <jason@lakedaemon.net> Acked-by: Gregory Clement <gregory.clement@free-electrons.com> Cc: Andrew Lunn <andrew@lunn.ch> Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Olof Johansson [Thu, 20 Mar 2014 21:35:13 +0000 (14:35 -0700)]
Merge tag 'tegra-for-3.15-tf' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/soc
Merge "ARM: tegra: Trusted Foundations work for 3.15" from Stephen Warren:
This pull request contains a number of cleanups and enhancements for the
Trusted Foundations firmware used on production Tegra SoCs. The changes
allow kernels without TF support to run on HW that uses TF, albeit with
reduced functionality, and also fix the cpuidle feature.
* tag 'tegra-for-3.15-tf' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: cpuidle: use firmware for power down
ARM: trusted_foundations: implement prepare_idle()
ARM: firmware: add prepare_idle() operation
ARM: firmware: enable Trusted Foundations by default
ARM: trusted_foundations: fallback when TF support is missing
ARM: trusted_foundations: fix vendor prefix typos
Kevin Hilman [Fri, 14 Mar 2014 17:30:28 +0000 (10:30 -0700)]
ARM: davinci: fix DT booting with default defconfig
Davinci boards tend to have older booloaders without DTB support.
Enable appended DTB support by default to allow DT booting on older
platforms. While there, also enable /proc/device-tree support for
easy verification of DT boot.
Signed-off-by: Kevin Hilman <khilman@linaro.org> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Arnd Bergmann [Wed, 12 Feb 2014 21:22:00 +0000 (22:22 +0100)]
ARM: davinci: remove tnetv107x support
The tnetv107x support does not compile, and seems to have been broken
for a while with nobody caring to fix it. So far everyone I asked
said it's probably dead and completely unused and will never again
be needed in a future kernel release, so let's delete it.
If someone finds a use for this code later and is able to get it
to work again, we can always revert the removal.
Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Sekhar Nori <nsekhar@ti.com> Acked-by: Kevin Hilman <khilman@linaro.org>
This patch adds Maxime and Patrice to ARM/STi maintainers list.
As Stuart Menefy opted to be removed from the list, this patch removes
his email from maintainers. Updated my email with private email address.
This patch also adds few more drivers to the list so that get_maintainer
script can pick the right people to send patch to and avoid email
bounces.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com> CC: Stuart Menefy <stuart.menefy@st.com> CC: Maxime Coquelin <maxime.coquelin@st.com> CC: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Mon, 17 Mar 2014 09:49:14 +0000 (10:49 +0100)]
Merge tag 'mvebu-soc-3.15-2' of git://git.infradead.org/linux-mvebu into next/soc
Merge "mvebu soc changes for v3.15 (incremental pull #2)" from Jason Cooper:
- mvebu
- Add Armada 375, 380 and 385 SoCs
- kirkwood
- move kirkwood DT support to mach-mvebu
- add mostly DT support for HP T5325 thin client
* tag 'mvebu-soc-3.15-2' of git://git.infradead.org/linux-mvebu:
ARM: kirkwood: Add HP T5325 thin client
ARM: kirkwood: select dtbs based on SoC
ARM: kirkwood: Remove redundant kexec code
ARM: mvebu: Armada 375/38x depend on MULTI_V7
ARM: mvebu: Simplify headers and make local
ARM: mvebu: Enable mvebu-soc-id on Kirkwood
ARM: mvebu: Let kirkwood use the system controller for restart
ARM: mvebu: Move kirkwood DT boards into mach-mvebu
ARM: MM Enable building Feroceon L2 cache controller with ARCH_MVEBU
ARM: Fix default CPU selection for ARCH_MULTI_V5
ARM: MM: Add DT binding for Feroceon L2 cache
ARM: orion: Move cache-feroceon-l2.h out of plat-orion
ARM: mvebu: Add ARCH_MULTI_V7 to SoCs
ARM: kirkwood: ioremap memory control register
ARM: kirkwood: ioremap the cpu_config register before using it.
ARM: kirkwood: Separate board-dt from common and pcie code.
ARM: kirkwood: Drop printing the SoC type and revision
ARM: kirkwood: Convert mv88f6281gtw_ge switch setup to DT
ARM: kirkwood: Give pm.c its own header file.
ARM: mvebu: Rename the ARCH_MVEBU menu option
Olof Johansson [Mon, 17 Mar 2014 07:49:36 +0000 (00:49 -0700)]
Merge tag 'renesas-soc3-for-v3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc
Merge "Third Round of Renesas ARM Based SoC Updates for v3.15" from Simon
Horman:
Fix warnings due to improper printk formats in shared APMU code.
* tag 'renesas-soc3-for-v3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: APMU: Fix warnings due to improper printk formats
Low-level debugging using the Broadcom Kona UART only makes sense on the
ARCH_BCM_MOBILE platform and would otherwise prevent ARCH_BCM_63XX from
picking up the right UART implementation by default.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Tim Kryger <tim.kryger@linaro.org> Signed-off-by: Matt Porter <mporter@linaro.org>
Markus Mayer [Thu, 6 Mar 2014 09:18:13 +0000 (17:18 +0800)]
ARM: bcm21664: Add board support.
Add support for the Broadcom BCM21664 mobile SoC. It has two Cortex-A9
cores like the BCM281xx family of chips. BCM21664 and BCM281xx share
many IP blocks in addition to the ARM cores.
Signed-off-by: Markus Mayer <markus.mayer@linaro.org> Signed-off-by: Matt Porter <mporter@linaro.org>
Olof Johansson [Tue, 11 Mar 2014 20:18:21 +0000 (13:18 -0700)]
Merge tag 'armsoc/for-3.15/soc-2' of git://github.com/broadcom/mach-bcm into next/soc
Merge "ARM: mach-bcm soc updates" from Matt Porter:
- add BCM5301x support
- remove GENERIC_TIME
* tag 'armsoc/for-3.15/soc-2' of git://github.com/broadcom/mach-bcm:
ARM: BCM5301X: workaround suppress fault
ARM: BCM5301X: add early debugging support
ARM: BCM5301X: initial support for the BCM5301X/BCM470X SoCs with ARM CPU
ARM: mach-bcm: Remove GENERIC_TIME
Olof Johansson [Sun, 9 Mar 2014 19:46:59 +0000 (12:46 -0700)]
ARM: enable ARM_HAS_SG_CHAIN for multiplatform
Enable ARM_HAS_SG_CHAIN for all multiplatform targets, it makes sense
to enable on all "modern" platforms; downsides are limited for platforms
that don't need it.
Requested-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Sun, 9 Mar 2014 19:03:18 +0000 (12:03 -0700)]
Merge tag 'imx-soc-3.15' of git://git.linaro.org/people/shawnguo/linux-2.6 into next/soc
i.MX SoC changes for 3.15 from Shawn Guo:
- Support suspend from ocram (DDR IO floating) for imx6 platforms
- Add cpuidle support for imx6sl
- Sparse warning fixes for imx6sl and vf610 clock code
- Remove PWM platform code
- Support ptp and rmii clock from pad
- Support WEIM CS GPR configuration
- Random cleanups and defconfig updates
* tag 'imx-soc-3.15' of git://git.linaro.org/people/shawnguo/linux-2.6: (373 commits)
ARM: imx6: drop .text.head section annotation from headsmp.S
ARM: imx6: build suspend-imx6.o with CONFIG_SOC_IMX6
ARM: imx6: rename pm-imx6q.c to pm-imx6.c
ARM: imx6: introduce CONFIG_SOC_IMX6 for i.MX6 common stuff
ARM: imx6: do not call imx6q_suspend_init() with !CONFIG_SUSPEND
ARM: imx6: call suspend_set_ops() from suspend routine
ARM: imx6: build headsmp.o only on CONFIG_SMP
ARM: imx6: move v7_cpu_resume() into suspend-imx6.S
ARM i.MX6q: Mark VPU and IPU AXI transfers as cacheable, increase IPU priority
ARM: imx6q: Add GPR6 and GPR7 register definitions for iomuxc gpr
bus: imx-weim: support CS GPR configuration
ARM: mach-imx: Kconfig: Remove IMX_HAVE_PLATFORM_IMX2_WDT from SOC_IMX53
ARM: imx_v6_v7_defconfig: Select CONFIG_DEBUG_FS
ARM: mach-imx: Select CONFIG_SRAM at ARCH_MXC level
ARM: imx: add speed grading check for i.mx6 soc
ARM: imx: avoid calling clk APIs in idle thread which may cause schedule
ARM: imx6q: support ptp and rmii clock from pad
ARM: imx6q: remove unneeded clk lookups
ARM: imx_v6_v7_defconfig: Select CONFIG_MMC_UNSAFE_RESUME
ARM: imx_v4_v5_defconfig: Select CONFIG_MMC_UNSAFE_RESUME
...
* tag 'omap-for-v3.15/prcm-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP3+: DPLL: stop reparenting to same parent if already done
ARM: OMAP2+: clock: fix rate prints
ARM: AM43x: hwmod data: register spinlock OCP interface
ARM: OMAP2+: clockdomain: Reintroduce SW_SLEEP Support
ARM: OMAP2+: AM43xx: implement support for machine restart
Olof Johansson [Sun, 9 Mar 2014 07:02:00 +0000 (23:02 -0800)]
Merge tag 'omap-for-v3.15/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc
OMAP SoC changes from Tony Lindgren:
Few SoC related improvments for omaps.
* tag 'omap-for-v3.15/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP2+: remove OMAP_PACKAGE_ZAC and OMAP_PACKAGE_ZAF
ARM: OMAP2+: AM43x: Use gptimer as clocksource
ARM: OMAP2+: AM43x: determine features
ARM: OMAP2+: AM43x: Add ID for ES1.1
ARM: OMAP2+: AM43x: enable in default config
Sekhar Nori [Tue, 25 Feb 2014 11:57:55 +0000 (17:27 +0530)]
ARM: davinci: enable da8xx build concurrently with older devices
Enable da8xx devices to build concurrently with older
(traditional) DaVinci devices. Do this by defining multiple
zreladdr values and enabling AUTO_ZRELADDR to prevent
build regressions. Note that we do not enable AUTO_ZRELADDR in
da8xx_omapl_defconfig since it is meant to be removed.
Markus Mayer [Tue, 25 Feb 2014 22:17:43 +0000 (14:17 -0800)]
ARM: bcm281xx: Move kona_l2_cache_init() so it can be shared
In preparation for future SoCs, move kona_l2_cache_init() from board
specific board_bcm281xx.c to shared kona.c, so multiple SoC families
can make use of it. Also change the return type to "void", since we
never look at the return code anyway.
Signed-off-by: Markus Mayer <markus.mayer@linaro.org> Signed-off-by: Matt Porter <mporter@linaro.org>
Hauke Mehrtens [Mon, 3 Feb 2014 23:01:46 +0000 (00:01 +0100)]
ARM: BCM5301X: workaround suppress fault
Without this patch I am getting a unhandled fault exception like this
one after "Freeing unused kernel memory":
Freeing unused kernel memory: 1260K (c02c1000 - c03fc000)
Unhandled fault: imprecise external abort (0x1c06) at 0xb6f89005
Kernel panic - not syncing: Attempted to kill init! exitcode=0x00000007
The address which is here 0xb6f89005 changes from boot to boot, with a
new build the changes are bigger. With kernel 3.10 I have also seen
this fault at different places in the boot process, but starting with
3.11 they are always occurring after the "Freeing unused kernel memory"
message. I never was able to completely boot to userspace without this
handler. The abort code is constant 0x1c06. This fault just happens
once in the boot process I have never seen it happing twice or more.
I also tried changing the CPSR.A bit to 0 in init_early, with this code
like Afzal suggested, but that did not change anything:
asm volatile("mrs r12, cpsr\n"
"bic r12, r12, #0x00000100\n"
"msr cpsr_c, r12" ::: "r12", "cc", "memory");
Disabling the L2 cache by building with CONFIG_CACHE_L2X0 unset did not
help.
This workaround was copied from the vendor code including most of the
comments. It says it they think this is caused by the CFE boot loader
used on this device. I do not have any access to any datasheet or
errata document to check this.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Christian Daudt <bcm@fixthebug.org> Signed-off-by: Matt Porter <mporter@linaro.org>
Hauke Mehrtens [Mon, 3 Feb 2014 23:01:43 +0000 (00:01 +0100)]
ARM: BCM5301X: initial support for the BCM5301X/BCM470X SoCs with ARM CPU
This patch adds support for the BCM5301X/BCM470X SoCs with an ARM CPUs.
Currently just booting to a shell is working and nothing else, no
Ethernet, wifi, flash, ...
I have some pending patches to make Ethernet work for this device.
Mostly device tree support for bcma is missing.
This SoC is used in small office and home router with Broadcom SoCs
it's internal name is Northstar. This code should support the BCM4707,
BCM4708, BCM4709, BCM53010, BCM53011 and BCM53012 SoC. It uses one or
two ARM Cortex A9 Cores, some highlights are 2 PCIe 2.0 controllers,
4 Gigabit Ethernet MACs and a USB 3.0 host controller.
This SoC uses a dual core CPU, but this is currently not implemented.
More information about this SoC can be found here:
http://www.anandtech.com/show/5925/broadcom-announces-bcm4708x-and-bcm5301x-socs-for-80211ac-routers
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Christian Daudt <bcm@fixthebug.org> Signed-off-by: Matt Porter <mporter@linaro.org>
Signed-off-by: Richard Weinberger <richard@nod.at> Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Paul Bolle <pebolle@tiscali.nl> Signed-off-by: Christian Daudt <bcm@fixthebug.org> Signed-off-by: Matt Porter <mporter@linaro.org>
Shawn Guo [Thu, 27 Feb 2014 08:00:55 +0000 (16:00 +0800)]
ARM: imx6: build suspend-imx6.o with CONFIG_SOC_IMX6
Even when CONFIG_SUSPEND is enabled, it makes no sense to build
suspend-imx6.o if none of i.MX6 support is built in. Let's build
suspend-imx6.o only when both CONFIG_SUSPEND and CONFIG_SOC_IMX6 are
enabled.
Shawn Guo [Wed, 26 Feb 2014 13:28:18 +0000 (21:28 +0800)]
ARM: imx6: call suspend_set_ops() from suspend routine
Rename function imx6q_ocram_suspend_init() to imx6q_suspend_init() and
call suspend_set_ops() from there. Now we get a centralized function
for suspend initialization.
Shawn Guo [Wed, 26 Feb 2014 11:57:56 +0000 (19:57 +0800)]
ARM: imx6: build headsmp.o only on CONFIG_SMP
With v7_cpu_resume() being moved out of headsmp.S, all the remaining
code in the file is only needed by CONFIG_SMP build. So we can control
the build of headsmp.o with only obj-$(CONFIG_SMP) now.
Shawn Guo [Wed, 26 Feb 2014 11:48:33 +0000 (19:48 +0800)]
ARM: imx6: move v7_cpu_resume() into suspend-imx6.S
The suspend-imx6.S is introduced recently for suspend low-level assembly
code. Since function v7_cpu_resume() is only used by suspend support,
it makes sense to move the function into suspend-imx6.S, and control the
build of the file with CONFIG_SUSPEND option.
Philipp Zabel [Mon, 24 Feb 2014 13:51:50 +0000 (14:51 +0100)]
ARM i.MX6q: Mark VPU and IPU AXI transfers as cacheable, increase IPU priority
This is needed so that the IPU framebuffer scanout cannot be
starved by VPU or GPU activity.
Some boards like the SabreLite and SabreSD seem to set this in
the DCD already, but the documented register reset values do not
contain the necessary settings.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Shawn Guo [Tue, 11 Feb 2014 01:52:09 +0000 (09:52 +0800)]
bus: imx-weim: support CS GPR configuration
For imx50-weim and imx6q-weim type of devices, there might a WEIM CS
space configuration register in General Purpose Register controller,
e.g. IOMUXC_GPR1 on i.MX6Q.
Depending on which configuration of the following 4 is chosen for given
system, IOMUXC_GPR1[11:0] should be set up as 05, 033, 0113 or 01111
correspondingly.
The patch creates a function for such type of devices, which scans
'ranges' property of WEIM node and build the GPR value incrementally.
Thus the WEIM CS GPR can be set up automatically at boot time.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Reviewed-by: Philippe De Muyter <phdm@macqel.be> Tested-by: Philippe De Muyter <phdm@macqel.be>
Fabio Estevam [Fri, 21 Feb 2014 22:21:40 +0000 (19:21 -0300)]
ARM: mach-imx: Kconfig: Remove IMX_HAVE_PLATFORM_IMX2_WDT from SOC_IMX53
SOC_IMX53 is a device-tree only platform, so we don't need
IMX_HAVE_PLATFORM_IMX2_WDT at all because this symbol only provides some code
to help register imx2-wdt platform devices.
Anson Huang [Tue, 11 Feb 2014 08:25:48 +0000 (16:25 +0800)]
ARM: imx: avoid calling clk APIs in idle thread which may cause schedule
As clk_pllv3_wait_lock will call usleep_range, and the clk APIs
mutex lock may be held when CPU entering idle, so calling clk
APIs must be avoided in cpu idle thread, this is to avoid reschedule
warning in cpu idle, just access register directly to achieve that.
Shawn Guo [Thu, 6 Feb 2014 05:22:02 +0000 (13:22 +0800)]
ARM: imx6q: support ptp and rmii clock from pad
On imx6qdl, the ENET RMII and PTP clock can come from either internal
ANATOP/CCM or external clock source through pad GPIO_16. But in case
of the external clock source, bit IOMUXC_GPR1[21] needs to be cleared.
The patch adds the support for systems that use an external clock source
and distinguishes above two cases by checking if the PTP clock specified
in device tree is the one coming from the internal ANATOP/CCM.
Shawn Guo [Thu, 6 Feb 2014 03:28:58 +0000 (11:28 +0800)]
ARM: imx6q: remove unneeded clk lookups
Since commit (a94f8ec ARM: imx6q: remove board specific CLKO setup),
a number of clk lookups in imx6q clock driver is no longer needed.
Let's remove them.
The cpu0 lookup is also removed since we are now running imx6 cpufreq
driver and looking up clocks from device tree.
PM subsystem treats mmc card as removed during suspend.
If MMC is used to store the root file system, it is better to tell the kernel
not to treat it as a removable media, so select CONFIG_MMC_UNSAFE_RESUME for
such purpose.
PM subsystem treats mmc card as removed during suspend.
If MMC is used to store the root file system, it is better to tell the kernel
not to treat it as a removable media, so select CONFIG_MMC_UNSAFE_RESUME for
such purpose.
Anson Huang [Wed, 22 Jan 2014 07:14:47 +0000 (15:14 +0800)]
ARM: imx: add always-on clock array for i.mx6sl to maintain correct usecount
IPG, ARM and MMDC's clock should be enabled during kernel boot up,
so we need to maintain their usecount, otherwise, they may be
disabled unexpectedly if their children's clock are turned off, and
caused their parent PLLs also get disabled, which is incorrect.
Anson Huang [Fri, 17 Jan 2014 03:39:07 +0000 (11:39 +0800)]
ARM: imx: add suspend in ocram support for i.mx6sl
i.MX6SL's suspend in ocram function is derived from i.MX6Q,
it can lower the DDR IO power from ~10mA@1.2V to ~1mA@1.2V,
measured on i.MX6SL EVK board, SH5.
Anson Huang [Fri, 17 Jan 2014 03:39:06 +0000 (11:39 +0800)]
ARM: imx: add suspend in ocram support for i.mx6dl
i.MX6DL's suspend in ocram function is derived from i.MX6Q,
it can lower the DDR IO power from ~26mA@1.5V to ~15mA@1.5V,
measured on i.MX6DL SabreSD board, R25.
Anson Huang [Fri, 17 Jan 2014 03:39:05 +0000 (11:39 +0800)]
ARM: imx: add suspend in ocram support for i.mx6q
When system enter suspend, we can set the DDR IO to
high-Z state to save DDR IOs' power consumption, this
operation can save many power(from ~26mA@1.5V to ~15mA@1.5V,
measured on i.MX6Q SabreSD board, R25) of DDR IOs. To
achieve that, we need to copy the suspend code to ocram
and run the low level hardware related code(set DDR IOs
to high-Z state) in ocram.
If there is no ocram space available, then system will
still do suspend in external DDR, hence no DDR IOs will
be set to high-Z.
There should be no duplicate const specifiers for those static
constant character string arrays defined for clock mux options.
Also, the arrays are only taken as the 5th argument for the
imx_clk_mux() function, which is in the type of 'const char
**parents'. So, let's remove the 2nd const specifier right
after 'char'.
There should be no duplicate const specifiers for those static
constant character string arrays defined for clock mux options.
Also, the arrays are only taken as the 5th argument for the
imx_clk_mux() function, which is in the type of 'const char
**parents'. So, let's remove the 2nd const specifier right
after 'char'.
Anson Huang [Thu, 9 Jan 2014 08:03:16 +0000 (16:03 +0800)]
ARM: imx: add cpuidle support for i.mx6sl
Add cpuidle support for i.MX6SL, currently only support
two cpuidle levels(ARM wfi and WAIT mode), and add software
workaround for WAIT mode errata as below:
ERR005311 CCM: After exit from WAIT mode, unwanted interrupt(s) taken
during WAIT mode entry process could cause cache memory
corruption.
Software workaround:
To prevent this issue from occurring, software should ensure that
the ARM to IPG clock ratio is less than 12:5 (that is < 2.4x), before
entering WAIT mode.
Anson Huang [Tue, 7 Jan 2014 17:46:04 +0000 (12:46 -0500)]
ARM: imx: AHB rate must be set to 132MHz on i.mx6sl
The reset value of AHB divider is 3, so current AHB rate
is 99MHz which is not correct for kernel, need to ensure
AHB rate is 132MHz in clk driver, as ipg is sourcing from
AHB, and it should be 66MHz by default.
Shawn Guo [Wed, 5 Mar 2014 02:31:54 +0000 (10:31 +0800)]
Merge tag 'kconfig-cleanup-for-3.15' into imx/soc
- Remove common kconfig options required by multi-platform builds out
of individual platforms as they are redundant.
- Make SMP, CACHE_L2X0 and GPIO config options user visible on
multi-platform builds as most platforms enable these options and all
platforms can run with them enabled.
- Make multi-platform v6 default to more optimal v6k rather than v6
- Remove the last bit of mach-virt and convert it to just a kconfig
option.
With all the DT support preparation done, we are able to move Dove
to MVEBU easily. Legacy non-DT mach-dove is left untouched to rot
for a while before removal.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Heiko Stuebner [Mon, 17 Jun 2013 20:29:23 +0000 (22:29 +0200)]
ARM: rockchip: add smp bringup code
This adds the necessary smp-operations and startup code to use
additional cores on Rockchip SoCs.
We currently hog the power management unit in the smp code, as it is
necessary to control the power to the cpu core and nothing else is
currently using it, so a generic implementation can be done later.
Paul Bolle [Sun, 16 Feb 2014 18:51:37 +0000 (19:51 +0100)]
ARM: OMAP2+: remove OMAP_PACKAGE_ZAC and OMAP_PACKAGE_ZAF
The Kconfig symbols OMAP_PACKAGE_ZAC and OMAP_PACKAGE_ZAF were added in
v2.6.36. They have never been used. Setting them has no effect. These
symbols can safely be removed.
Signed-off-by: Paul Bolle <pebolle@tiscali.nl>
[tony@atomide.com: updated to remove also the related mux.h entries] Signed-off-by: Tony Lindgren <tony@atomide.com>
Rajendra Nayak [Fri, 7 Feb 2014 10:21:26 +0000 (15:51 +0530)]
ARM: OMAP2+: AM43x: Use gptimer as clocksource
The SyncTimer in AM43x is clocked using the following two sources:
1) An inaccuarte 32k clock (CLK_32KHZ) derived from PER DPLL, causing system
time to go slowly (~10% deviation).
2) external 32KHz RTC clock, which may not always be available on board like
in the case of ePOS EVM
Use gptimer as clocksource instead, as is done in the case of AM335x
(which does not have a SyncTimer). With this, system time keeping works
accurately.
Nishanth Menon [Fri, 28 Feb 2014 19:43:47 +0000 (12:43 -0700)]
ARM: OMAP3+: DPLL: stop reparenting to same parent if already done
omap3_noncore_dpll_set_rate forces a reparent to the same clk_ref
for every call that takes place. This is an can be done only if a change
is detected.
Signed-off-by: Nishanth Menon <nm@ti.com> Acked-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
AM43xx has a spinlock module which is identical to the
one present on AM33xx. Register the spinlock ocp_if link
so that the spinlock hwmod and associated omap_device can
be instantiated, and the runtime pm API could be used by
the OMAP hwspinlock driver.
Cc: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
Dave Gerlach [Fri, 28 Feb 2014 19:43:46 +0000 (12:43 -0700)]
ARM: OMAP2+: clockdomain: Reintroduce SW_SLEEP Support
Since commit 65aa94b204d (ARM: OMAP4: clockdomain/CM code: Update supported
transition modes), on OMAP4, all CLKDMs support HW_AUTO so this is used
instead of SW_SLEEP for the idling of clockdomains. However, additional
SoCs now leverage the OMAP4 clockdomain code so update it to use SW_SLEEP
if the clockdomain data specifies that the CLKDM has the
CLKDM_CAN_FORCE_SLEEP flag set rather than using HW_AUTO for both cases.
Without this patch, clockdomain handling is broken on AM43xx and no
clockdomains are actually being put into idle on this platform. Any
attempt to idle them results in the HW_AUTO value (0x3) being written
to them with no apparent effect.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
[paul@pwsan.com: added extra explanatory text from patch set intro] Signed-off-by: Paul Walmsley <paul@pwsan.com>
projects / karo-tx-linux.git / log