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12 >MIPS/MIPS32(CoreLV 4Kc)+MIPS64(CoreLV 5Kc) Malta Board </TITLE
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22 TITLE="Installation and Testing"
23 HREF="installation-and-testing.html"><LINK
25 TITLE="MIPS/MIPS32(CoreLV 4Kc)+MIPS64(CoreLV 5Kc) Atlas Board"
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28 TITLE="MIPS/RM7000 PMC-Sierra Ocelot"
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40 SUMMARY="Header navigation table"
49 >eCos Reference Manual</TH
65 >Chapter 5. Installation and Testing</TD
85 NAME="MALTA">MIPS/MIPS32(CoreLV 4Kc)+MIPS64(CoreLV 5Kc) Malta Board</H1
91 NAME="AEN6809">Overview</H2
93 >RedBoot supports both front
94 facing serial ports and the built in ethernet port for communication and downloads.
95 The default serial port settings are 38400,8,N,1. RedBoot runs from and supports
96 flash management for the system flash region.</P
98 >The following RedBoot configurations are supported:
101 CLASS="INFORMALTABLE"
141 >RedBoot running from the board's flash boot
160 >RedBoot running from RAM with RedBoot in the
161 flash boot sector.</TD
179 NAME="AEN6838">Initial Installation</H2
181 >RedBoot is installed using the code download facility built into the
182 Malta board. See the Malta User manual for details, and also the Malta download
184 HREF="malta.html#MALTA-DOWNLOAD-FORMAT"
185 >the Section called <I
186 >Malta download format</I
194 NAME="AEN6842">Quick download instructions</H3
196 >Here are quick start instructions for downloading the prebuilt RedBoot
204 >Locate the prebuilt files in the bin directory: <TT
214 >Make sure switch S5-1 is ON. Reset the board and verify that
215 the LED display reads <TT
216 CLASS="COMPUTEROUTPUT"
222 >Make sure your parallel port is connected to the 1284 port
223 Of the Atlas board. </P
231 parallel port to erase previous images:
243 >cat deleteall.fl >/dev/lp0</B
250 When this is complete, the LED display should read
252 CLASS="COMPUTEROUTPUT"
258 >Send the RedBoot image to the board:
270 >cat redboot_ROM.fl >/dev/lp0</B
277 When this is complete, the LED display should show the last address
278 programmed. This will be something like:
280 CLASS="COMPUTEROUTPUT"
286 >Change switch S5-1 to OFF and reset the board. The LED display
288 CLASS="COMPUTEROUTPUT"
300 > commands to initialize the flash. See <A
301 HREF="flash-image-system.html"
302 >the Section called <I
303 >Flash Image System (FIS)</I
307 HREF="persistent-state-flash.html"
308 >the Section called <I
309 >Persistent State Flash-based Configuration and Control</I
320 NAME="MALTA-DOWNLOAD-FORMAT">Malta download format</H3
322 >In order to download RedBoot to the Malta board, it must be converted
323 to the Malta download format.</P
327 >Atlas/Malta Developer's Kit</I
328 > CD contains an <SPAN
331 > utility which requires Perl. This utility is part
334 >yamon/yamon-src-02.00.tar.gz</TT
336 on the Dev Kit CD. The path in the expanded tarball is <TT
343 > to convert the S-record file:
355 >cp redboot_ROM.srec redboot_ROM.rec</B
361 >srecconv.pl -ES L -A 29 redboot_ROM</B
368 The resulting file is named <TT
379 NAME="AEN6888">Additional commands</H2
384 > command which allows the
385 loading and execution of Linux kernels, is supported for this architecture
387 HREF="executing-programs.html"
388 >the Section called <I
389 >Executing Programs from RedBoot</I
395 > parameters used for MIPS boards are:</P
410 >Location to store command line and environment passed to kernel</P
421 >Wait time in seconds before starting kernel</P
432 >Parameters passed to kernel</P
443 >Kernel entry point, defaulting to the entry point of the last image
449 >Linux kernels on MIPS platforms expect the entry point to be called with arguments
450 in the registers equivalent to a C call with prototype:
458 CLASS="PROGRAMLISTING"
459 >void Linux(int argc, char **argv, char **envp);</PRE
465 >RedBoot will place the appropriate data at the offset specified by the
471 > parameter, or by default at address 0x80080000, and will set the
472 arguments accordingly when calling into the kernel.</P
474 >The default entry point, if no image with explicit entry point has been loaded and
475 none is specified, is 0x80000750.</P
482 NAME="AEN6920">Interrupts</H2
484 >RedBoot uses an interrupt vector table which is located at address 0x80000200.
485 Entries in this table are pointers to functions with this protoype: <TABLE
492 CLASS="PROGRAMLISTING"
493 >int irq_handler( unsigned vector, unsigned data )</PRE
498 board, the vector argument is one of 22 interrupts defined in <TT
499 CLASS="COMPUTEROUTPUT"
505 >/include/plf_intr.h</TT
513 CLASS="PROGRAMLISTING"
514 > #define CYGNUM_HAL_INTERRUPT_SOUTH_BRIDGE_INTR 0
515 #define CYGNUM_HAL_INTERRUPT_SOUTH_BRIDGE_SMI 1
516 #define CYGNUM_HAL_INTERRUPT_CBUS_UART 2
517 #define CYGNUM_HAL_INTERRUPT_COREHI 3
518 #define CYGNUM_HAL_INTERRUPT_CORELO 4
519 #define CYGNUM_HAL_INTERRUPT_COMPARE 5
520 #define CYGNUM_HAL_INTERRUPT_TIMER 6
521 #define CYGNUM_HAL_INTERRUPT_KEYBOARD 7
522 #define CYGNUM_HAL_INTERRUPT_CASCADE 8
523 #define CYGNUM_HAL_INTERRUPT_TTY1 9
524 #define CYGNUM_HAL_INTERRUPT_TTY0 10
525 #define CYGNUM_HAL_INTERRUPT_11 11
526 #define CYGNUM_HAL_INTERRUPT_FLOPPY 12
527 #define CYGNUM_HAL_INTERRUPT_PARALLEL 13
528 #define CYGNUM_HAL_INTERRUPT_REAL_TIME_CLOCK 14
529 #define CYGNUM_HAL_INTERRUPT_I2C 15
530 #define CYGNUM_HAL_INTERRUPT_PCI_AB 16
531 #define CYGNUM_HAL_INTERRUPT_PCI_CD 17
532 #define CYGNUM_HAL_INTERRUPT_MOUSE 18
533 #define CYGNUM_HAL_INTERRUPT_19 19
534 #define CYGNUM_HAL_INTERRUPT_IDE_PRIMARY 20
535 #define CYGNUM_HAL_INTERRUPT_IDE_SECONDARY 21</PRE
540 passed to the ISR is pulled from a data table (<TT
541 CLASS="COMPUTEROUTPUT"
542 >hal_interrupt_data</TT
543 >) which immediately follows the interrupt vector table. With
544 22 interrupts, the data table starts at address 0x80000258.</P
546 >An application may create a normal C function with the above prototype
547 to be an ISR. Just poke its address into the table at the correct index and
548 enable the interrupt at its source. The return value of the ISR is ignored
556 NAME="AEN6929">Memory Maps</H2
558 >Memory Maps RedBoot sets up the following memory map on the Malta board.<DIV
565 >The virtual memory maps in this section use a C and B column to indicate
566 whether or not the region is cached (C) or buffered (B).</P
576 CLASS="PROGRAMLISTING"
577 >Physical Address Range C B Description
578 ----------------------- - - -----------
579 0x80000000 - 0x81ffffff Y Y SDRAM
580 0x9e000000 - 0x9e3fffff Y N System flash (cached)
581 0x9fc00000 - 0x9fffffff Y N System flash (mirrored)
582 0xa8000000 - 0xb7ffffff N N PCI Memory Space
583 0xb4000000 - 0xb40fffff N N Galileo System Controller
584 0xb8000000 - 0xb80fffff N N Southbridge / ISA
585 0xb8100000 - 0xbbdfffff N N PCI I/O Space
586 0xbe000000 - 0xbe3fffff N N System flash (noncached)
587 0xbf000000 - 0xbfffffff N N Board logic FPGA</PRE
598 NAME="AEN6936">Rebuilding RedBoot</H2
600 >These shell variables provide the platform-specific information
601 needed for building RedBoot according to the procedure described in
603 HREF="rebuilding-redboot.html"
613 CLASS="PROGRAMLISTING"
614 >export TARGET=malta_mips32_4kc
616 export PLATFORM_DIR=malta</PRE
622 >The names of configuration files are listed above with the
623 description of the associated modes.</P
631 SUMMARY="Footer navigation table"
670 >MIPS/MIPS32(CoreLV 4Kc)+MIPS64(CoreLV 5Kc) Atlas Board</TD
676 HREF="installation-and-testing.html"
684 >MIPS/RM7000 PMC-Sierra Ocelot</TD