1 #ifndef CYGONCE_CAN_LPC2XXX_BAUDRATES_H
2 #define CYGONCE_CAN_LPC2XXX_BAUDRATES_H
3 //==========================================================================
5 // devs/can/arm/lpc2xxx/current/include/can_lpc2xxx_baudrates.h
7 // Precalculated values for bit timing register
9 //==========================================================================
10 //####ECOSGPLCOPYRIGHTBEGIN####
11 // -------------------------------------------
12 // This file is part of eCos, the Embedded Configurable Operating System.
13 // Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
14 // Copyright (C) 2003 Gary Thomas
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22 // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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27 // 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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30 // or inline functions from this file, or you compile this file and link it
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33 // License. However the source code for this file must still be made available
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41 // -------------------------------------------
42 //####ECOSGPLCOPYRIGHTEND####
43 //==========================================================================
44 //#####DESCRIPTIONBEGIN####
46 // Author(s): Uwe Kindler
47 // Contributors: Uwe Kindler
49 // Purpose: Precalculated bit timing values for various baudrates
52 //####DESCRIPTIONEND####
54 //==========================================================================
58 // Macro for creation of CAN_BR value for baudrate tbl
60 #define CAN_BR_TBL_ENTRY(_brp_, _tseg1_, _tseg2_, _sjw_, _sam_) \
61 ((_sam_ << 23) | (_tseg2_ << 20) | (_tseg1_ << 16) | (_sjw_ << 14) | (_brp_))
64 #ifndef CYGNUM_HAL_ARM_LPC2XXX_CAN_CLK
65 #error "CYGNUM_HAL_ARM_LPC2XXX_CAN_CLK not defined"
67 //==========================================================================
69 //==========================================================================
70 #if CYGNUM_HAL_ARM_LPC2XXX_CAN_CLK == 60000000
72 // Table with register values for baudrates at peripheral clock of 60 MHz
74 static const cyg_uint32 lpc2xxx_br_tbl[] =
76 CAN_BR_TBL_ENTRY(300, 15, 2, 0, 1), // 10 kbaud
77 CAN_BR_TBL_ENTRY(150, 15, 2, 0, 1), // 20 kbaud
78 CAN_BR_TBL_ENTRY(59, 15, 2, 0, 1), // 50 kbaud
79 CAN_BR_TBL_ENTRY(39, 11, 1, 0, 1), // 100 kbaud
80 CAN_BR_TBL_ENTRY(29, 12, 1, 0, 1), // 125 kbaud
81 CAN_BR_TBL_ENTRY(14, 12, 1, 0, 1), // 250 kbaud
82 CAN_BR_TBL_ENTRY( 7, 11, 1, 0, 0), // 500 kbaud
83 CAN_BR_TBL_ENTRY( 4, 11, 1, 0, 0), // 800 kbaud
84 CAN_BR_TBL_ENTRY( 3, 11, 1, 0, 0), // 1000 kbaud
85 CAN_BR_TBL_ENTRY( 0, 0, 0, 0, 0), // Autobaud - not supported
87 #define HAL_LPC2XXX_BAUD_TBL_DEFINED 1
88 #endif // CYGNUM_HAL_ARM_LPC2XXX_CAN_CLK == 60000000
90 #if CYGNUM_HAL_ARM_LPC2XXX_CAN_CLK == 30000000
92 // Table with register values for baudrates at peripheral clock of 30 MHz
94 static const cyg_uint32 lpc2xxx_br_tbl[] =
96 CAN_BR_TBL_ENTRY( 0, 0, 0, 0, 0), // 10 kbaud - not supported
97 CAN_BR_TBL_ENTRY( 0, 0, 0, 0, 0), // 20 kbaud - not supported
98 CAN_BR_TBL_ENTRY(59, 15, 2, 0, 1), // 50 kbaud
99 CAN_BR_TBL_ENTRY(39, 11, 1, 0, 1), // 100 kbaud
100 CAN_BR_TBL_ENTRY(29, 12, 1, 0, 1), // 125 kbaud
101 CAN_BR_TBL_ENTRY(14, 12, 1, 0, 1), // 250 kbaud
102 CAN_BR_TBL_ENTRY( 7, 11, 1, 0, 0), // 500 kbaud
103 CAN_BR_TBL_ENTRY( 4, 11, 1, 0, 0), // 800 kbaud
104 CAN_BR_TBL_ENTRY( 3, 11, 1, 0, 0), // 1000 kbaud
105 CAN_BR_TBL_ENTRY( 0, 0, 0, 0, 0), // Autobaud - not supported
107 #define HAL_LPC2XXX_BAUD_TBL_DEFINED 1
108 #endif // CYGNUM_HAL_ARM_LPC2XXX_CAN_CLK == 30000000
110 #if CYGNUM_HAL_ARM_LPC2XXX_CAN_CLK == 15000000
112 // Table with register values for baudrates at peripheral clock of 15 MHz
114 static const cyg_uint32 lpc2xxx_br_tbl[] =
116 CAN_BR_TBL_ENTRY(59, 15, 7, 0, 1), // 10 kbaud
117 CAN_BR_TBL_ENTRY(49, 11, 1, 0, 1), // 20 kbaud
118 CAN_BR_TBL_ENTRY(19, 11, 1, 0, 1), // 50 kbaud
119 CAN_BR_TBL_ENTRY( 9, 11, 1, 0, 1), // 100 kbaud
120 CAN_BR_TBL_ENTRY( 7, 11, 1, 0, 1), // 125 kbaud
121 CAN_BR_TBL_ENTRY( 3, 11, 1, 0, 1), // 250 kbaud
122 CAN_BR_TBL_ENTRY( 1, 11, 1, 0, 0), // 500 kbaud
123 CAN_BR_TBL_ENTRY( 0, 0, 0, 0, 0), // 800 kbaud - not supported
124 CAN_BR_TBL_ENTRY( 0, 11, 1, 0, 0), // 1000 kbaud
125 CAN_BR_TBL_ENTRY( 0, 0, 0, 0, 0), // Autobaud - not supported
127 #define HAL_LPC2XXX_BAUD_TBL_DEFINED 1
128 #endif // CYGNUM_HAL_ARM_LPC2XXX_CAN_CLK == 15000000
130 #if CYGNUM_HAL_ARM_LPC2XXX_CAN_CLK == 48000000
132 // Table with register values for baudrates at peripheral clock of 48 MHz
134 static const cyg_uint32 lpc2xxx_br_tbl[] =
136 CAN_BR_TBL_ENTRY( 0, 0, 0, 0, 0), // 10 kbaud - not supported
137 CAN_BR_TBL_ENTRY( 0, 0, 0, 0, 0), // 20 kbaud - not supported
138 CAN_BR_TBL_ENTRY(59, 12, 1, 0, 1), // 50 kbaud
139 CAN_BR_TBL_ENTRY(29, 12, 1, 0, 1), // 100 kbaud
140 CAN_BR_TBL_ENTRY(23, 12, 1, 0, 1), // 125 kbaud
141 CAN_BR_TBL_ENTRY(11, 12, 1, 0, 1), // 250 kbaud
142 CAN_BR_TBL_ENTRY( 5, 12, 1, 0, 0), // 500 kbaud
143 CAN_BR_TBL_ENTRY( 3, 11, 1, 0, 0), // 800 kbaud
144 CAN_BR_TBL_ENTRY( 2, 12, 1, 0, 0), // 1000 kbaud
145 CAN_BR_TBL_ENTRY( 0, 0, 0, 0, 0), // Autobaud - not supported
147 #define HAL_LPC2XXX_BAUD_TBL_DEFINED 1
148 #endif // CYGNUM_HAL_ARM_LPC2XXX_CAN_CLK == 48000000
150 #if CYGNUM_HAL_ARM_LPC2XXX_CAN_CLK == 24000000
152 // Table with register values for baudrates at peripheral clock of 24 MHz
154 static const cyg_uint32 lpc2xxx_br_tbl[] =
156 CAN_BR_TBL_ENTRY( 0, 0, 0, 0, 0), // 10 kbaud - not supported
157 CAN_BR_TBL_ENTRY(59, 15, 2, 0, 1), // 20 kbaud
158 CAN_BR_TBL_ENTRY(29, 12, 1, 0, 1), // 50 kbaud
159 CAN_BR_TBL_ENTRY(14, 12, 1, 0, 1), // 100 kbaud
160 CAN_BR_TBL_ENTRY(11, 12, 1, 0, 1), // 125 kbaud
161 CAN_BR_TBL_ENTRY( 5, 12, 1, 0, 1), // 250 kbaud
162 CAN_BR_TBL_ENTRY( 2, 12, 1, 0, 0), // 500 kbaud
163 CAN_BR_TBL_ENTRY( 1, 11, 1, 0, 0), // 800 kbaud
164 CAN_BR_TBL_ENTRY( 1, 5, 0, 0, 0), // 1000 kbaud
165 CAN_BR_TBL_ENTRY( 0, 0, 0, 0, 0), // Autobaud - not supported
167 #define HAL_LPC2XXX_BAUD_TBL_DEFINED 1
168 #endif // CYGNUM_HAL_ARM_LPC2XXX_CAN_CLK == 24000000
170 #if CYGNUM_HAL_ARM_LPC2XXX_CAN_CLK == 12000000
172 // Table with register values for baudrates at peripheral clock of 12 MHz
174 static const cyg_uint32 lpc2xxx_br_tbl[] =
176 CAN_BR_TBL_ENTRY(59, 15, 2, 0, 1), // 10 kbaud - not supported
177 CAN_BR_TBL_ENTRY(39, 11, 1, 0, 1), // 20 kbaud
178 CAN_BR_TBL_ENTRY(14, 12, 1, 0, 1), // 50 kbaud
179 CAN_BR_TBL_ENTRY( 7, 11, 1, 0, 1), // 100 kbaud
180 CAN_BR_TBL_ENTRY( 5, 12, 1, 0, 1), // 125 kbaud
181 CAN_BR_TBL_ENTRY( 2, 12, 1, 0, 1), // 250 kbaud
182 CAN_BR_TBL_ENTRY( 2, 05, 0, 0, 0), // 500 kbaud
183 CAN_BR_TBL_ENTRY( 0, 11, 1, 0, 0), // 800 kbaud
184 CAN_BR_TBL_ENTRY( 0, 9, 0, 0, 0), // 1000 kbaud
185 CAN_BR_TBL_ENTRY( 0, 0, 0, 0, 0), // Autobaud - not supported
187 #define HAL_LPC2XXX_BAUD_TBL_DEFINED 1
188 #endif // CYGNUM_HAL_ARM_LPC2XXX_CAN_CLK == 12000000
191 //==========================================================================
193 //==========================================================================
195 // Macro fills baudrate register value depending on selected baudrate
196 // For several LPC2XXX peripheral clock speeds we provide a pre calculated
197 // baudrate table. If the board uses another clock speed, then the platform
198 // HAL needs to provide an own HAL_LPC2XXX_GET_CAN_BR() macro that returns
199 // valid baudrate register values or it needs to patch this file with
200 // an additional table for the desired clock speed
203 // If a certain baudrate is not supported, then this macro shall return
204 // 0 as the baudrate register value
206 #ifdef HAL_LPC2XXX_BAUD_TBL_DEFINED
207 #define HAL_LPC2XXX_GET_CAN_BR(_baudrate_, _br_) \
209 _br_ = lpc2xxx_br_tbl[(_baudrate_) - CYGNUM_CAN_KBAUD_10]; \
211 #endif // HAL_LPC2XXX_BAUD_TBL_DEFINED
213 //-------------------------------------------------------------------------
214 #endif // #ifndef CYGONCE_CAN_LPC2XXX_BAUDRATES_H