1 //==========================================================================
5 // IXDP425 ethernet I/O definitions.
7 //==========================================================================
8 //####ECOSGPLCOPYRIGHTBEGIN####
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40 //==========================================================================
41 //#####DESCRIPTIONBEGIN####
44 // Contributors:msalter
46 // Purpose: ixdp425 ethernet definitions
47 //####DESCRIPTIONEND####
48 //==========================================================================
50 #include <cyg/hal/hal_intr.h> // CYGNUM_HAL_INTERRUPT_ETHERNET
51 #include <cyg/hal/hal_cache.h> // HAL_DCACHE_LINE_SIZE
52 #include <cyg/hal/plf_io.h> // CYGARC_UNCACHED_ADDRESS
54 // Bus hardware takes care of IO endianess issues.
55 #define CYGHWR_DEVS_ETH_INTEL_I82559_ENDIAN_NEUTRAL_IO 1
57 // NB: Bus masters can only get to first 64MB SDRAM
58 #define CYGHWR_INTEL_I82559_PCI_VIRT_TO_BUS( _x_ ) \
59 ((cyg_uint32)CYGARC_VIRT_TO_BUS(_x_))
61 #define MAX_PACKET_SIZE 1536
62 #define SIZEOF_DESCRIPTOR 16
63 #define MISC_MEM 1128 // selftest, ioctl and statistics
65 #define CYGHWR_INTEL_I82559_PCI_MEM_MAP_SIZE \
66 (((MAX_PACKET_SIZE + SIZEOF_DESCRIPTOR) * \
67 (CYGNUM_DEVS_ETH_INTEL_I82559_MAX_TX_DESCRIPTORS + \
68 CYGNUM_DEVS_ETH_INTEL_I82559_MAX_RX_DESCRIPTORS)) + \
69 MISC_MEM)*CYGNUM_DEVS_ETH_INTEL_I82559_DEV_COUNT
71 // The PCI Window is 64MB starting at 0x00000000, so as long as the bss
72 // section is within addresses 0x00000000-0x04000000, pci_mem_buffer[] will be
73 // in the true PCI Window. Because pci_mem_buffer[] is in the bss section,
74 // wanted its size to be only as large as required so as to not waste memory.
75 // Therefore, had to compute it's size in this file and not in the memory
76 // layout files. So no __pci_window label was ever defined, therefore,
77 // CYGMEM_SECTION_pci_window does not exist. Define CYGMEM_SECTION_pci_window
78 // here in order to satisfy the ASSERT within if_i82559.c.
79 static char pci_mem_buffer[CYGHWR_INTEL_I82559_PCI_MEM_MAP_SIZE
80 + HAL_DCACHE_LINE_SIZE];
82 #define CYGMEM_SECTION_pci_window (((unsigned)pci_mem_buffer \
83 + HAL_DCACHE_LINE_SIZE - 1) \
84 & ~(HAL_DCACHE_LINE_SIZE - 1))
86 #define CYGHWR_INTEL_I82559_PCI_MEM_MAP_BASE \
87 (CYGARC_UNCACHED_ADDRESS(CYGMEM_SECTION_pci_window))
90 #ifdef CYGPKG_DEVS_ETH_ARM_IXDP425_I82559_ETH0
92 static I82559 i82559_eth0_priv_data = {
94 #if defined(CYGPKG_REDBOOT) && defined(CYGVAR_DEVS_ETH_I82559_ETH_REDBOOT_HOLDS_ESA_ETH0)
95 mac_address: CYGDAT_DEVS_ETH_ARM_IXDP425_ETH0_DEFAULT_ESA
99 ETH_DRV_SC(i82559_sc0,
100 &i82559_eth0_priv_data, // Driver specific data
101 CYGDAT_DEVS_ETH_ARM_IXDP425_I82559_ETH0_NAME, // Name for device
113 NETDEVTAB_ENTRY(i82559_netdev0,
114 "i82559_" CYGDAT_DEVS_ETH_ARM_IXDP425_I82559_ETH0_NAME,
117 #endif // CYGPKG_DEVS_ETH_ARM_IXP425_I82559_ETH0
120 // These arrays are used for sanity checking of pointers
122 i82559_priv_array[CYGNUM_DEVS_ETH_INTEL_I82559_DEV_COUNT] = {
123 #ifdef CYGPKG_DEVS_ETH_ARM_IXDP425_I82559_ETH0
124 &i82559_eth0_priv_data,
128 #ifdef CYGDBG_USE_ASSERTS
129 // These are only used when assertions are enabled
130 cyg_netdevtab_entry_t *
131 i82559_netdev_array[CYGNUM_DEVS_ETH_INTEL_I82559_DEV_COUNT] = {
132 #ifdef CYGPKG_DEVS_ETH_ARM_IXDP425_I82559_ETH0
138 i82559_sc_array[CYGNUM_DEVS_ETH_INTEL_I82559_DEV_COUNT] = {
139 #ifdef CYGPKG_DEVS_ETH_ARM_IXDP425_I82559_ETH0
143 #endif // CYGDBG_USE_ASSERTS
145 // --------------------------------------------------------------
146 // RedBoot configuration options for managing ESAs for us
148 // Decide whether to have redboot config vars for it...
149 #ifdef CYGPKG_REDBOOT
150 #include <pkgconf/redboot.h>
151 #ifdef CYGSEM_REDBOOT_FLASH_CONFIG
152 #ifdef CYGPKG_REDBOOT_NETWORKING
154 #include <flash_config.h>
156 #ifdef CYGVAR_DEVS_ETH_I82559_ETH_REDBOOT_HOLDS_ESA_ETH0
157 RedBoot_config_option("Network hardware address [MAC] for eth0",
159 ALWAYS_ENABLED, true,
160 CONFIG_ESA, i82559_eth0_priv_data.mac_address
164 #endif // CYGPKG_REDBOOT_NETWORKING
165 #endif // CYGSEM_REDBOOT_FLASH_CONFIG
166 #endif // CYGPKG_REDBOOT
168 // and initialization code to read them
169 // - independent of whether we are building RedBoot right now:
170 #ifdef CYGPKG_DEVS_ETH_I82559_ETH_REDBOOT_HOLDS_ESA
172 #include <cyg/hal/hal_if.h>
175 #define CONFIG_ESA (6)
178 #define CYGHWR_DEVS_ETH_INTEL_I82559_GET_ESA( p_i82559, mac_address, ok ) \
181 if ( 0 == p_i82559->index ) \
182 ok = CYGACC_CALL_IF_FLASH_CFG_OP( CYGNUM_CALL_IF_FLASH_CFG_GET, \
183 "eth0_esa", mac_address, CONFIG_ESA); \
184 else if ( 1 == p_i82559->index ) \
185 ok = CYGACC_CALL_IF_FLASH_CFG_OP( CYGNUM_CALL_IF_FLASH_CFG_GET, \
186 "eth1_esa", mac_address, CONFIG_ESA); \
189 #endif // CYGPKG_DEVS_ETH_I82559_ETH_REDBOOT_HOLDS_ESA