packages/devs/flash/arm/mxc/v2_0/include/mxc_ata.h

   1 #ifndef _IMX_ATA_H_
   2 #define _IMX_ATA_H_
   3 //==========================================================================
   4 //
   5 //      mxc_ata.h
   6 //
   7 //   Support ATA on Freescale MXC platforms
   8 //
   9 //==========================================================================
  10 //####ECOSGPLCOPYRIGHTBEGIN####
  11 // -------------------------------------------
  12 // This file is part of eCos, the Embedded Configurable Operating System.
  13 // Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
  14 //
  15 // eCos is free software; you can redistribute it and/or modify it under
  16 // the terms of the GNU General Public License as published by the Free
  17 // Software Foundation; either version 2 or (at your option) any later version.
  18 //
  19 // eCos is distributed in the hope that it will be useful, but WITHOUT ANY
  20 // WARRANTY; without even the implied warranty of MERCHANTABILITY or
  21 // FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  22 // for more details.
  23 //
  24 // You should have received a copy of the GNU General Public License along
  25 // with eCos; if not, write to the Free Software Foundation, Inc.,
  26 // 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
  27 //
  28 // As a special exception, if other files instantiate templates or use macros
  29 // or inline functions from this file, or you compile this file and link it
  30 // with other works to produce a work based on this file, this file does not
  31 // by itself cause the resulting work to be covered by the GNU General Public
  32 // License. However the source code for this file must still be made available
  33 // in accordance with section (3) of the GNU General Public License.
  34 //
  35 // This exception does not invalidate any other reasons why a work based on
  36 // this file might be covered by the GNU General Public License.
  37 //
  38 // Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
  39 // at http://sources.redhat.com/ecos/ecos-license/
  40 // -------------------------------------------
  41 //####ECOSGPLCOPYRIGHTEND####
  42 //==========================================================================
  43 //#####DESCRIPTIONBEGIN####
  44 //
  45 // Author(s):    Mahesh Mahadevan <mahesh.mahadevan@freescale.com>
  46 // Contributors: Mahesh Mahadevan <mahesh.mahadevan@freescale.com>
  47 // Date:         2008-11-18
  48 //
  49 //==========================================================================
  50 #define FSL_ATA_TIMING_REGS                             0x00
  51 #define FSL_ATA_FIFO_FILL                                   0x20
  52 #define FSL_ATA_CONTROL                                     0x24
  53 #define FSL_ATA_INT_PEND                                   0x28
  54 #define FSL_ATA_INT_EN                                       0x2C
  55 #define FSL_ATA_INT_CLEAR                                 0x30
  56 #define FSL_ATA_FIFO_ALARM                              0x34
  57 #define FSL_ATA_ADMA_ERROR_STATUS               0x38
  58 #define FSL_ATA_SYS_DMA_BADDR                       0x3C
  59 #define FSL_ATA_ADMA_SYS_ADDR                       0x40
  60 #define FSL_ATA_BLOCK_COUNT                            0x48
  61 #define FSL_ATA_BURST_LENGTH                          0x4C
  62 #define FSL_ATA_SECTOR_SIZE                             0x50
  63 #define FSL_ATA_DRIVE_DATA                              0xA0
  64 #define FSL_ATA_DFTR                                          0xA4
  65 #define FSL_ATA_DSCR                                          0xA8
  66 #define FSL_ATA_DSNR                                          0xAC
  67 #define FSL_ATA_DCLR                                           0xB0
  68 #define FSL_ATA_DCHR                                          0xB4
  69 #define FSL_ATA_DDHR                                          0xB8
  70 #define FSL_ATA_DCDR                                          0xBC
  71 #define FSL_ATA_DRIVE_CONTROL                         0xD8
  72
  73 /* bits within FSL_ATA_CONTROL */
  74 #define FSL_ATA_CTRL_DMA_SRST                         0x1000
  75 #define FSL_ATA_CTRL_DMA_64ADMA                    0x800
  76 #define FSL_ATA_CTRL_DMA_32ADMA                    0x400
  77 #define FSL_ATA_CTRL_DMA_STAT_STOP               0x200
  78 #define FSL_ATA_CTRL_DMA_ENABLE                     0x100
  79 #define FSL_ATA_CTRL_FIFO_RST_B                       0x80
  80 #define FSL_ATA_CTRL_ATA_RST_B                        0x40
  81 #define FSL_ATA_CTRL_FIFO_TX_EN                      0x20
  82 #define FSL_ATA_CTRL_FIFO_RCV_EN                    0x10
  83 #define FSL_ATA_CTRL_DMA_PENDING                   0x08
  84 #define FSL_ATA_CTRL_DMA_ULTRA                       0x04
  85 #define FSL_ATA_CTRL_DMA_WRITE                       0x02
  86 #define FSL_ATA_CTRL_IORDY_EN                          0x01
  87
  88 /* bits within the interrupt control registers */
  89 #define FSL_ATA_INTR_ATA_INTRQ1                      0x80
  90 #define FSL_ATA_INTR_FIFO_UNDERFLOW             0x40
  91 #define FSL_ATA_INTR_FIFO_OVERFLOW               0x20
  92 #define FSL_ATA_INTR_CTRL_IDLE                         0x10
  93 #define FSL_ATA_INTR_ATA_INTRQ2                      0x08
  94 #define FSL_ATA_INTR_DMA_ERR                           0x04
  95 #define FSL_ATA_INTR_DMA_TRANS_OVER            0x02
  96
  97 /* ADMA Addr Descriptor Attribute Filed */
  98 #define FSL_ADMA_DES_ATTR_VALID                     0x01
  99 #define FSL_ADMA_DES_ATTR_END                        0x02
 100 #define FSL_ADMA_DES_ATTR_INT                         0x04
 101 #define FSL_ADMA_DES_ATTR_SET                         0x10
 102 #define FSL_ADMA_DES_ATTR_TRAN                      0x20
 103 #define FSL_ADMA_DES_ATTR_LINK                       0x30
 104
 105 #define PIO_XFER_MODE_0                                     0
 106 #define PIO_XFER_MODE_1                                     1
 107 #define PIO_XFER_MODE_2                                     2
 108 #define PIO_XFER_MODE_3                                     3
 109 #define PIO_XFER_MODE_4                                     4
 110
 111 #define ATA_ID_PROD                                             27
 112 #define ATA_ID_PROD_LEN                                     40
 113
 114 #define ATA_BUSY                                                   (1 << 7)
 115 #define ATA_DRQ                                                     (1 << 3)
 116 #define ATA_ERR                                                     (1)
 117
 118 #define ATA_IEN                                                     (1 << 1)
 119 #define ATA_SRST                                                   (1 << 2)
 120
 121 #define ATA_CMD_READ                                          0x20
 122 #define ATA_CMD_WRITE                                        0x30
 123 #define ATA_CMD_READ_MULTI                              0xC4
 124 #define ATA_CMD_WRITE_MULTI                            0xC5
 125 #define ATA_CMD_ID_ATA                                      0xEC
 126 #define ATA_CMD_SET_FEATURES                          0xEF
 127
 128 #define ATA_SECTOR_SIZE                                     512
 129 #define MAX_NUMBER_OF_SECTORS                       256
 130 #endif // _IMX_ATA_H_