packages/devs/flash/arm/mxc/v2_0/include/mxc_nfc_v3.h

   1 #ifndef _MXC_NFC_V3_H_
   2 #define _MXC_NFC_V3_H_
   3 //==========================================================================
   4 //
   5 //      mxc_nfc_v3.h
   6 //
   7 //      Flash programming to support NAND flash on Freescale MXC platforms
   8 //
   9 //==========================================================================
  10 //####ECOSGPLCOPYRIGHTBEGIN####
  11 // -------------------------------------------
  12 // This file is part of eCos, the Embedded Configurable Operating System.
  13 // Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
  14 //
  15 // eCos is free software; you can redistribute it and/or modify it under
  16 // the terms of the GNU General Public License as published by the Free
  17 // Software Foundation; either version 2 or (at your option) any later version.
  18 //
  19 // eCos is distributed in the hope that it will be useful, but WITHOUT ANY
  20 // WARRANTY; without even the implied warranty of MERCHANTABILITY or
  21 // FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  22 // for more details.
  23 //
  24 // You should have received a copy of the GNU General Public License along
  25 // with eCos; if not, write to the Free Software Foundation, Inc.,
  26 // 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
  27 //
  28 // As a special exception, if other files instantiate templates or use macros
  29 // or inline functions from this file, or you compile this file and link it
  30 // with other works to produce a work based on this file, this file does not
  31 // by itself cause the resulting work to be covered by the GNU General Public
  32 // License. However the source code for this file must still be made available
  33 // in accordance with section (3) of the GNU General Public License.
  34 //
  35 // This exception does not invalidate any other reasons why a work based on
  36 // this file might be covered by the GNU General Public License.
  37 //
  38 // Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
  39 // at http://sources.redhat.com/ecos/ecos-license/
  40 // -------------------------------------------
  41 //####ECOSGPLCOPYRIGHTEND####
  42 //==========================================================================
  43 //#####DESCRIPTIONBEGIN####
  44 //
  45 // Author(s):    Kevin Zhang <k.zhang@freescale.com>
  46 // Contributors: Kevin Zhang <k.zhang@freescale.com>
  47 // Date:         2008-06-02
  48 // Purpose:
  49 // Description:
  50 //
  51 //####DESCRIPTIONEND####
  52 //
  53 //==========================================================================
  54
  55 #include <pkgconf/devs_flash_onmxc.h>
  56 #include "mxc_nand_specifics.h"
  57
  58 #define PG_2K_DATA_OP_MULTI_CYCLES()    false
  59 #define ADDR_INPUT_SIZE                                 8
  60
  61 #define NAND_MAIN_BUF0                                  (NFC_BASE + 0x000)
  62 #define NAND_MAIN_BUF1                                  (NFC_BASE + 0x200)
  63 #define NAND_MAIN_BUF2                                  (NFC_BASE + 0x400)
  64 #define NAND_MAIN_BUF3                                  (NFC_BASE + 0x600)
  65 #define NAND_MAIN_BUF4                                  (NFC_BASE + 0x800)
  66 #define NAND_MAIN_BUF5                                  (NFC_BASE + 0xA00)
  67 #define NAND_MAIN_BUF6                                  (NFC_BASE + 0xC00)
  68 #define NAND_MAIN_BUF7                                  (NFC_BASE + 0xE00)
  69 #define NAND_SPAR_BUF0                                  (NFC_BASE + 0x1000)
  70 #define NAND_SPAR_BUF1                                  (NFC_BASE + 0x1040)
  71 #define NAND_SPAR_BUF2                                  (NFC_BASE + 0x1080)
  72 #define NAND_SPAR_BUF3                                  (NFC_BASE + 0x10C0)
  73 #define NAND_SPAR_BUF4                                  (NFC_BASE + 0x1100)
  74 #define NAND_SPAR_BUF5                                  (NFC_BASE + 0x1140)
  75 #define NAND_SPAR_BUF6                                  (NFC_BASE + 0x1180)
  76 #define NAND_SPAR_BUF7                                  (NFC_BASE + 0x11C0)
  77
  78 // The following defines are not used. Just for compilation purpose
  79 #define ECC_STATUS_RESULT_REG                   0xDEADFFFF
  80 #define NFC_DATA_INPUT(buf_no, earea, en)
  81 #define NFC_DATA_INPUT_2k(buf_no)
  82 // dummy function as it is not needed for automatic operations
  83 #define NFC_ADDR_INPUT(addr)
  84 #define NFC_ARCH_INIT()
  85 #define NUM_OF_CS_LINES                                    8
  86 #define NFC_BUFSIZE                                             4096
  87 #define NFC_SPARE_BUF_SZ                                  64
  88
  89 enum nfc_internal_buf {
  90         RAM_BUF_0 = 0x0 << 4,
  91         RAM_BUF_1 = 0x1 << 4,
  92         RAM_BUF_2 = 0x2 << 4,
  93         RAM_BUF_3 = 0x3 << 4,
  94         RAM_BUF_4 = 0x4 << 4,
  95         RAM_BUF_5 = 0x5 << 4,
  96         RAM_BUF_6 = 0x6 << 4,
  97         RAM_BUF_7 = 0x7 << 4,
  98 };
  99
 100 enum nfc_output_mode {
 101         FDO_PAGE_SPARE          = 0x0008,
 102         FDO_SPARE_ONLY          = 0x1008,  // LSB has to be 0x08
 103         FDO_FLASH_ID            = 0x0010,
 104         FDO_FLASH_STATUS        = 0x0020,
 105 };
 106
 107 #define MAX_LOOPS 10000
 108 #define wait_for_auto_prog_done()                                                                               \
 109         CYG_MACRO_START                                                                                                         \
 110         int loops = MAX_LOOPS;                                                                                          \
 111         static int max_loops = MAX_LOOPS;                                                                       \
 112                                                                                                                                                 \
 113         while ((nfc_reg_read(NFC_IPC_REG) & NFC_IPC_AUTO_DONE) == 0) {          \
 114                 HAL_DELAY_US(10);                                                                                               \
 115                 if (loops-- < 0) {                                                                                              \
 116                         diag_printf("%s: Timeout waiting for prog done\n",                      \
 117                                                 __func__);                                                                              \
 118                         break;                                                                                                          \
 119                 }                                                                                                                               \
 120         }                                                                                                                                       \
 121         if (MAX_LOOPS - loops < max_loops) {                                                            \
 122                 diag_printf1("%s: auto_prog done after %u loops\n",                             \
 123                                         __FUNCTION__, MAX_LOOPS - loops);                                       \
 124                 max_loops = MAX_LOOPS - loops;                                                                  \
 125         }                                                                                                                                       \
 126         nfc_reg_write((nfc_reg_read(NFC_IPC_REG) & ~NFC_IPC_AUTO_DONE),         \
 127                                 NFC_IPC_REG);                                                                                   \
 128         CYG_MACRO_END
 129
 130 // Polls the NANDFC to wait for an operation to complete
 131 #define wait_op_done()                                                                                                  \
 132         CYG_MACRO_START                                                                                                         \
 133         int loops = MAX_LOOPS;                                                                                          \
 134         static int max_loops = MAX_LOOPS;                                                                       \
 135                                                                                                                                                 \
 136         while ((nfc_reg_read(NFC_IPC_REG) & NFC_IPC_INT) == 0) {                        \
 137                 HAL_DELAY_US(10);                                                                                               \
 138                 if (loops-- < 0) {                                                                                              \
 139                         diag_printf("%s: Timeout waiting for NFC ready\n",                      \
 140                                                 __func__);                                                                              \
 141                         break;                                                                                                          \
 142                 }                                                                                                                               \
 143         }                                                                                                                                       \
 144         if (MAX_LOOPS - loops < max_loops) {                                                            \
 145                 diag_printf1("%s: NFC ready after %u loops\n",                                  \
 146                                         __FUNCTION__, MAX_LOOPS - loops);                                       \
 147                 max_loops = MAX_LOOPS - loops;                                                                  \
 148         }                                                                                                                                       \
 149         nfc_reg_write(0, NFC_IPC_REG);                                                                          \
 150         CYG_MACRO_END
 151
 152 #if 0
 153 #define nfc_reg_read(r)                 readl(r)
 154 #define nfc_reg_write(v, r)             writel(v, r)
 155 #else
 156 #define nfc_reg_read(r)                 __nfc_reg_read(r, #r, __func__, __LINE__)
 157 #define nfc_reg_write(v, r)             __nfc_reg_write(v, r, #r, __func__, __LINE__)
 158
 159 static inline u32 __nfc_reg_read(unsigned long reg, const char *reg_name,
 160                                                                 const char *fn, int ln)
 161 {
 162         u32 val;
 163
 164         val = readl(reg);
 165         if (g_nfc_debug_level >= NFC_DEBUG_MAX)
 166                 diag_printf("%s@%d: Read %08x from %s[%08lx]\n", fn, ln, val, reg_name, reg);
 167         return val;
 168 }
 169
 170 static inline void __nfc_reg_write(u32 val, unsigned long reg,
 171                                                                 const char *reg_name, const char *fn, int ln)
 172 {
 173         if (g_nfc_debug_level >= NFC_DEBUG_MAX)
 174                 diag_printf("%s@%d: Writing %08x to %s[%08lx]\n", fn, ln, val, reg_name, reg);
 175         writel(val, reg);
 176 }
 177 #endif
 178
 179 static void write_nfc_ip_reg(u32 val, u32 reg)
 180 {
 181         unsigned int ipc = nfc_reg_read(NFC_IPC_REG);
 182         int loops = MAX_LOOPS;
 183         static int max_loops = MAX_LOOPS;
 184
 185         if (ipc & NFC_IPC_CACK) {
 186                 diag_printf("%s: IPC ACK already set!\n", __FUNCTION__);
 187         } else {
 188                 nfc_reg_write(NFC_IPC_CREQ, NFC_IPC_REG);
 189         }
 190
 191         while ((nfc_reg_read(NFC_IPC_REG) & NFC_IPC_CACK) == 0) {
 192                 HAL_DELAY_US(1);
 193                 if (loops-- < 0) {
 194                         diag_printf("%s: Timeout waiting for IPC ready\n", __FUNCTION__);
 195                         return;
 196                 }
 197         }
 198         if (MAX_LOOPS - loops < max_loops) {
 199                 diag_printf1("%s: NFC ready after %u loops\n",
 200                                         __FUNCTION__, MAX_LOOPS - loops);
 201                 max_loops = MAX_LOOPS - loops;
 202         }
 203         nfc_reg_write(val, reg);
 204         nfc_reg_write((nfc_reg_read(NFC_IPC_REG) & ~NFC_IPC_CREQ), NFC_IPC_REG);
 205 }
 206
 207 /*!
 208  * NAND flash data output operation (reading data from NAND flash)
 209  * @param buf_no    internal ram buffer number that will contain data
 210  *                  to be outputted from the NAND flash after operation done
 211  * @param mode      one of the mode defined in enum nfc_output_mode
 212  * @param ecc_en    1 - ecc enabled; 0 - ecc disabled
 213  */
 214 static void NFC_DATA_OUTPUT(enum nfc_internal_buf buf_no, enum nfc_output_mode mode,
 215                                                         int ecc_en)
 216 {
 217         u32 v = nfc_reg_read(NFC_FLASH_CONFIG2_REG);
 218
 219         if ((v & NFC_FLASH_CONFIG2_ECC_EN) != 0 && ecc_en == 0) {
 220                 write_nfc_ip_reg(v & ~NFC_FLASH_CONFIG2_ECC_EN, NFC_FLASH_CONFIG2_REG);
 221         }
 222         if ((v & NFC_FLASH_CONFIG2_ECC_EN) == 0 && ecc_en != 0) {
 223                 write_nfc_ip_reg(v | NFC_FLASH_CONFIG2_ECC_EN, NFC_FLASH_CONFIG2_REG);
 224         }
 225
 226         v = nfc_reg_read(NAND_CONFIGURATION1_REG);
 227
 228         if (mode == FDO_SPARE_ONLY) {
 229                 v = (v & ~0x71) | buf_no | NAND_CONFIGURATION1_SP_EN;
 230         } else {
 231                 v = (v & ~0x71) | buf_no;
 232         }
 233
 234         nfc_reg_write(v, NAND_CONFIGURATION1_REG);
 235
 236         nfc_reg_write(mode & 0xFF, NAND_LAUNCH_REG);
 237         wait_op_done();
 238 }
 239
 240 static void NFC_CMD_INPUT(u32 cmd)
 241 {
 242         nfc_reg_write(cmd & 0xFFFF, NAND_CMD_REG);
 243         nfc_reg_write(NAND_LAUNCH_FCMD, NAND_LAUNCH_REG);
 244         wait_op_done();
 245 }
 246
 247 static void NFC_SET_NFC_ACTIVE_CS(u32 cs_line)
 248 {
 249         u32 v;
 250
 251         v = nfc_reg_read(NAND_CONFIGURATION1_REG) & ~0x7071;
 252         v |= (cs_line << 12);
 253         nfc_reg_write(v, NAND_CONFIGURATION1_REG);
 254 }
 255
 256 static inline u16 NFC_STATUS_READ(void)
 257 {
 258         u16 val = nfc_reg_read(NAND_STATUS_SUM_REG);
 259
 260         if (val != 0) {
 261                 diag_printf("NFC STATUS: %04x\n", val);
 262         }
 263         return val;
 264 }
 265
 266 /* This function uses a global variable for the page size. It shouldn't be a big
 267  * problem since we don't expect mixed page size nand flash parts on the same IC.
 268  * Note for address 0, it will always be correct regardless the page size. So for
 269  * ID read, it doesn't need to have the correct page size global variable first.
 270  */
 271 static void start_nfc_addr_ops(u32 ops, u32 pg_no, u16 pg_off, u32 is_erase, u32 cs_line, u32 num_of_chips)
 272 {
 273         u32 add0, add8, page_number;
 274         int num_of_bits[] = {0, 0, 1, 0, 2, 0, 0, 0, 3, 0, 0, 0, 0, 0, 0, 0, 4};
 275
 276         if (ops == FLASH_Read_ID) {
 277                 // issue addr cycle
 278                 nfc_reg_write(0x0, NAND_ADD0_REG + (4 * cs_line));
 279                 nfc_reg_write(NAND_LAUNCH_FADD, NAND_LAUNCH_REG);
 280                 wait_op_done();
 281                 return;
 282         }
 283
 284         if (num_of_chips >  1) {
 285                 page_number = (pg_no << num_of_bits[num_of_chips]) | (cs_line & (num_of_chips - 1));
 286         } else {
 287                 page_number = pg_no;
 288         }
 289         if (is_erase) {
 290                 add0 = page_number;
 291                 add8 = 0;
 292         } else {
 293                 // for both read and write
 294                 if (g_is_2k_page || g_is_4k_page) {
 295                         // the first two addr cycles are for column addr. Page number starts
 296                         // from the 3rd addr cycle.
 297                         add0 = pg_off | (page_number << 16);
 298                         add8 = page_number >> 16;
 299                 } else {
 300                         // For 512B page, the first addr cycle is for column addr. Page number
 301                         // starts from the 2nd addr cycle.
 302                         add0 = (pg_off & 0xFF) | (page_number << 8);
 303                         add8 = page_number >> 24;
 304                 }
 305         }
 306         nfc_reg_write(add0, NAND_ADD0_REG);
 307         nfc_reg_write(add8, NAND_ADD8_REG);
 308 }
 309
 310 /*!
 311  * The NFC has to be preset before performing any operation
 312  */
 313 static void NFC_PRESET(u32 max_block_count)
 314 {
 315         // not needed. It is done in plf_hardware_init()
 316 }
 317 #endif // _MXC_NFC_V3_H_