packages/devs/flash/arm/mxc/v2_0/src/mxc_nfc.c

   1 //==========================================================================
   2 //
   3 //              mxc_nfc.c
   4 //
   5 //              Flash programming to support NAND flash on Freescale MXC platforms
   6 //
   7 //==========================================================================
   8 //####ECOSGPLCOPYRIGHTBEGIN####
   9 // -------------------------------------------
  10 // This file is part of eCos, the Embedded Configurable Operating System.
  11 // Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
  12 //
  13 // eCos is free software; you can redistribute it and/or modify it under
  14 // the terms of the GNU General Public License as published by the Free
  15 // Software Foundation; either version 2 or (at your option) any later version.
  16 //
  17 // eCos is distributed in the hope that it will be useful, but WITHOUT ANY
  18 // WARRANTY; without even the implied warranty of MERCHANTABILITY or
  19 // FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  20 // for more details.
  21 //
  22 // You should have received a copy of the GNU General Public License along
  23 // with eCos; if not, write to the Free Software Foundation, Inc.,
  24 // 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
  25 //
  26 // As a special exception, if other files instantiate templates or use macros
  27 // or inline functions from this file, or you compile this file and link it
  28 // with other works to produce a work based on this file, this file does not
  29 // by itself cause the resulting work to be covered by the GNU General Public
  30 // License. However the source code for this file must still be made available
  31 // in accordance with section (3) of the GNU General Public License.
  32 //
  33 // This exception does not invalidate any other reasons why a work based on
  34 // this file might be covered by the GNU General Public License.
  35 //
  36 // Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
  37 // at http://sources.redhat.com/ecos/ecos-license/
  38 // -------------------------------------------
  39 //####ECOSGPLCOPYRIGHTEND####
  40 //==========================================================================
  41 //#####DESCRIPTIONBEGIN####
  42 //
  43 // Author(s):    Kevin Zhang <k.zhang@freescale.com>
  44 // Contributors: Kevin Zhang <k.zhang@freescale.com>
  45 // Date:                 2006-01-23 Initial version
  46 // Date:                 2007-12-20 Update to support 4K page and bbt management.
  47 // Purpose:
  48 // Description:
  49 //       -- Add bad block management according to Linux NAND MTD implementation.
  50 //              Reference linux/drivers/mtd/nand/nand_bbt.c by Thomas Gleixner
  51 //              Summary:
  52 //                 1. Last 4 blocks are reserved for one main BBT and one
  53 //                        mirror BBT (2 spare ones just in case a block turns bad.)
  54 //                 2. The main BBT block's spare area starts with "Bbt0" followed
  55 //                        by a version number starting from 1.
  56 //                 3. The mirror BBT block's spare area starts with "1tbB" followed
  57 //                        by a version number also starting from 1.
  58 //                 4. The actual main area, starting from first page in the BBT block,
  59 //                        is used to indicate if a block is bad or not through 2bit/block:
  60 //                              * The table uses 2 bits per block
  61 //                              * 11b:  block is good
  62 //                              * 00b:  block is factory marked bad
  63 //                              * 01b:  block is marked bad due to wear
  64 //                              * 10b:  block is marked reserved (for BBT)
  65 //              Redboot operations: During boot, it searches for the marker for
  66 //                                                      either main BBT or mirror BBT based on the marker:
  67 //                 case 1: Neither table is found:
  68 //                                 Do the bad block scan of the whole flash with ECC off. Use
  69 //                                 manufactor marked BI field to decide if a block is bad and
  70 //                                 then build the BBT in RAM. Then write this table to both
  71 //                                 main BBT block and mirror BBT block.
  72 //                 case 2: Only one table is found:
  73 //                                 Load the BBT from the flash and stored in the RAM.
  74 //                                 Then build the 2nd BBT in the flash.
  75 //                 case 3: If both tables found, load the one with higher version in the
  76 //                                 RAM and then update the block with older BBT info with the
  77 //                                 newer one. If same version, just then read out the table in
  78 //                                 RAM.
  79 //
  80 //####DESCRIPTIONEND####
  81 //
  82 //==========================================================================
  83
  84 #include <pkgconf/hal.h>
  85 #include <cyg/hal/hal_arch.h>
  86 #include <cyg/hal/hal_cache.h>
  87 #include <cyg/io/nand_bbt.h>
  88 #include <redboot.h>
  89 #include <stdlib.h>
  90
  91 #include CYGHWR_MEMORY_LAYOUT_H
  92
  93 #include <cyg/hal/hal_io.h>
  94 #define  _FLASH_PRIVATE_
  95 #include <cyg/io/flash.h>
  96
  97 #include CYGHWR_FLASH_NAND_BBT_HEADER
  98
  99 #include <cyg/io/imx_nfc.h>
 100
 101 #define ECC_FORCE_ON    1
 102 #define ECC_FORCE_OFF   2
 103
 104 typedef u64 flash_addr_t;
 105
 106 enum blk_bad_type
 107 {
 108         BLK_GOOD = 0,
 109         BLK_BAD_RUNTIME = 1,
 110         BLK_RESERVED = 2,
 111         BLK_BAD_FACTORY = 3,
 112 };
 113
 114 #define diag_printf1(fmt...) CYG_MACRO_START                                            \
 115                 if (g_nfc_debug_level >= NFC_DEBUG_MIN) diag_printf(fmt);       \
 116 CYG_MACRO_END
 117
 118 #define MXC_UNLOCK_BLK_END              0xFFFF
 119
 120 extern unsigned int hal_timer_count(void);
 121 int nfc_program_region(flash_addr_t addr, u8 *buf, u32 len);
 122 int nfc_erase_region(flash_addr_t addr, u32 len, bool skip_bad, bool verbose);
 123
 124 static int nfc_write_pg_random(u32 pg_no, u32 pg_off, u8 *buf, u32 ecc_force);
 125 static int nfc_read_pg_random(u32 pg_no, u32 pg_off, u32 ecc_force, u32 cs_line,
 126                                                           u32 num_of_nand_chips);
 127 static int nfc_erase_blk(u32 ra);
 128 static void print_page(u32 addr, bool spare_only);
 129 static int nfc_read_page(u32 cs_line, u32 pg_no, u32 pg_off);
 130 static int mxc_nfc_scan(bool lowlevel);
 131 static void read_nflash_id(u32 *id, u32 cs_line);
 132 static int nfc_program_blk(u32 ra, u8 *buf, u32 len);
 133
 134 static void print_pkt_16(u16 *pkt, u32 len);
 135
 136 // globals
 137 static int nand_flash_index = -1;
 138 static int g_ecc_enable = true;
 139 static int g_spare_only_read_ok = true;
 140 static int g_nfc_debug_level = NFC_DEBUG_NONE;
 141 static bool g_nfc_debug_measure = false;
 142 static bool g_is_2k_page = false;
 143 static unsigned int g_block_offset;
 144 static bool g_is_4k_page = false;
 145 static unsigned int g_nfc_version = MXC_NFC_V1; // default to version 1.0
 146 static int      num_of_nand_chips = 1;
 147 static int num_of_nand_chips_for_nandsize = 1;
 148 static int scale_block_cnt = 1;
 149
 150 #define nfc_printf(level, args...) CYG_MACRO_START      \
 151                 if (g_nfc_debug_level >= level)                         \
 152                         diag_printf(args);                                              \
 153 CYG_MACRO_END
 154
 155 #if defined(NFC_V2_0) || defined(NFC_V2_1)
 156 #include <cyg/io/mxc_nfc_v2.h>
 157 #elif defined(NFC_V3_0)
 158 #include <cyg/io/mxc_nfc_v3.h>
 159 #else
 160 #include <cyg/io/mxc_nfc.h>
 161 #endif
 162
 163 #ifndef NAND_LAUNCH_REG
 164 #define NAND_LAUNCH_REG                         0xDEADEEEE
 165 #define NAND_CONFIGURATION1_REG         0xDEADEEEE
 166 #define NFC_FLASH_CONFIG2_REG           0xDEADEEEE
 167 #define NFC_FLASH_CONFIG2_ECC_EN        0xDEADEEEE
 168 #define write_nfc_ip_reg(a, b)
 169 #endif
 170
 171 #ifndef MXCFLASH_SELECT_MULTI
 172 void flash_query(void *data)
 173 #else
 174 void nandflash_query(void *data)
 175 #endif
 176 {
 177         u32 id[2];
 178         read_nflash_id(&id[0], 0);
 179         nfc_printf(NFC_DEBUG_MAX, "%s(ID=0x%02x: 0x%02x, 0x%02x, 0x%02x)\n", __FUNCTION__,
 180                            id[0] & 0xff, (id[0] >> 8) & 0xff, (id[0] >> 16) & 0xff, id[0] >> 24);
 181         memcpy(data, id, sizeof(id));
 182 }
 183
 184 #ifndef MXCFLASH_SELECT_MULTI
 185 int flash_program_buf(void *addr, void *data, int len)
 186 #else
 187 int nandflash_program_buf(void *addr, void *data, int len)
 188 #endif
 189 {
 190         nfc_printf(NFC_DEBUG_MAX, "%s(addr=%p, data=%p, len=0x%08x)\n",
 191                            __FUNCTION__, addr, data, len);
 192         return nfc_program_region((u32)addr, data, len);
 193 }
 194
 195 #ifndef MXCFLASH_SELECT_MULTI
 196 int flash_erase_block(void *block, unsigned int size)
 197 #else
 198 int nandflash_erase_block(void *block, unsigned int size)
 199 #endif
 200 {
 201         nfc_printf(NFC_DEBUG_MAX, "%s(block=%p, size=0x%08x)\n",
 202                            __FUNCTION__, block, size);
 203         return nfc_erase_region((u32)block, size, 1, 0);
 204 }
 205
 206 #ifndef MXCFLASH_SELECT_MULTI
 207 bool flash_code_overlaps(void *start, void *end)
 208 #else
 209 bool nandflash_code_overlaps(void *start, void *end)
 210 #endif
 211 {
 212         extern unsigned char _stext[], _etext[];
 213
 214         return ((((unsigned long)&_stext >= (unsigned long)start) &&
 215                          ((unsigned long)&_stext < (unsigned long)end)) ||
 216                         (((unsigned long)&_etext >= (unsigned long)start) &&
 217                          ((unsigned long)&_etext < (unsigned long)end)));
 218 }
 219
 220 #ifndef MXCFLASH_SELECT_MULTI
 221 int flash_hwr_map_error(int e)
 222 #else
 223 int nandflash_hwr_map_error(int e)
 224 #endif
 225 {
 226         return e;
 227 }
 228
 229 #ifndef MXCFLASH_SELECT_MULTI
 230 int flash_lock_block(void *block)
 231 #else
 232 int nandflash_lock_block(void *block)
 233 #endif
 234 {
 235         // Not supported yet
 236         return 0;
 237 }
 238
 239 #ifndef MXCFLASH_SELECT_MULTI
 240 int flash_unlock_block(void *block, int block_size, int blocks)
 241 #else
 242 int nandflash_unlock_block(void *block, int block_size, int blocks)
 243 #endif
 244 {
 245         // Not supported yet
 246         return 0;
 247 }
 248
 249 //----------------------------------------------------------------------------
 250 // Now that device properties are defined, include magic for defining
 251 // accessor type and constants.
 252 #include <cyg/io/flash_dev.h>
 253
 254 // Information about supported devices
 255 typedef struct flash_dev_info {
 256         cyg_uint16       device_id;
 257         cyg_uint16       device_id2;
 258         cyg_uint16       device_id3;
 259         cyg_uint16       device_id4;
 260         cyg_uint16       page_size;
 261         cyg_uint16       spare_size;
 262         cyg_uint32       pages_per_block;
 263         cyg_uint32       block_size;
 264         cyg_int32        block_count;
 265         cyg_uint32       device_size;
 266         cyg_uint32       port_size;             // x8 or x16 IO
 267         cyg_uint32       type;                  // SLC vs MLC
 268         cyg_uint32       options;
 269         cyg_uint32       fis_start_addr;
 270         cyg_uint32       bi_off;
 271         cyg_uint32       bbt_blk_max_nr;
 272         cyg_uint8        vendor_info[96];
 273         cyg_uint32       col_cycle;                // number of column address cycles
 274         cyg_uint32       row_cycle;                // number of row address cycles
 275         cyg_uint32       max_bad_blk;
 276 } flash_dev_info_t;
 277
 278 static const flash_dev_info_t *flash_dev_info;
 279 static const flash_dev_info_t supported_devices[] = {
 280 #include <cyg/io/mxc_nand_parts.inl>
 281 };
 282 #define NUM_DEVICES NUM_ELEMS(supported_devices)
 283
 284 #define COL_CYCLE                                       flash_dev_info->col_cycle
 285 #define ROW_CYCLE                                       flash_dev_info->row_cycle
 286 #define NF_PG_SZ                                        ((flash_dev_info->page_size) * num_of_nand_chips)
 287 #define NF_SPARE_SZ                                     ((flash_dev_info->spare_size) * num_of_nand_chips)
 288 #define NF_PG_PER_BLK                           flash_dev_info->pages_per_block
 289 #define NF_DEV_SZ                                       ((flash_dev_info->device_size) * num_of_nand_chips_for_nandsize)
 290 #define NF_BLK_SZ                                       ((flash_dev_info->block_size) * num_of_nand_chips)
 291 #define NF_BLK_CNT                                      ((flash_dev_info->block_count) / scale_block_cnt)
 292 #define NF_VEND_INFO                            flash_dev_info->vendor_info
 293 #define NF_OPTIONS                                      flash_dev_info->options
 294 #define NF_BBT_MAX_NR                           flash_dev_info->bbt_blk_max_nr
 295 #define NF_OPTIONS                                      flash_dev_info->options
 296 #define NF_BI_OFF                                       flash_dev_info->bi_off
 297
 298 #define MXC_NAND_ADDR_MASK                              (NF_DEV_SZ - 1)
 299 #define BLOCK_TO_OFFSET(blk)                    ((blk) * NF_PG_PER_BLK * NF_PG_SZ)
 300 #define BLOCK_TO_PAGE(blk)                              ((blk) * NF_PG_PER_BLK)
 301 #define BLOCK_PAGE_TO_OFFSET(blk, pge)  (((blk) * NF_PG_PER_BLK + (pge)) * NF_PG_SZ)
 302 #define OFFSET_TO_BLOCK(offset)                 ((u32)((offset) / (NF_PG_SZ * NF_PG_PER_BLK)))
 303 #define OFFSET_TO_PAGE(offset)                  ((u32)((offset) / NF_PG_SZ) % NF_PG_PER_BLK)
 304
 305 static u8 *g_bbt, *g_page_buf;
 306 static u32 g_bbt_sz;
 307 static bool mxcnfc_init_ok = false;
 308 static bool mxc_nfc_scan_done;
 309
 310 // this callback allows the platform specific function to be called right
 311 // after flash_dev_query()
 312 nfc_setup_func_t *nfc_setup = NULL;
 313
 314 // this callback allows the platform specific iomux setup
 315 nfc_iomuxsetup_func_t *nfc_iomux_setup = NULL;
 316
 317 static flash_addr_t flash_region_start;
 318 static flash_addr_t flash_region_end;
 319 static int flash_enable;
 320
 321 /* This assumes reading the flash with monotonically increasing flash addresses */
 322 static flash_addr_t nfc_l_to_p(flash_addr_t addr)
 323 {
 324         if (g_block_offset == 0) {
 325                 return addr;
 326         } else {
 327                 flash_addr_t ra;
 328                 u32 block = (addr & MXC_NAND_ADDR_MASK) / NF_BLK_SZ;
 329                 u32 offset = addr % NF_BLK_SZ;
 330
 331                 ra = (block + g_block_offset) * NF_BLK_SZ + offset;
 332                 if (offset == 0) {
 333                         nfc_printf(NFC_DEBUG_MIN,
 334                                            "Remapping block %u at addr 0x%08llx to block %u at addr 0x%08llx\n",
 335                                            block, (u64)addr, block + g_block_offset, (u64)ra);
 336                 }
 337                 return ra;
 338         }
 339 }
 340
 341 static int flash_addr_valid(flash_addr_t addr)
 342 {
 343         if (addr < flash_region_start || addr >= flash_region_end) {
 344                 diag_printf("Flash address 0x%08llx is outside valid region 0x%08llx..0x%08llx\n",
 345                                         (u64)addr, (u64)flash_region_start, (u64)flash_region_end);
 346         }
 347         return addr >= flash_region_start && addr < flash_region_end;
 348 }
 349
 350 /* FIXME: we should pass flash_addr_t as arguments */
 351 void mxc_flash_enable(void *start, void *end)
 352 {
 353         flash_addr_t s = (unsigned long)start & MXC_NAND_ADDR_MASK;
 354         flash_addr_t e = (unsigned long)end & MXC_NAND_ADDR_MASK;
 355
 356         if (flash_enable++ == 0) {
 357                 flash_region_start = s;
 358                 flash_region_end = e;
 359                 diag_printf1("Enabling flash region 0x%08llx..0x%08llx\n",
 360                                          (u64)s, (u64)e);
 361                 g_block_offset = 0;
 362         } else {
 363                 if (s < flash_region_start ||
 364                         e > flash_region_end) {
 365                         diag_printf("** WARNING: Enable 0x%08llx..0x%08llx outside enabled flash region 0x%08llx..0x%08llx\n",
 366                                                 (u64)s, (u64)e, (u64)flash_region_start, (u64)flash_region_end);
 367                 }
 368         }
 369 }
 370
 371 void mxc_flash_disable(void *start, void *end)
 372 {
 373         flash_addr_t s = (unsigned long)start & MXC_NAND_ADDR_MASK;
 374         flash_addr_t e = (unsigned long)end & MXC_NAND_ADDR_MASK;
 375
 376         if (flash_enable) {
 377                 if (--flash_enable == 0) {
 378                         diag_printf1("Disabling flash region 0x%08llx..0x%08llx\n",
 379                                                  (u64)s, (u64)e);
 380                         if (s != flash_region_start ||
 381                                 e != flash_region_end) {
 382                                 diag_printf("** Error: Disable 0x%08llx..0x%08llx not equal to enabled flash region 0x%08llx..0x%08llx\n",
 383                                                 (u64)s, (u64)e, (u64)flash_region_start, (u64)flash_region_end);
 384                         }
 385                 }
 386         } else {
 387                 diag_printf("** Error: unbalanced call to flash_disable()\n");
 388         }
 389 }
 390
 391 int
 392 #ifndef MXCFLASH_SELECT_MULTI
 393 flash_hwr_init(void)
 394 #else
 395 nandflash_hwr_init(void)
 396 #endif
 397 {
 398         u32 id[2];
 399         int i;
 400
 401         nfc_printf(NFC_DEBUG_MAX, "%s()\n", __FUNCTION__);
 402
 403         if (nfc_iomux_setup)
 404                 nfc_iomux_setup();
 405
 406         NFC_SET_NFC_ACTIVE_CS(0);
 407         NFC_CMD_INPUT(FLASH_Reset);
 408
 409         // Look through table for device data
 410         flash_dev_query(&id[0]);
 411         flash_dev_info = supported_devices;
 412         for (i = 0; i < NUM_DEVICES; i++) {
 413                 if ((flash_dev_info->device_id == (id[0] & 0xffff)) &&
 414                         (flash_dev_info->device_id2 == 0xFFFF ||
 415                          flash_dev_info->device_id2 == (id[0] >> 16)))
 416                         break;
 417                 flash_dev_info++;
 418         }
 419
 420         // Did we find the device? If not, return error.
 421         if (NUM_DEVICES == i) {
 422                 diag_printf("Unrecognized NAND part: 0x%02x, 0x%02x, 0x%02x, 0x%02x\n",
 423                                         id[0] & 0xff, (id[0] >> 8) & 0xff, (id[0] >> 16) & 0xff, id[0] >> 24);
 424                 return FLASH_ERR_DRV_WRONG_PART;
 425         }
 426
 427         nand_flash_index = i;
 428         mxcnfc_init_ok = true;
 429
 430         if (NF_PG_SZ == 2048) {
 431                 g_is_2k_page = true;
 432                 g_spare_only_read_ok = false;
 433         }
 434         if (NF_PG_SZ == 4096) {
 435                 g_is_4k_page = true;
 436                 g_spare_only_read_ok = false;
 437         }
 438
 439         nfc_printf(NFC_DEBUG_MED, "%s(): %d out of NUM_DEVICES=%d, id=0x%02x\n",
 440                            __FUNCTION__, i, NUM_DEVICES, flash_dev_info->device_id);
 441
 442         if (nfc_setup) {
 443                 g_nfc_version = nfc_setup(NF_PG_SZ / num_of_nand_chips, flash_dev_info->port_size,
 444                                                                   flash_dev_info->type, num_of_nand_chips);
 445         }
 446         diag_printf1("NFC version: %02x\n", g_nfc_version);
 447         if (g_nfc_version == MXC_NFC_V3) {
 448                 for (i = 2; i <= NUM_OF_CS_LINES; i++) {
 449                         u32 id_tmp[2];
 450                         read_nflash_id(&id_tmp[0], i - 1);
 451                         if (id[0] != id_tmp[0]) {
 452                                 break;
 453                         }
 454                         /* Support interleave with 1, 2, 4, 8 chips */
 455                         if (i == (num_of_nand_chips * 2)) {
 456                                 num_of_nand_chips = i;
 457                         }
 458                         NFC_CMD_INPUT(FLASH_Reset);
 459                 }
 460
 461                 if (nfc_setup && (num_of_nand_chips > 1)) {
 462                         nfc_setup(NF_PG_SZ / num_of_nand_chips, flash_dev_info->port_size,
 463                                                    flash_dev_info->type, num_of_nand_chips);
 464                 }
 465         }
 466
 467         NFC_ARCH_INIT();
 468
 469         g_bbt_sz = NF_BLK_CNT / 4;
 470         g_bbt = malloc(g_bbt_sz); // two bit for each block
 471         if (g_bbt == NULL) {
 472                 diag_printf("%s(): failed to allocate %d byte for bbt\n", __FUNCTION__, g_bbt_sz);
 473                 return FLASH_ERR_PROTOCOL;
 474         }
 475
 476         g_page_buf = malloc(NF_PG_SZ); // for programming less than one page size buffer
 477         if (g_page_buf == NULL) {
 478                 diag_printf("%s(): failed to allocate %d byte page buffer\n", __FUNCTION__,
 479                                         NF_PG_SZ);
 480                 return FLASH_ERR_PROTOCOL;
 481         }
 482         memset(g_bbt, 0, g_bbt_sz);
 483
 484         /* For now cap off the Device size to 2GB */
 485         i = 1;
 486         while ((i <= num_of_nand_chips) && ((NF_DEV_SZ * i) < 0x80000000)) {
 487                 num_of_nand_chips_for_nandsize = i;
 488                 i *= 2;
 489         }
 490
 491         scale_block_cnt = num_of_nand_chips / num_of_nand_chips_for_nandsize;
 492         // Hard wired for now
 493         flash_info.block_size = NF_BLK_SZ;
 494         flash_info.blocks = NF_BLK_CNT - CYGNUM_FLASH_NAND_BBT_BLOCKS;
 495         flash_info.start = (void *)MXC_NAND_BASE_DUMMY;
 496         flash_info.end = (void *)(MXC_NAND_BASE_DUMMY + NF_DEV_SZ -
 497                                                           CYGNUM_FLASH_NAND_BBT_BLOCKS * NF_BLK_SZ);
 498
 499         mxc_nfc_scan(false); // look for table
 500
 501         diag_printf1("%s(): block_size=0x%08x, blocks=0x%08x, start=%p, end=%p\n",
 502                                  __FUNCTION__, flash_info.block_size, flash_info.blocks,
 503                                  flash_info.start, flash_info.end);
 504
 505         return FLASH_ERR_OK;
 506 }
 507
 508 // used by redboot/current/src/flash.c
 509 int mxc_nand_fis_start(void)
 510 {
 511         return flash_dev_info->fis_start_addr * num_of_nand_chips;
 512 }
 513
 514 static inline u8 get_byte(cyg_uint16 *buf, int offs)
 515 {
 516         cyg_uint16 word = buf[offs >> 1];
 517         if (offs & 1) {
 518                 return word >> 8;
 519         }
 520         return word & 0xff;
 521 }
 522
 523 static inline void store_byte(cyg_uint16 *buf, int offs, u8 val)
 524 {
 525         cyg_uint16 word = buf[offs >> 1];
 526
 527         if (offs & 1) {
 528                 word = (word & 0x00ff) | ((u16)val << 8);
 529         } else {
 530                 word = (word & 0xff00) | val;
 531         }
 532         buf[offs >> 1] = word;
 533 }
 534
 535 static inline bool nfc_verify_addr(unsigned long dst, unsigned long len)
 536 {
 537         if (dst < NAND_MAIN_BUF0 || dst + len >= NAND_SPAR_BUF3 + NFC_SPARE_BUF_SZ) {
 538                 diag_printf("%s: Bad NFC Buffer address 0x%08lx\n", __FUNCTION__, dst);
 539                 return false;
 540         }
 541         return true;
 542 }
 543
 544 static void nfc_buf_read(void *dst, unsigned long src, u32 len)
 545 {
 546         u16 *s = (u16 *)(src & ~1);
 547         u8 *bp = dst;
 548
 549         if (len == 0) {
 550                 return;
 551         }
 552         if (src + len < src) {
 553                 diag_printf("%s: Bad address range 0x%08lx .. 0x%08lx\n", __FUNCTION__,
 554                                         src, src + len);
 555         }
 556         if ((unsigned long)dst + len < (unsigned long)dst) {
 557                 diag_printf("%s: Bad address range 0x%08lx .. 0x%08lx\n", __FUNCTION__,
 558                                         (unsigned long)dst, (unsigned long)dst + len);
 559         }
 560         if (src < NAND_MAIN_BUF0 || src + len >= NAND_SPAR_BUF3 + NF_PG_SZ) {
 561                 diag_printf("%s: Bad NFC Buffer address 0x%08lx\n", __FUNCTION__, src);
 562                 return;
 563         }
 564         if ((unsigned long)dst >= NAND_MAIN_BUF0 &&
 565                 (unsigned long)dst < NAND_SPAR_BUF3 + NF_PG_SZ) {
 566                 diag_printf("%s: Bad memory address 0x%08lx\n", __FUNCTION__,
 567                                         (unsigned long)dst);
 568                 return;
 569         }
 570         if (src & 1) {
 571                 *bp++ = get_byte(s, 1);
 572                 s++;
 573                 len--;
 574         }
 575         if ((unsigned long)bp & 1) {
 576                 while (len > 1) {
 577                         u16 word = *s++;
 578                         *bp++ = word & 0xff;
 579                         *bp++ = word >> 8;
 580                         len -= 2;
 581                 }
 582         } else {
 583                 u16 *wp = (u16 *)bp;
 584
 585                 while (len > 1) {
 586                         *wp++ = *s++;
 587                         len -= 2;
 588                 }
 589                 bp = (u8*)wp;
 590         }
 591         if (len != 0) {
 592                 u16 word = *s;
 593                 *bp = word & 0xff;
 594         }
 595 }
 596
 597 static void nfc_buf_write(unsigned long dst, void *src, u32 len)
 598 {
 599         u8 *bp = src;
 600         u16 *d = (u16 *)(dst & ~1);
 601
 602         if (len == 0) {
 603                 return;
 604         }
 605         if (!nfc_verify_addr(dst, len)) {
 606                 return;
 607         }
 608         if (dst & 1) {
 609                 store_byte(d, 1, *bp);
 610                 d++;
 611                 bp++;
 612                 len--;
 613         }
 614         if ((unsigned long)bp & 1) {
 615                 while (len > 1) {
 616                         u16 word;
 617                         word = *bp++;
 618                         word |= (u16)(*bp++) << 8;
 619                         *d++ = word;
 620                         len -= 2;
 621                 }
 622         } else {
 623                 u16 *wp = (u16 *)bp;
 624                 while (len > 1) {
 625                         *d++ = *wp++;
 626                         len -= 2;
 627                 }
 628                 bp = (u8 *)wp;
 629         }
 630         if (len != 0) {
 631                 store_byte(d, 1, *bp);
 632         }
 633 }
 634
 635 #ifndef NFC_V3_0
 636 /*!
 637  * Starts the address input cycles for different operations as defined in ops.
 638  *
 639  * @param ops                   operations as defined in enum nfc_addr_ops
 640  * @param pg_no                 page number offset from 0
 641  * @param pg_off                byte offset within the page
 642  * @param is_erase              don't care for earlier NFC
 643  * @param cs_line                don't care for earlier NFC
 644  */
 645 static void start_nfc_addr_ops(u32 ops, u32 pg_no, u32 pg_off, u32 is_erase,
 646                                    u32 cs_line, u32 num_of_chips)
 647 {
 648         int i;
 649
 650         switch (ops) {
 651         case FLASH_Read_ID:
 652                 /* Only supports one NAND chip (CS0) */
 653                 if (cs_line != 0)
 654                         return;
 655                 NFC_ADDR_INPUT(0);
 656                 return;
 657         case FLASH_Read_Mode1:
 658         case FLASH_Program:
 659                 for (i = 0; i < COL_CYCLE; i++, pg_off >>= 8) {
 660                         NFC_ADDR_INPUT(pg_off & 0xFF);
 661                 }
 662                 // don't break on purpose
 663         case FLASH_Block_Erase:
 664                 for (i = 0; i < ROW_CYCLE; i++, pg_no >>= 8) {
 665                         NFC_ADDR_INPUT(pg_no & 0xFF);
 666                 }
 667                 break;
 668         default:
 669                 diag_printf("!!!!!! %s(): wrong ops: %d !!!!!\n", __FUNCTION__, ops);
 670                 return;
 671         }
 672 }
 673 #endif                                  // #ifndef NFC_V3_0
 674
 675 static void read_nflash_id(u32 *id, u32 cs_line)
 676 {
 677         volatile u32 *ptr = (volatile u32*)NAND_MAIN_BUF0;
 678
 679     nfc_printf(NFC_DEBUG_MIN, "%s: read flash id from chip %d @ %p\n",
 680                            __FUNCTION__, cs_line, ptr);
 681
 682         NFC_PRESET(MXC_UNLOCK_BLK_END);
 683         NFC_SET_NFC_ACTIVE_CS(cs_line);
 684         NFC_CMD_INPUT(FLASH_Read_ID);
 685
 686         start_nfc_addr_ops(FLASH_Read_ID, 0, 0, 0, cs_line, num_of_nand_chips);
 687         NFC_DATA_OUTPUT(RAM_BUF_0, FDO_FLASH_ID, g_ecc_enable);
 688
 689     *id++ = *ptr++;
 690     *id++ = *ptr++;
 691 }
 692
 693 static void mark_blk_bad(unsigned int block, unsigned char *buf,
 694                                                  enum blk_bad_type bad_type)
 695 {
 696         unsigned int off = block >> 2;           // byte offset - each byte can hold status for 4 blocks
 697         unsigned int sft = (block & 3) << 1;  // bit shift 0, 2, 4, 6
 698         unsigned char val = buf[off];
 699
 700         if (block > NF_BLK_CNT) {
 701                 diag_printf("%s: Block number %u out of range: 0..%u\n", __FUNCTION__,
 702                                         block, NF_BLK_CNT - 1);
 703                 return;
 704         }
 705         val = (val & ~(3 << sft)) | (bad_type << sft);
 706         buf[off] = val;
 707 }
 708
 709 /*!
 710  * Checks to see if a block is bad. If buf is not NULL, it indicates a valid
 711  * BBT in the RAM. In this case, it assumes to have 2-bit to represent each
 712  * block for good or bad
 713  *                              * 11b:  block is good
 714  *                              * 00b:  block is factory marked bad
 715  *                              * 01b:  block is marked bad due to wear
 716  *                              * 10b:  block is marked reserved (for BBT)
 717  * If buf is NULL, then it indicates a low level scan based on the certain
 718  * offset value in certain pages and certain offset to be non-0xFF. In this
 719  * case, the HW ECC will be turned off.
 720  *
 721  * @param block         0-based block number
 722  * @param buf           BBT buffer. Could be NULL (see above explanation)
 723  *
 724  * @return                      1 if bad block; 0 otherwise
 725  */
 726 static int nfc_is_badblock(u32 block, u8 *buf)
 727 {
 728         u32 off;           // byte offset
 729         u32 sft;           // bit shift 0, 2, 4, 6
 730         flash_addr_t addr;
 731         u16 temp, i;
 732         int res;
 733         u32 pg_no;
 734
 735         if (buf) {
 736                 // use BBT
 737                 off = block >> 2;               // byte offset
 738                 sft = (block & 3) << 1;  // bit shift 0, 2, 4, 6
 739                 res = (buf[off] >> sft) & 0x3;
 740                 if (res) {
 741                         addr = BLOCK_TO_OFFSET(block);
 742                         diag_printf1("Block %u at %08llx is marked %s (%d) in BBT@%p[%02x] mask %02x\n",
 743                                                  block, (u64)addr, res == BLK_RESERVED ? "reserved" :
 744                                                  res == BLK_BAD_FACTORY ? "factory bad" : "runtime bad",
 745                                                  res, buf, off, 3 << sft);
 746                 }
 747                 return res;
 748         }
 749
 750         // need to do low level scan with ECC off
 751         if (NF_OPTIONS & NAND_BBT_SCANLSTPAGE) {
 752                 if (g_is_4k_page || g_is_2k_page) {
 753                         addr = (block + 1) * NF_BLK_SZ - NF_PG_SZ;
 754                         pg_no = addr / NF_PG_SZ;
 755                         for (i = 0; i < num_of_nand_chips; i++) {
 756                                 // we don't do partial page read here. No ecc either
 757                                 nfc_read_pg_random(pg_no, 0, ECC_FORCE_OFF, i, num_of_nand_chips);
 758                                 temp = readw((u32)NAND_MAIN_BUF0 + NF_BI_OFF);
 759                                 if ((temp & 0xFF) != 0xFF) {
 760                                         return BLK_BAD_FACTORY;
 761                                 }
 762                         }
 763                 } else {
 764                         diag_printf("only 2K/4K page is supported\n");
 765                         // die here -- need to fix the SW
 766                         while (1);
 767                 }
 768                 return 0;
 769         }
 770         addr = block * NF_BLK_SZ;
 771         pg_no = addr / NF_PG_SZ;
 772         for (i = 0; i < num_of_nand_chips; i++) {
 773                 nfc_read_pg_random(pg_no, 0, ECC_FORCE_OFF, i, num_of_nand_chips); // no ecc
 774                 if (g_is_2k_page || g_is_4k_page) {
 775                         temp = readw(NAND_MAIN_BUF0 + NF_BI_OFF);
 776                 } else {
 777                         temp = readw(NAND_SPAR_BUF0 + 4) >> 8; // BI is at 5th byte in spare area
 778                 }
 779                 if ((temp & 0xFF) != 0xFF) {
 780                         return BLK_BAD_FACTORY;
 781                 }
 782         }
 783         if (NF_OPTIONS & NAND_BBT_SCAN2NDPAGE) {
 784                 addr += NF_PG_SZ;
 785                 pg_no++;
 786                 for (i = 0; i < num_of_nand_chips; i++) {
 787                         nfc_read_pg_random(pg_no, 0, ECC_FORCE_OFF, i, num_of_nand_chips); // no ecc
 788                         if (g_is_2k_page || g_is_4k_page) {
 789                                 temp = readw(NAND_MAIN_BUF0 + NF_BI_OFF);
 790                         } else {
 791                                 temp = readw(NAND_SPAR_BUF0 + 4) >> 8; // BI is at 5th byte in spare area
 792                         }
 793                         if ((temp & 0xFF) != 0xFF) {
 794                                 return BLK_BAD_FACTORY;
 795                         }
 796                 }
 797         }
 798         return 0;
 799 }
 800
 801 /*
 802  * check_short_pattern - [GENERIC] check if a pattern is in the buffer
 803  * @buf:        the buffer to search
 804  * @td:         search pattern descriptor
 805  *
 806  * Check for a pattern at the given place. Used to search bad block
 807  * tables and good / bad block identifiers.
 808 */
 809 static int check_short_pattern(void *buf, struct nand_bbt_descr *td)
 810 {
 811         int i;
 812
 813         for (i = 0; i < td->len; i++) {
 814                 if (get_byte(buf, td->offs + i) != td->pattern[i]) {
 815                         return -1;
 816                 }
 817         }
 818         return 0;
 819 }
 820
 821 static int nfc_write_page(u32 pg_no, u32 pg_off, u32 ecc_force);
 822 /*
 823  * Program g_bbt into the NAND block with offset at g_main_bbt_addr.
 824  * This assumes that the g_bbt has been built already.
 825  *
 826  * If g_main_bbt_addr is 0, search for a free block from the bottom 4 blocks (but make
 827  * sure not re-using the mirror block). If g_mirror_bbt_page is 0, do the same thing.
 828  * Otherwise, just use g_main_bbt_addr, g_mirror_bbt_page numbers to prgram the
 829  * g_bbt into those two blocks.
 830  * todo: need to do the version to see which one is newer.
 831  *
 832  * @return      0 if successful; -1 otherwise.
 833  */
 834 static int mxc_nfc_write_bbt_page(struct nand_bbt_descr *td)
 835 {
 836         int ret;
 837         u32 block = td->pages / NF_PG_PER_BLK;
 838         flash_addr_t addr = td->pages * NF_PG_SZ;
 839
 840         ret = nfc_erase_blk(addr);
 841         if (ret != 0) {
 842                 diag_printf("Failed to erase bbt block %u\n", block);
 843                 return ret;
 844         }
 845         ret = nfc_write_page(td->pages, 0, 0);
 846         if (ret != 0) {
 847                 diag_printf("Failed to write bbt block %u\n", block);
 848                 return ret;
 849         }
 850         mark_blk_bad(block, g_bbt, BLK_RESERVED);
 851         return 0;
 852 }
 853
 854 static inline void mxc_nfc_buf_clear(unsigned long buf, u8 pattern, int size)
 855 {
 856         int i;
 857         u16 *p = (u16 *)buf;
 858         u16 fill = pattern;
 859
 860         fill = (fill << 8) | pattern;
 861         for (i = 0; i < size >> 1; i++) {
 862                 p[i] = fill;
 863         }
 864 }
 865
 866 static int mxc_nfc_write_bbt(struct nand_bbt_descr *td, struct nand_bbt_descr *md)
 867 {
 868         int ret = -1;
 869         int block;
 870         int pg_offs = 0;
 871         int page = 0;
 872         u16 *buf = (u16 *)NAND_MAIN_BUF0;
 873
 874         for (block = NF_BLK_CNT - 1; block >= NF_BLK_CNT - td->maxblocks - 1; block--) {
 875                 int pg = block * NF_PG_PER_BLK;
 876
 877                 if ((nfc_is_badblock(block, g_bbt) & 1) == 0) {
 878                         if (md != NULL && md->pages == pg) {
 879                                 continue;
 880                         }
 881                         td->pages = pg;
 882                         break;
 883                 }
 884         }
 885         if (td->pages < 0) {
 886                 return -1;
 887         }
 888         mxc_nfc_buf_clear(NAND_SPAR_BUF0, 0xff, NF_SPARE_SZ);
 889         mxc_nfc_buf_clear(NAND_MAIN_BUF0, 0xff, NF_PG_SZ);
 890         diag_printf1("%s: Updating bbt %c%c%c%c version %d\n", __FUNCTION__,
 891                                  td->pattern[0], td->pattern[1], td->pattern[2], td->pattern[3], td->version);
 892         nfc_buf_write(NAND_SPAR_BUF0 + td->offs, td->pattern, td->len);
 893         store_byte((u16 *)NAND_SPAR_BUF0, td->veroffs, td->version);
 894
 895         for (block = 0, pg_offs = 0; block < NF_BLK_CNT; pg_offs++) {
 896                 u16 tmp = 0xffff;
 897                 int i;
 898
 899                 if (pg_offs << 1 >= NF_PG_SZ) {
 900                         ret = mxc_nfc_write_bbt_page(td);
 901                         if (ret != 0) {
 902                                 return ret;
 903                         }
 904                         page++;
 905                         mxc_nfc_buf_clear(NAND_SPAR_BUF0, 0xff, NF_SPARE_SZ);
 906                         mxc_nfc_buf_clear(NAND_MAIN_BUF0, 0xff, NF_PG_SZ);
 907                         pg_offs = 0;
 908                 }
 909                 for (i = 0; i < 16 && block < NF_BLK_CNT; i += 2, block++) {
 910                         u8 code = nfc_is_badblock(block, g_bbt);
 911                         if ((code & 1) != 0) {
 912                                 tmp &= ~(code << i);
 913                                 diag_printf1("%s: bad block %u pattern[%p] 0x%04x mask 0x%04x\n", __FUNCTION__,
 914                                                          block, &buf[pg_offs], tmp, 0x03 << i);
 915                         }
 916                 }
 917                 buf[pg_offs] = tmp;
 918         }
 919         if (pg_offs > 0) {
 920                 diag_printf1("%s: Writing final bbt block %d page %d\n", __FUNCTION__,
 921                                          td->pages / NF_PG_PER_BLK, page);
 922                 ret = mxc_nfc_write_bbt_page(td);
 923         }
 924         return ret;
 925 }
 926
 927 static int mxc_nfc_update_bbt(struct nand_bbt_descr *td, struct nand_bbt_descr *md)
 928 {
 929         int ret;
 930
 931         if (td == NULL) {
 932                 return -1;
 933         }
 934         if (td->pages < 0 && (md == NULL || md->pages == -1)) {
 935                 td->version = 1;
 936         } else {
 937                 if (md != NULL && md->pages >= 0) {
 938                         if (md->version >= td->version) {
 939                                 td->version = ++md->version;
 940                         } else {
 941                                 md->version = ++td->version;
 942                         }
 943                 } else {
 944                         td->version++;
 945                 }
 946         }
 947         ret = mxc_nfc_write_bbt(td, md);
 948         if (ret) {
 949                 diag_printf("** Error: Failed to update main BBT\n");
 950         }
 951         if (md) {
 952                 ret = mxc_nfc_write_bbt(md, td);
 953                 if (ret) {
 954                         diag_printf("** Error: Failed to update mirror BBT\n");
 955                 }
 956         }
 957         return ret;
 958 }
 959
 960 static int program_bbt_to_flash(void)
 961 {
 962         return mxc_nfc_update_bbt(g_mxc_nfc_bbt_main_descr, g_mxc_nfc_bbt_mirror_descr);
 963 }
 964
 965 /*!
 966  * Unconditionally erase a block without checking the BI field.
 967  * Note that there is NO error checking for passed-in ra.
 968  *
 969  * @param ra            starting address in the raw address space (offset)
 970  *                                      Must be block-aligned
 971  * @return                      0 if successful; -1 otherwise
 972  */
 973 static int nfc_erase_blk(u32 ra)
 974 {
 975         u16 flash_status, i;
 976         u32 pg_no, pg_off;
 977
 978         if (g_nfc_version == MXC_NFC_V3) {
 979                 // combine the two commands for erase
 980                 writel((FLASH_Start_Erase << 8) | FLASH_Block_Erase, NAND_CMD_REG);
 981                 pg_no = ra / NF_PG_SZ;
 982                 pg_off = ra % NF_PG_SZ;
 983                 for (i = 0; i < num_of_nand_chips; i++) {
 984                         start_nfc_addr_ops(FLASH_Block_Erase, pg_no, pg_off, 1, i, num_of_nand_chips);
 985                         // start auto-erase
 986                         writel(NAND_LAUNCH_AUTO_ERASE, NAND_LAUNCH_REG);
 987                         wait_op_done();
 988                         pg_off = 0;
 989                 }
 990                 flash_status = NFC_STATUS_READ();
 991                 // check I/O bit 0 to see if it is 0 for success
 992                 if ((flash_status & ((0x1 << num_of_nand_chips) - 1)) != 0) {
 993                         return -1;
 994                 }
 995         } else {
 996                 NFC_CMD_INPUT(FLASH_Block_Erase);
 997                 start_nfc_addr_ops(FLASH_Block_Erase, ra / NF_PG_SZ, ra % NF_PG_SZ,
 998                                                    1, 0, num_of_nand_chips);
 999                 NFC_CMD_INPUT(FLASH_Start_Erase);
1000
1001                 flash_status = NFC_STATUS_READ();
1002
1003                 // check I/O bit 0 to see if it is 0 for success
1004                 if ((flash_status & 0x1) != 0) {
1005                         return -1;
1006                 }
1007         }
1008         return 0;
1009 }
1010
1011 /*!
1012  * Program a block of data in the flash. This function doesn't do
1013  * bad block checking. But if program fails, it return error.
1014  * Note: If "len" is less than a block it will program up to a page's
1015  *               boundary. If not within a page boundary, then it fills the
1016  *               rest of the page with 0xFF.
1017  *
1018  * @param ra            destination raw flash address
1019  * @param buf           source address in the RAM
1020  * @param len           len to be programmed
1021  *
1022  * @return                      0 if successful; -1 otherwise
1023  */
1024 static int nfc_program_blk(u32 ra, u8 *buf, u32 len)
1025 {
1026         u32 temp = num_of_nand_chips;
1027
1028         /* Needed when romupdate is called */
1029         if (ra == 0)
1030                 num_of_nand_chips = 1;
1031
1032         for (; len >= NF_PG_SZ; len -= NF_PG_SZ) {
1033                 if (nfc_write_pg_random(ra / NF_PG_SZ, ra % NF_PG_SZ, buf, 0) != 0) {
1034                         return -1;
1035                 }
1036                 ra += NF_PG_SZ;
1037                 buf += NF_PG_SZ;
1038         }
1039         if (len != 0) {
1040                 memset(g_page_buf + len, 0xFF, NF_PG_SZ - len);
1041                 memcpy(g_page_buf, buf, len);
1042                 if (nfc_write_pg_random(ra / NF_PG_SZ, ra % NF_PG_SZ, g_page_buf, 0) != 0) {
1043                         num_of_nand_chips = temp;
1044                         return -1;
1045                 }
1046         }
1047         num_of_nand_chips = temp;
1048         return 0;
1049 }
1050
1051 /*!
1052  * Erase a range of NAND flash good blocks only.
1053  * It skips bad blocks and update the BBT once it sees new bad block due to erase.
1054  * @param addr                  raw NAND flash address. it has to be block size aligned
1055  * @param len                   number of bytes
1056  * @param skip_bad              if 1, don't erase bad block; otherwise, always erase
1057  * @param verbose               use true to print more messages
1058  *
1059  * @return                              FLASH_ERR_OK (0) if successful; non-zero otherwise
1060  */
1061 int nfc_erase_region(flash_addr_t addr, u32 len, bool skip_bad, bool verbose)
1062 {
1063         u32 sz, blk, update = 0, j = 0;
1064
1065         nfc_printf(NFC_DEBUG_MED, "%s: addr=0x%08llx len=0x%08x\n",
1066                            __FUNCTION__, (u64)addr, len);
1067
1068         if ((addr % NF_BLK_SZ) != 0) {
1069                 diag_printf("Error: flash address 0x%08llx not block aligned\n", addr);
1070                 return FLASH_ERR_INVALID;
1071         }
1072         if ((len % NF_BLK_SZ) != 0 || len == 0) {
1073                 diag_printf("Error: invalid length %u (must be > 0 and block aligned)\n", len);
1074                 return FLASH_ERR_INVALID;
1075         }
1076         addr = nfc_l_to_p(addr);
1077         // now addr has to be block aligned
1078         for (sz = 0; sz < len; addr += NF_BLK_SZ, j++, sz += NF_BLK_SZ) {
1079                 blk = OFFSET_TO_BLOCK(addr);
1080                 if (skip_bad && nfc_is_badblock(blk, g_bbt)) {
1081                         diag_printf("\nSkipping bad block %u at addr 0x%08llx\n",
1082                                                 blk, (u64)addr);
1083                         continue;
1084                 }
1085                 if (nfc_erase_blk(addr) != 0) {
1086                         diag_printf("\n** Error: Failed to erase block %u at addr 0x%08llx\n",
1087                                             blk, (u64)addr);
1088                         mark_blk_bad(blk, g_bbt, BLK_BAD_RUNTIME);
1089                         // we don't need to update the table immediately here since even
1090                         // with power loss now, we should see the same erase error again.
1091                         update++;
1092                         continue;
1093                 }
1094                 if (verbose) {
1095                         if ((j % 0x20) == 0)
1096                                 diag_printf("\n%s 0x%08llx: ", skip_bad ? "Erase" : "FORCE erase", (u64)addr);
1097                         diag_printf(".");
1098                 }
1099         }
1100         if (update) {
1101                 if (program_bbt_to_flash() != 0) {
1102                         diag_printf("\nError: Failed to update bad block table\n");
1103                         return FLASH_ERR_PROGRAM;
1104                 }
1105                 diag_printf("\nnew bad blocks=%d\n", update);
1106         }
1107         return FLASH_ERR_OK;
1108 }
1109
1110 /*!
1111  * Program a range of NAND flash in blocks only.
1112  * It skips bad blocks and update the BBT once it sees new bad block due to program.
1113  * @param addr                  raw NAND flash address. it has to be block size aligned
1114  * @param len                   number of bytes
1115  * @return                              FLASH_ERR_OK (0) if successful; non-zero otherwise
1116  */
1117 int nfc_program_region(flash_addr_t addr, u8 *buf, u32 len)
1118 {
1119         u32 sz, blk, update = 0, partial_block_size;
1120
1121         nfc_printf(NFC_DEBUG_MED, "%s: addr=0x%08llx, len=0x%08x\n",
1122                            __FUNCTION__, (u64)addr, len);
1123
1124         if ((addr % (NF_PG_SZ / num_of_nand_chips)) != 0) {
1125                 diag_printf("Error: flash address 0x%08llx not page aligned\n", (u64)addr);
1126                 return FLASH_ERR_INVALID;
1127         }
1128         if (len == 0) {
1129                 diag_printf("Error: invalid length\n");
1130                 return FLASH_ERR_INVALID;
1131         }
1132
1133         partial_block_size = addr % NF_BLK_SZ;
1134
1135         mxc_nfc_buf_clear(NAND_SPAR_BUF0, 0xff, NF_SPARE_SZ);
1136         addr = nfc_l_to_p(addr);
1137         while (1) {
1138                 if (!flash_addr_valid(addr)) {
1139                         diag_printf("\nToo many bad blocks in flash region 0x%08llx..0x%08llx\n",
1140                                                 (u64)flash_region_start, (u64)flash_region_end);
1141                         return FLASH_ERR_INVALID;
1142                 }
1143                 blk = OFFSET_TO_BLOCK(addr);
1144                 if (nfc_is_badblock(blk, g_bbt)) {
1145                         diag_printf("\nSkipping bad block %u at addr 0x%08llx\n", blk, addr);
1146                         goto incr_address;
1147                 }
1148
1149                 sz = (len >= partial_block_size) ? partial_block_size : len;
1150
1151                 if (nfc_program_blk(addr, buf, sz) != 0) {
1152                         update++;
1153                         diag_printf("\nError: Failed to program flash block %u at addr 0x%08llx\n",
1154                                                 blk, (u64)addr);
1155                         mark_blk_bad(blk, g_bbt, BLK_BAD_RUNTIME);
1156                         // we don't need to update the table immediately here since even
1157                         // with power loss now, we should see the same program error again.
1158                         goto incr_address;
1159                 }
1160                 diag_printf(".");
1161
1162                 len -= sz;
1163                 buf += sz;
1164                 if (len == 0)
1165                         break;
1166
1167 incr_address:
1168                 addr += partial_block_size;
1169                 partial_block_size = NF_BLK_SZ;
1170                 g_block_offset++;
1171         }
1172         if (update) {
1173                 if (program_bbt_to_flash() != 0) {
1174                         diag_printf("\nError: Failed to update bad block table\n");
1175                         return -1;
1176                 }
1177         }
1178         return FLASH_ERR_OK;
1179 }
1180
1181 /*!
1182  * Read data from raw NAND flash address to memory. The MSB of the passed-
1183  * in flash address will be masked off inside the function.
1184  * It skips bad blocks and read good blocks of data for "len" bytes.
1185  *
1186  * @param addr                  NAND flash address.
1187  * @param buf                   memory buf where data will be copied to
1188  * @param len                   number of bytes
1189  * @return                              FLASH_ERR_OK (0) if successful; non-zero otherwise
1190  */
1191 int nfc_read_region(flash_addr_t addr, u8 *buf, u32 len)
1192 {
1193         u32 start_point = 0, pg_no;
1194         unsigned int offset = addr % NF_PG_SZ;
1195         int chk_bad = 1;
1196
1197         nfc_printf(NFC_DEBUG_MED, "%s: addr=0x%08llx, offset=%03x buf=0x%p, len=0x%08x\n",
1198                            __FUNCTION__, addr, offset, buf, len);
1199
1200         addr = nfc_l_to_p(addr);
1201         if (addr < (u32)flash_info.start || (addr + len) > (u32)flash_info.end || len == 0) {
1202                 diag_printf("** Error: flash address 0x%08llx..0x%08llx outside valid range %p..%p\n",
1203                                         (u64)addr, (u64)addr + len - 1, flash_info.start, flash_info.end);
1204                 return FLASH_ERR_INVALID;
1205         }
1206
1207         while (len > 0) {
1208                 int i;
1209
1210                 if (!flash_addr_valid(addr)) {
1211                         diag_printf("Too many bad blocks in flash region 0x%08llx..0x%08llx\n",
1212                                                 (u64)flash_region_start, (u64)flash_region_end);
1213                         return FLASH_ERR_INVALID;
1214                 }
1215                 if (chk_bad) {
1216                         int blk = OFFSET_TO_BLOCK(addr);
1217
1218                         if (nfc_is_badblock(blk, g_bbt)) {
1219                                 diag_printf("Skipping bad block %u at addr 0x%08llx\n", blk, (u64)addr);
1220                                 addr += NF_BLK_SZ;
1221                                 g_block_offset++;
1222                                 continue;
1223                         }
1224                         chk_bad = 0;
1225                 }
1226
1227                 pg_no = addr / NF_PG_SZ;
1228                 if (offset != 0) {
1229                         /* Find which interleaved NAND device */
1230                         start_point = offset / (NF_PG_SZ / num_of_nand_chips);
1231                 } else {
1232                         start_point = 0;
1233                 }
1234                 for (i = start_point; i < num_of_nand_chips; i++) {
1235                         int chunk_size = (NF_PG_SZ - offset) / num_of_nand_chips;
1236
1237                         if (chunk_size > len)
1238                                 chunk_size = len;
1239                         nfc_printf(NFC_DEBUG_MED, "Reading page %d addr 0x%08llx chip %d len 0x%03x\n",
1240                                            pg_no, (u64)addr, i, chunk_size);
1241                         if (nfc_read_page(i, pg_no, 0) != 0) {
1242                                 diag_printf("** Error: Failed to read flash block %u at addr 0x%08llx\n",
1243                                                         OFFSET_TO_BLOCK(addr), (u64)addr);
1244                                 return FLASH_ERR_INVALID;
1245                         }
1246                         // now do the copying
1247                         nfc_buf_read(buf, NAND_MAIN_BUF0 + offset, chunk_size);
1248
1249                         buf += chunk_size;
1250                         len -= chunk_size;
1251                         addr += NF_PG_SZ / num_of_nand_chips - offset;
1252                         offset = 0;
1253                 }
1254                 chk_bad = (addr % NF_BLK_SZ) == 0;
1255         }
1256
1257         return FLASH_ERR_OK;
1258 }
1259
1260 /*
1261  * Support only either program for main area only. Or spare-area only for 512B.
1262  * If one wants to write to the spare-area, then before calling this function,
1263  * the spare area NFC RAM buffer has to be setup already. This function doesn't touch
1264  * the spare area NFC RAM buffer.
1265  *
1266  * @param pg_no                 page number offset from 0
1267  * @param pg_off                byte offset within the page
1268  * @param buf                   data buffer in the RAM to be written to NAND flash
1269  * @param ecc_force             can force ecc to be off. Otherwise, by default it is on
1270  *                                              unless the page offset is non-zero
1271  *
1272  * @return      0 if successful; non-zero otherwise
1273  */
1274 // SP-only opearation is not supported anymore !!!
1275 static int nfc_write_pg_random(u32 pg_no, u32 pg_off, u8 *buf, u32 ecc_force)
1276 {
1277         u16 flash_status;
1278         u32 ecc = NFC_FLASH_CONFIG2_ECC_EN, v, i;
1279         u32 write_count = NF_PG_SZ, start_point = 0, rba, rba_count = 0;
1280
1281         // the 2nd condition is to test for unaligned page address -- ecc has to be off.
1282         if (ecc_force == ECC_FORCE_OFF || pg_off != 0) {
1283                 ecc = 0;
1284         }
1285
1286         diag_printf1("%s(0x%x, 0x%x, %d)\n", __FUNCTION__, pg_no, pg_off, ecc_force);
1287
1288         switch (g_nfc_version & 0xf0) {
1289         case MXC_NFC_V3:
1290                 /* Check if Page size is greater than NFC buffer */
1291                 do {
1292                         if (write_count <= NFC_BUFSIZE) {
1293                                 // No need to worry about the spare area
1294                                 nfc_buf_write(NAND_MAIN_BUF0, buf, write_count);
1295                                 write_count = 0;
1296                         } else {
1297                                 // No need to worry about the spare area
1298                                 nfc_buf_write(NAND_MAIN_BUF0, buf, NFC_BUFSIZE);
1299                                 write_count -= NFC_BUFSIZE;
1300                                 buf += NFC_BUFSIZE;
1301                         }
1302                         // combine the two commands for program
1303                         writel((FLASH_Program << 8) | FLASH_Send_Data, NAND_CMD_REG);
1304
1305                         for (i = start_point; i < num_of_nand_chips; i++) {
1306                                 rba = rba_count * ((NF_PG_SZ / num_of_nand_chips) / 512);
1307                                 /* Completely wrote out the NFC buffer, break and copy more to the NFC buffer */
1308                                 if (rba > 7) {
1309                                         rba_count = 0;
1310                                         break;
1311                                 }
1312
1313                                 // For ECC
1314                                 v = readl(NFC_FLASH_CONFIG2_REG) & ~NFC_FLASH_CONFIG2_ECC_EN;
1315                                 // setup config2 register for ECC enable or not
1316                                 write_nfc_ip_reg(v | ecc, NFC_FLASH_CONFIG2_REG);
1317
1318                                 start_nfc_addr_ops(FLASH_Program, pg_no, pg_off, 0, i, num_of_nand_chips);
1319
1320                                 // start auto-program
1321                                 writel(NAND_LAUNCH_AUTO_PROG, NAND_LAUNCH_REG);
1322                                 if (i < (num_of_nand_chips - i))
1323                                         wait_for_auto_prog_done();
1324                                 else
1325                                         wait_op_done();
1326                                 pg_off = 0;
1327                                 rba_count++;
1328                         }
1329                         start_point = i;
1330                 } while (write_count > 0);
1331                 flash_status = NFC_STATUS_READ();
1332                 // check I/O bit 0 to see if it is 0 for success
1333                 if ((flash_status & ((0x1 << num_of_nand_chips) - 1)) != 0) {
1334                         return -1;
1335                 }
1336                 break;
1337         default:
1338                 if (g_nfc_version != MXC_NFC_V1) {
1339                         int i;
1340
1341                         for (i = 1; i < NFC_SPARE_BUF_SZ / 16; i++) {
1342                                 memcpy((void *)(NAND_SPAR_BUF0 + i * NFC_SPARE_BUF_SZ),
1343                                            (void *)(NAND_SPAR_BUF0 + i * 16), 16);
1344                         }
1345                 }
1346                 nfc_buf_write(NAND_MAIN_BUF0, buf, NF_PG_SZ);
1347 #ifdef BARKER_CODE_SWAP_LOC
1348                 // To replace the data at offset MXC_NAND_BOOT_LOAD_BARKER with
1349                 // the address of the NFC base. This is needed for certain platforms.
1350                 if (pg_no == 0) {
1351                         diag_printf("\n[INFO]: copy data at 0x%x to spare area and set it to 0x%x\n",
1352                                                 BARKER_CODE_SWAP_LOC, BARKER_CODE_VAL);
1353                         writel(readl(NFC_BASE + BARKER_CODE_SWAP_LOC), NAND_SPAR_BUF0);
1354                         // todo: set BARKER_CODE_VAL and BARKER_CODE_SWAP_LOC for skye, etc.
1355                         writel(BARKER_CODE_VAL, NFC_BASE + BARKER_CODE_SWAP_LOC);
1356                 }
1357 #endif
1358                 NFC_CMD_INPUT(FLASH_Send_Data);
1359                 start_nfc_addr_ops(FLASH_Program, pg_no, pg_off, 0, 0, num_of_nand_chips);
1360
1361                 NFC_DATA_INPUT(RAM_BUF_0, NFC_MAIN_ONLY, ecc);
1362                 if (g_is_4k_page && PG_2K_DATA_OP_MULTI_CYCLES()) {
1363                         diag_printf("4K page with multi cycle write is not supported\n");
1364                         return -1;
1365                 }
1366                 if (g_is_2k_page && PG_2K_DATA_OP_MULTI_CYCLES()) {
1367                         NFC_DATA_INPUT_2k(RAM_BUF_1);
1368                         NFC_DATA_INPUT_2k(RAM_BUF_2);
1369                         NFC_DATA_INPUT_2k(RAM_BUF_3);
1370                 }
1371                 NFC_CMD_INPUT(FLASH_Program);
1372
1373                 flash_status = NFC_STATUS_READ();
1374                 // check I/O bit 0 to see if it is 0 for success
1375                 if ((flash_status & 0x1) != 0) {
1376                         diag_printf("** Error: failed to program page %u at 0x%08x status=0x%02x\n",
1377                                                 pg_no, pg_no * NF_PG_SZ + pg_off, flash_status);
1378                         return -1;
1379                 }
1380         }
1381         return 0;
1382 }
1383
1384 #ifndef NFC_V3_0
1385 // for version V1 and V2 of NFC
1386 static int nfc_read_pg_random(u32 pg_no, u32 pg_off, u32 ecc_force, u32 cs_line,
1387                                                           u32 num_of_nand_chips)
1388 {
1389         u32 t1, ecc = 1;
1390         u8 t2 = 0, t3 = 0, t4 = 0, t5 = 0, t6 = 0, t7 = 0, t8 = 0;
1391         int res = 0;
1392
1393         nfc_printf(NFC_DEBUG_MAX, "%s: reading page %u offset 0x%03x (addr 0x%08llx)\n",
1394                            __FUNCTION__, pg_no, pg_off, (flash_addr_t)pg_no * NF_PG_SZ + pg_off);
1395
1396         if (ecc_force == ECC_FORCE_OFF || pg_off != 0 )
1397                 ecc = 0;
1398
1399         NFC_CMD_INPUT(FLASH_Read_Mode1);
1400         start_nfc_addr_ops(FLASH_Read_Mode1, pg_no, pg_off, 0, 0, num_of_nand_chips);
1401
1402         if (g_is_2k_page || g_is_4k_page) {
1403                 NFC_CMD_INPUT(FLASH_Read_Mode1_LG);
1404         }
1405
1406         NFC_DATA_OUTPUT(RAM_BUF_0, FDO_PAGE_SPARE, ecc);
1407         switch (g_nfc_version & 0xf0) {
1408         case MXC_NFC_V1:
1409                 t1 = readw(ECC_STATUS_RESULT_REG);
1410                 if (g_is_2k_page && PG_2K_DATA_OP_MULTI_CYCLES()) {
1411                         NFC_DATA_OUTPUT(RAM_BUF_1, FDO_PAGE_SPARE, ecc);
1412                         t2 = readw(ECC_STATUS_RESULT_REG);
1413                         NFC_DATA_OUTPUT(RAM_BUF_2, FDO_PAGE_SPARE, ecc);
1414                         t3 = readw(ECC_STATUS_RESULT_REG);
1415                         NFC_DATA_OUTPUT(RAM_BUF_3, FDO_PAGE_SPARE, ecc);
1416                         t4 = readw(ECC_STATUS_RESULT_REG);
1417                 }
1418
1419                 if (ecc && ((t1 & 0xA) != 0x0 || (t2 & 0xA) != 0x0 ||
1420                                         (t3 & 0xA) != 0x0 || (t4 & 0xA) != 0x0)) {
1421                         diag_printf("\n** Error: ECC error page %u, col %u: ECC status=0x%x:0x%x:0x%x:0x%x\n",
1422                                                 pg_no, pg_off, t1, t2, t3, t4);
1423                         res = -1;
1424                         goto out;
1425                 }
1426                 break;
1427         case MXC_NFC_V2:
1428                 if (g_is_2k_page && PG_2K_DATA_OP_MULTI_CYCLES()) {
1429                         NFC_DATA_OUTPUT(RAM_BUF_1, FDO_PAGE_SPARE, ecc);
1430                         NFC_DATA_OUTPUT(RAM_BUF_2, FDO_PAGE_SPARE, ecc);
1431                         NFC_DATA_OUTPUT(RAM_BUF_3, FDO_PAGE_SPARE, ecc);
1432                 }
1433                 if (ecc) {
1434                         t1 = readl(ECC_STATUS_RESULT_REG);
1435                         if (g_is_2k_page || g_is_4k_page) {
1436                                 t2 = (t1 >> 4) & 0xF;
1437                                 t3 = (t1 >> 8) & 0xF;
1438                                 t4 = (t1 >> 12) & 0xF;
1439                                 if (g_is_4k_page) {
1440                                         t5 = (t1 >> 16) & 0xF;
1441                                         t6 = (t1 >> 20) & 0xF;
1442                                         t7 = (t1 >> 24) & 0xF;
1443                                         t8 = (t1 >> 28) & 0xF;
1444                                 }
1445                         }
1446                         if ((t1 = (t1 & 0xF)) > 4 || t2 > 4 || t3 > 4 || t4 > 4 ||
1447                                 t5 > 4 || t6 > 4 || t7 > 4 || t8 > 4) {
1448                                 diag_printf("\n** Error: ECC error reading block %u page %u\n",
1449                                                         pg_no / NF_PG_PER_BLK, pg_no % NF_PG_PER_BLK);
1450                                 diag_printf("   ECC status=%x:%x:%x:%x:%x:%x:%x:%x\n",
1451                                                         t1, t2, t3, t4, t5, t6, t7, t8);
1452                                 res = -1;
1453                                 goto out;
1454                         }
1455                 }
1456                 break;
1457         default:
1458                 diag_printf("Unknown NFC version: %d\n", g_nfc_version);
1459                 return -1;
1460         }
1461         if (g_nfc_version != MXC_NFC_V1) {
1462                 int i;
1463
1464                 for (i = 1; i < NFC_SPARE_BUF_SZ / 16; i++) {
1465                         memcpy((void *)(NAND_SPAR_BUF0 + i * 16),
1466                                    (void *)(NAND_SPAR_BUF0 + i * NFC_SPARE_BUF_SZ), 16);
1467                 }
1468         }
1469 #ifdef BARKER_CODE_SWAP_LOC
1470         // To replace the data at offset BARKER_CODE_SWAP_LOC with the address of the NFC base
1471         // This is needed for certain platforms
1472         if (pg_no == 0) {
1473                 diag_printf("\n[INFO]: copy back data from spare to 0x%x\n", BARKER_CODE_SWAP_LOC);
1474                 writel(readl(NAND_SPAR_BUF0), NFC_BASE + BARKER_CODE_SWAP_LOC);
1475         }
1476 #endif
1477
1478 out:
1479         return res;
1480 }
1481 #endif                  // ifndef NFC_V3_0
1482
1483 /*!
1484  * Read a page's both main and spare area from NAND flash to the internal RAM buffer.
1485  * It always reads data to the internal buffer 0.
1486  *
1487  * @param cs_line       which NAND device is used
1488  * @param pg_no    page number of the device
1489  * @param pg_off        offset within a page
1490  *
1491  * @return                              0 if no error or 1-bit error; -1 otherwise
1492  */
1493 static int nfc_read_page(u32 cs_line, u32 pg_no, u32 pg_off)
1494 {
1495         return nfc_read_pg_random(pg_no, pg_off, ECC_FORCE_ON, cs_line, num_of_nand_chips);
1496 }
1497
1498 static int nfc_write_page(u32 pg_no, u32 pg_off, u32 ecc_force)
1499 {
1500         u16 flash_status;
1501         u32 ecc = NFC_FLASH_CONFIG2_ECC_EN;
1502
1503         diag_printf1("Writing page %u addr 0x%08llx\n",
1504                                  pg_no, (u64)pg_no * NF_PG_SZ + pg_off);
1505         if (ecc_force == ECC_FORCE_OFF || pg_off != 0) {
1506                 ecc = 0;
1507         }
1508
1509         if (g_nfc_version == MXC_NFC_V3) {
1510                 int i;
1511                 u32 v;
1512                 u32 start_point = 0, rba, rba_count = 0;
1513
1514                 // combine the two commands for program
1515                 writel((FLASH_Program << 8) | FLASH_Send_Data, NAND_CMD_REG);
1516
1517                 for (i = start_point; i < num_of_nand_chips; i++) {
1518                         rba = rba_count * ((NF_PG_SZ / num_of_nand_chips) / 512);
1519                         /* Completely wrote out the NFC buffer, break and copy more to the NFC buffer */
1520                         if (rba > 7) {
1521                                 rba_count = 0;
1522                                 break;
1523                         }
1524
1525                         // For ECC
1526                         v = readl(NFC_FLASH_CONFIG2_REG) & ~NFC_FLASH_CONFIG2_ECC_EN;
1527                         // setup config2 register for ECC enable or not
1528                         write_nfc_ip_reg(v | ecc, NFC_FLASH_CONFIG2_REG);
1529
1530                         start_nfc_addr_ops(FLASH_Program, pg_no, pg_off, 0, i, num_of_nand_chips);
1531
1532                         // start auto-program
1533                         writel(NAND_LAUNCH_AUTO_PROG, NAND_LAUNCH_REG);
1534                         if (i < (num_of_nand_chips - i))
1535                                 wait_for_auto_prog_done();
1536                         else
1537                                 wait_op_done();
1538                         pg_off = 0;
1539                         rba_count++;
1540                 }
1541                 start_point = i;
1542                 flash_status = NFC_STATUS_READ();
1543         } else {
1544                 if (g_nfc_version != MXC_NFC_V1) {
1545                         int i;
1546
1547                         for (i = NFC_SPARE_BUF_SZ / 16 - 1; i >= 0; i--) {
1548                                 memcpy((void *)(NAND_SPAR_BUF0 + i * NFC_SPARE_BUF_SZ),
1549                                            (void *)(NAND_SPAR_BUF0 + i * 16), 16);
1550                         }
1551                 }
1552                 NFC_CMD_INPUT(FLASH_Send_Data);
1553                 start_nfc_addr_ops(FLASH_Program, pg_no, pg_off, 0, 0, num_of_nand_chips);
1554
1555                 NFC_DATA_INPUT(RAM_BUF_0, NFC_MAIN_ONLY, ecc);
1556                 if (g_is_4k_page && PG_2K_DATA_OP_MULTI_CYCLES()) {
1557                         diag_printf("4K page with multi cycle write is not supported\n");
1558                         return -1;
1559                 }
1560                 if (g_is_2k_page && PG_2K_DATA_OP_MULTI_CYCLES()) {
1561                         NFC_DATA_INPUT_2k(RAM_BUF_1);
1562                         NFC_DATA_INPUT_2k(RAM_BUF_2);
1563                         NFC_DATA_INPUT_2k(RAM_BUF_3);
1564                 }
1565                 NFC_CMD_INPUT(FLASH_Program);
1566
1567                 flash_status = NFC_STATUS_READ();
1568         }
1569         if ((flash_status & 0x1) != 0) {
1570                 diag_printf("** Error: failed to program page %u at addr 0x%08llx\n",
1571                                         pg_no, (u64)pg_no * NF_PG_SZ + pg_off);
1572                 return -1;
1573         }
1574         return 0;
1575 }
1576
1577 // Read data into buffer
1578 #ifndef MXCFLASH_SELECT_MULTI
1579 int flash_read_buf(void *addr, void *data, int len)
1580 #else
1581 int nandflash_read_buf(void *addr, void *data, int len)
1582 #endif
1583 {
1584         flash_addr_t flash_addr = (unsigned long)addr;
1585         return nfc_read_region(flash_addr, data, len);
1586 }
1587
1588 void mxc_nfc_print_info(void)
1589 {
1590         diag_printf("[0x%08x bytes]: %u blocks of %u pages of %u bytes each.\n",
1591                                 NF_DEV_SZ, NF_BLK_CNT,
1592                                 NF_PG_PER_BLK, NF_PG_SZ);
1593 }
1594
1595 static int mxc_nfc_isbad_bbt(u16 *bbt, int block)
1596 {
1597         cyg_uint8 res;
1598
1599         block <<= 1;
1600         res = (get_byte(bbt, block >> 3) >> (block & 0x06)) & 0x03;
1601         res ^= 0x03;
1602         return res;
1603 }
1604
1605 static int mxc_nfc_search_bbt(struct nand_bbt_descr *td)
1606 {
1607         int i;
1608
1609         td->pages = -1;
1610         for (i = 0; i < NF_BBT_MAX_NR; i++) {
1611                 u32 blk = NF_BLK_CNT - i - 1;
1612                 flash_addr_t addr = blk * NF_BLK_SZ;
1613
1614                 if (nfc_read_pg_random(addr / NF_PG_SZ, addr % NF_PG_SZ,
1615                                                            ECC_FORCE_ON, 0, num_of_nand_chips) != 0) {
1616                         diag_printf("Failed to read bbt page %u at 0x%08llx\n",
1617                                                 (u32)(addr / NF_PG_SZ), addr);
1618                         continue;
1619                 }
1620                 if (check_short_pattern((void *)NAND_SPAR_BUF0, td) == 0) {
1621                         diag_printf1("found BBT at block %u addr %08llx\n", blk, (u64)addr);
1622                         td->pages = blk * NF_PG_PER_BLK;
1623                         td->version = get_byte((void *)NAND_SPAR_BUF0, td->veroffs);
1624                         mark_blk_bad(blk, g_bbt, BLK_RESERVED);
1625                         diag_printf1("Found version %d BBT at block %d (0x%08llx)\n",
1626                                                  td->version, td->pages / NF_PG_PER_BLK,
1627                                                  (u64)td->pages * NF_PG_SZ);
1628                         return 0;
1629                 }
1630         }
1631         return 1;
1632 }
1633
1634 /*
1635  * Look for the BBT depending on the passed-in lowlevel value.
1636  * @param       lowlevel        If true, then it does a low level scan based on factory
1637  *                                              marked BI(block info) field with ECC off to decide if a
1638  *                                              block is bad.
1639  *                                              If false, then it checks to see if an existing BBT in the
1640  *                                              flash or not. If not, then it returns -1. If yes, it will
1641  *                                              prints out the number of bad blocks.
1642  *
1643  * @return      number of bad blocks for the whole nand flash
1644  *
1645  * Note: For a brand new flash, this function has to be called with
1646  *               lowlevel=true.
1647  *
1648  *
1649  */
1650 static int mxc_nfc_scan(bool lowlevel)
1651 {
1652         u32 bad = 0, i;
1653         u32 count1 = 0, count2 = 0;
1654         u8 *buf = NULL;
1655         struct nand_bbt_descr *td = g_mxc_nfc_bbt_main_descr;
1656         struct nand_bbt_descr *md = g_mxc_nfc_bbt_mirror_descr;
1657
1658         nfc_printf(NFC_DEBUG_MAX, "%s()\n", __FUNCTION__);
1659         mxc_nfc_scan_done = 0;
1660
1661         if (g_nfc_debug_measure) {
1662                 count1 = hal_timer_count();
1663         }
1664         // read out the last 4 blocks for marker
1665         // need to keep where is the td and md block number
1666         if (!lowlevel) {
1667                 struct nand_bbt_descr *bd;
1668
1669                 diag_printf1("Searching for BBT in the flash ...\n");
1670                 if (mxc_nfc_search_bbt(td) != 0) {
1671                         diag_printf("No main BBT found in flash\n");
1672                 }
1673                 if (md && mxc_nfc_search_bbt(md) != 0) {
1674                         diag_printf("No mirror BBT found in flash\n");
1675                 }
1676                 if (td->pages == -1 && (!md || md->pages == -1)) {
1677                         diag_printf("No BBT found. Need to do \"nand scan\" first\n");
1678                         return -1;
1679                 }
1680                 if (td->pages >= 0 && (md == NULL || md->version <= td->version)) {
1681                         bd = td;
1682                         nfc_printf(NFC_DEBUG_MIN, "Using normal bbt at page %d\n", bd->pages);
1683                 } else if (md != NULL && md->pages >= 0) {
1684                         bd = md;
1685                         nfc_printf(NFC_DEBUG_MIN, "Using mirror bbt at page %d\n", bd->pages);
1686                 } else {
1687                         diag_printf("** Error: Failed to read bbt from flash\n");
1688                         return -1;
1689                 }
1690                 nfc_read_page(0, bd->pages, 0);
1691                 for (i = 0; i < NF_BLK_CNT; i++) {
1692                         int res = mxc_nfc_isbad_bbt((u16 *)NAND_MAIN_BUF0, i);
1693                         if (res) {
1694                                 // construct the bad block table
1695                                 mark_blk_bad(i, g_bbt, res);
1696                                 bad++;
1697                         }
1698                 }
1699                 buf = g_bbt;
1700         } else {
1701                 diag_printf("Doing low level scan to construct BBT\n");
1702                 for (i = 0; i < NF_BLK_CNT; i++) {
1703                         int res = nfc_is_badblock(i, buf);
1704                         if (res) {
1705                                 // construct the bad block table
1706                                 if (!buf)
1707                                         mark_blk_bad(i, g_bbt, res);
1708                                 bad++;
1709                         }
1710                 }
1711         }
1712         diag_printf1("Total bad blocks: %d\n", bad);
1713         if (g_nfc_debug_measure) {
1714                 count2 = hal_timer_count();
1715                 diag_printf("counter1=0x%x, counter2=0x%x, diff=0x%x (%u usec)\n",
1716                                         count1, count2, count2 - count1,
1717                                         (count2 - count1) * 1000000 / 32768);
1718         }
1719         mxc_nfc_scan_done = 1;
1720         return bad;
1721 }
1722
1723 ////////////////////////// "nand" commands support /////////////////////////
1724 // Image management functions
1725 local_cmd_entry("info",
1726                                 "Show nand flash info (number of good/bad blocks)",
1727                                 "",
1728                                 nand_info,
1729                                 NAND_cmds
1730                    );
1731
1732 local_cmd_entry("show",
1733                                 "Show a page main/spare areas or spare area only (-s)",
1734                                 "-f <raw page address> [-s]",
1735                                 nand_show,
1736                                 NAND_cmds
1737                    );
1738
1739 local_cmd_entry("read",
1740                                 "Read data from nand flash into RAM",
1741                                 "-f <raw addr> -b <mem_load_addr> -l <byte len> [-c <col>]\n"
1742                                 "      Note -c is only for 2K-page for value <0, 2048+64-1>",
1743                                 nand_read,
1744                                 NAND_cmds
1745                    );
1746
1747 local_cmd_entry("write",
1748                                 "Write data from RAM into nand flash",
1749                                 "-f <raw address> -b <memory_address> -l <image_length> [-c <col_addr>]",
1750                                 nand_write,
1751                                 NAND_cmds
1752                    );
1753
1754 local_cmd_entry("erase",
1755                                 "Erase nand flash contents",
1756                                 "-f <raw address> -l <length> [-o]\n"
1757                                 "             -o: force erase (even for bad blocks)",
1758                                 nand_erase,
1759                                 NAND_cmds
1760                    );
1761
1762 local_cmd_entry("scan",
1763                                 "Scan bad blocks and may also save bad block table into the NAND flash.",
1764                                 "[-o] [-r]\n"
1765                                 "No argument: save existing bad block table (BBT)\n"
1766                                 "            -r: re-scan with ECC off and save BBT -- for brand NEW flash\n"
1767                                 "            -o: force erase all, reconstruct BBT (no ECC) and save BBT -- for development.",
1768                                 nand_scan,
1769                                 NAND_cmds
1770                    );
1771
1772 local_cmd_entry("debug",
1773                                 "Various NAND debug features ",
1774                                 "<0> no debug messages <default>\n"
1775                                 "             <1> min debug messages\n"
1776                                 "             <2> med debug messages\n"
1777                                 "             <3> max debug messages\n"
1778                                 "             <4> enable(default)/disable h/w ECC for both r/w\n"
1779                                 "             <5> disable(default)/enalbe spare-only read\n"
1780                                 "             <9> enable/disable measurement\n"
1781                                 "             no parameter - display current debug setup",
1782                                 nand_debug_fun,
1783                                 NAND_cmds
1784                                 );
1785
1786 local_cmd_entry("bad",
1787                                 "Mark bad block in BBT",
1788                                 "[-f <raw address>] [-b <block number>] [-c]\n"
1789                                 "           -c: clear bad block mark\n"
1790                                 "           -f and -b are mutually exclusive",
1791                                 nand_bad,
1792                                 NAND_cmds
1793                                 );
1794
1795 // Define table boundaries
1796 CYG_HAL_TABLE_BEGIN( __NAND_cmds_TAB__, NAND_cmds);
1797 CYG_HAL_TABLE_END( __NAND_cmds_TAB_END__, NAND_cmds);
1798
1799 extern struct cmd __NAND_cmds_TAB__[], __NAND_cmds_TAB_END__;
1800
1801 // CLI function
1802 static cmd_fun do_nand_cmds;
1803 RedBoot_nested_cmd("nand",
1804                    "Utility function to NAND flash using raw address",
1805                    "{cmds}",
1806                    do_nand_cmds,
1807                    __NAND_cmds_TAB__, &__NAND_cmds_TAB_END__
1808                   );
1809
1810 static void nand_usage(char *why)
1811 {
1812         diag_printf("*** invalid 'nand' command: %s\n", why);
1813         cmd_usage(__NAND_cmds_TAB__, &__NAND_cmds_TAB_END__, "nand ");
1814 }
1815
1816 static u32 curr_addr;
1817 static void nand_show(int argc, char *argv[])
1818 {
1819         u32 ra;
1820         bool flash_addr_set = false;
1821         bool spar_only = false;
1822         struct option_info opts[2];
1823
1824         init_opts(&opts[0], 'f', true, OPTION_ARG_TYPE_NUM,
1825                           &ra, &flash_addr_set, "NAND FLASH memory byte address");
1826         init_opts(&opts[1], 's', false, OPTION_ARG_TYPE_FLG,
1827                           &spar_only, NULL, "Spare only");
1828
1829         if (!scan_opts(argc, argv, 2, opts, 2, 0, 0, 0)) {
1830                 return;
1831         }
1832         if (!flash_addr_set) {
1833                 ra = curr_addr;
1834                 curr_addr += NF_PG_SZ;
1835         } else {
1836                 curr_addr = ra;
1837         }
1838
1839         if (ra % NF_PG_SZ) {
1840                 diag_printf("** Error: flash address must be page aligned\n");
1841                 return;
1842         }
1843
1844         ra &= MXC_NAND_ADDR_MASK;
1845         if (nfc_is_badblock(OFFSET_TO_BLOCK(ra), g_bbt)) {
1846                 diag_printf("This is a bad block\n");
1847         }
1848
1849         print_page(ra, spar_only);
1850 }
1851
1852 /*!
1853  * For low level nand read command. It doesn't check for bad block or not
1854  */
1855 static void nand_read(int argc, char *argv[])
1856 {
1857         int len;
1858         u32 mem_addr, ra, col, i, pg_no, pg_off;
1859         bool mem_addr_set = false;
1860         bool flash_addr_set = false;
1861         bool length_set = false;
1862         bool col_set = false;
1863         struct option_info opts[4];
1864         int j = 0;
1865         bool ecc_status = g_ecc_enable;
1866
1867         init_opts(&opts[0], 'b', true, OPTION_ARG_TYPE_NUM,
1868                           &mem_addr, &mem_addr_set, "memory base address");
1869         init_opts(&opts[1], 'f', true, OPTION_ARG_TYPE_NUM,
1870                           &ra, &flash_addr_set, "FLASH memory base address");
1871         init_opts(&opts[2], 'l', true, OPTION_ARG_TYPE_NUM,
1872                           &len, &length_set, "image length [in FLASH]");
1873         init_opts(&opts[3], 'c', true, OPTION_ARG_TYPE_NUM,
1874                           &col, &col_set, "column addr");
1875
1876         if (!scan_opts(argc, argv, 2, opts, 4, 0, 0, 0)) {
1877                 nand_usage("invalid arguments");
1878                 return;
1879         }
1880
1881         if (ra % NF_PG_SZ) {
1882                 diag_printf("** Error: flash address must be page aligned\n");
1883                 return;
1884         }
1885
1886         if (!mem_addr_set || !flash_addr_set || !length_set) {
1887                 nand_usage("** Error: required parameter missing");
1888                 return;
1889         }
1890         if ((mem_addr < (CYG_ADDRESS)ram_start) ||
1891                 ((mem_addr+len) >= (CYG_ADDRESS)ram_end)) {
1892                 diag_printf("** WARNING: RAM address: 0x%08x may be invalid\n", mem_addr);
1893                 diag_printf("   valid range is 0x%p-0x%p\n", ram_start, ram_end);
1894         }
1895
1896         if (col_set) {
1897                 diag_printf("Random read at page %u, column 0x%04x\n",
1898                                         ra / NF_PG_SZ, col);
1899
1900                 if (g_is_2k_page || g_is_4k_page) {
1901                         g_ecc_enable = false;
1902                 }
1903                 nfc_read_pg_random(ra / NF_PG_SZ, col, ECC_FORCE_OFF, 0, num_of_nand_chips);
1904                 if (g_is_2k_page || g_is_4k_page) {
1905                         g_ecc_enable = ecc_status;
1906                 }
1907                 nfc_buf_read((void *)mem_addr, NAND_MAIN_BUF0, NF_PG_SZ);
1908                 return;
1909         }
1910
1911         // ensure integer multiple of page size
1912         len = (len + NF_PG_SZ - 1) & ~(NF_PG_SZ - 1);
1913         ra &= MXC_NAND_ADDR_MASK;
1914         do {
1915                 if (OFFSET_TO_BLOCK(ra) > (NF_BLK_CNT - 1)) {
1916                         diag_printf("\n** Error: flash address: 0x%08x out of range\n", ra);
1917                         return;
1918                 }
1919                 pg_no = ra / NF_PG_SZ;
1920                 pg_off = ra % NF_PG_SZ;
1921                 for (i = 0; i < num_of_nand_chips; i++) {
1922                         if (nfc_read_page(i, pg_no, pg_off) != 0) {
1923                                 diag_printf("\n** Error: uncorrectable ECC at addr 0x%08x\n", ra);
1924                                 diag_printf("use 'nand bad -b %u' to mark this block in BBT\n",
1925                                                         pg_no / NF_PG_PER_BLK);
1926                         }
1927                         if ((j++ % 0x20) == 0)
1928                                 diag_printf("\n%s 0x%08x: ", __FUNCTION__, ra);
1929                         diag_printf(".");
1930
1931                         nfc_buf_read((void *)mem_addr, NAND_MAIN_BUF0, NF_PG_SZ / num_of_nand_chips);
1932
1933                         ra += NF_PG_SZ / num_of_nand_chips;
1934                         mem_addr += NF_PG_SZ / num_of_nand_chips;
1935                         len -= NF_PG_SZ / num_of_nand_chips;
1936                         pg_off = 0;
1937                 }
1938         } while (len > 0);
1939         diag_printf("\n");
1940 }
1941
1942 static void nand_write(int argc, char *argv[])
1943 {
1944         int len, len_st, j = 0;
1945         u32 mem_addr, mem_addr_st, ra, col;
1946         bool mem_addr_set = false;
1947         bool flash_addr_set = false;
1948         bool length_set = false;
1949         bool col_set = false;
1950         struct option_info opts[4];
1951         bool ecc_status = g_ecc_enable;
1952
1953         init_opts(&opts[0], 'b', true, OPTION_ARG_TYPE_NUM,
1954                           &mem_addr, &mem_addr_set, "memory base address");
1955         init_opts(&opts[1], 'f', true, OPTION_ARG_TYPE_NUM,
1956                           &ra, &flash_addr_set, "FLASH memory base address");
1957         init_opts(&opts[2], 'l', true, OPTION_ARG_TYPE_NUM,
1958                           &len, &length_set, "image length [in FLASH]");
1959         init_opts(&opts[3], 'c', true, OPTION_ARG_TYPE_NUM,
1960                           &col, &col_set, "column addr");
1961         if (!scan_opts(argc, argv, 2, opts, 4, 0, 0, 0)) {
1962                 nand_usage("invalid arguments");
1963                 return;
1964         }
1965
1966         if (!mem_addr_set || !flash_addr_set || !length_set) {
1967                 nand_usage("required parameter missing");
1968                 return;
1969         }
1970
1971         if ((mem_addr < (CYG_ADDRESS)ram_start) ||
1972                 ((mem_addr+len) >= (CYG_ADDRESS)ram_end)) {
1973                 diag_printf("** WARNING: RAM address: %p may be invalid\n", (void *)mem_addr);
1974                 diag_printf("   valid range is %p-%p\n", (void *)ram_start, (void *)ram_end);
1975         }
1976
1977         if (col_set) {
1978                 diag_printf("Random write at page %u, column %u\n", ra / NF_PG_SZ, col);
1979
1980                 if (g_is_2k_page || g_is_4k_page) {
1981                         g_ecc_enable = false;
1982                 }
1983                 nfc_write_pg_random(ra / NF_PG_SZ, col, (u8 *)mem_addr, 0);
1984                 if (g_is_2k_page || g_is_4k_page) {
1985                         g_ecc_enable = ecc_status;
1986                 }
1987                 return;
1988         }
1989
1990         if ((ra % NF_PG_SZ) != 0) {
1991                 diag_printf("** Error: flash address must be page aligned\n");
1992                 return;
1993         }
1994
1995         mem_addr_st = mem_addr;
1996         len_st = len;
1997         ra &= MXC_NAND_ADDR_MASK;
1998         do {
1999                 if (OFFSET_TO_BLOCK(ra) > (NF_BLK_CNT - 1)) {
2000                         diag_printf("\nOut of range: addr=0x%08x\n", ra);
2001                         return;
2002                 }
2003                 if (nfc_is_badblock(OFFSET_TO_BLOCK(ra), g_bbt)) {
2004                         diag_printf("\nSkipping bad block %u at addr=0x%08llx\n",
2005                                                 OFFSET_TO_BLOCK(ra), (u64)ra);
2006                         ra = (OFFSET_TO_BLOCK(ra) + 1) *  NF_BLK_SZ;
2007                         continue;
2008                 }
2009
2010                 if ((ra % NF_BLK_SZ) == 0) {
2011                          mem_addr_st = mem_addr;
2012                          len_st = len;
2013                 }
2014                 if (nfc_write_pg_random(ra / NF_PG_SZ, ra % NF_PG_SZ, (u8 *)mem_addr, 0) != 0) {
2015                         if (g_nfc_debug_level >= NFC_DEBUG_DEF) {
2016                                 diag_printf("\nWarning %d: program error at addr 0x%x\n", __LINE__, ra);
2017                         }
2018                         mark_blk_bad(OFFSET_TO_BLOCK(ra), g_bbt, BLK_BAD_RUNTIME);
2019                         ra = (OFFSET_TO_BLOCK(ra) + 1) *  NF_BLK_SZ; //make sure block size aligned
2020                         mem_addr = mem_addr_st; // rewind to blocl boundary
2021                         len = len_st;
2022                         continue;
2023                 }
2024                 if ((j++ % 0x20) == 0)
2025                         diag_printf("\nProgramming 0x%08x: ", ra);
2026                 diag_printf(".");
2027
2028                 len -= NF_PG_SZ;
2029                 ra += NF_PG_SZ;
2030                 mem_addr += NF_PG_SZ;
2031         } while (len > 0);
2032         diag_printf("\n");
2033 }
2034
2035 void nand_debug_fun(int argc, char *argv[])
2036 {
2037         int opt;
2038         const char *dbg_lvl_str;
2039
2040         if (argc == 3) {
2041                 opt = argv[2][0] - '0';
2042                 switch (opt) {
2043                 case 0:
2044                         g_nfc_debug_level = NFC_DEBUG_NONE;
2045                         break;
2046                 case 1:
2047                         g_nfc_debug_level = NFC_DEBUG_MIN;
2048                         break;
2049                 case 2:
2050                         g_nfc_debug_level = NFC_DEBUG_MED;
2051                         break;
2052                 case 3:
2053                         g_nfc_debug_level = NFC_DEBUG_MAX;
2054                         break;
2055                 case 4:
2056                         g_ecc_enable = g_ecc_enable? false: true;
2057                         break;
2058                 case 5:
2059                         // toggle g_spare_only_read_ok
2060                         g_spare_only_read_ok = g_spare_only_read_ok? false: true;
2061                         break;
2062                 case 9:
2063                         g_nfc_debug_measure = g_nfc_debug_measure? false: true;
2064                         break;
2065
2066                 default:
2067                         diag_printf("%s(%s) not supported\n", __FUNCTION__, argv[2]);
2068                 }
2069         }
2070         switch (g_nfc_debug_level) {
2071         case NFC_DEBUG_NONE:
2072                 dbg_lvl_str = "none";
2073                 break;
2074         case NFC_DEBUG_MIN:
2075                 dbg_lvl_str = "min";
2076                 break;
2077         case NFC_DEBUG_MED:
2078                 dbg_lvl_str = "med";
2079                 break;
2080         case NFC_DEBUG_MAX:
2081                 dbg_lvl_str = "max";
2082                 break;
2083         default:
2084                 dbg_lvl_str = "invalid";
2085         }
2086         diag_printf("Current debug options are:\n");
2087         diag_printf("    h/w ECC: %s\n", g_ecc_enable ? "on" : "off");
2088         diag_printf("    sp-only read: %s\n", g_spare_only_read_ok ? "on" : "off");
2089         diag_printf("    measurement: %s\n", g_nfc_debug_measure ? "on" : "off");
2090         diag_printf("    message level: %s\n", dbg_lvl_str);
2091 }
2092
2093 static void nand_erase(int argc, char *argv[])
2094 {
2095         u32 len, ra;
2096         bool faddr_set = false;
2097         bool force_erase_set = false;
2098         bool length_set = false;
2099         struct option_info opts[4];
2100
2101         init_opts(&opts[0], 'f', true, OPTION_ARG_TYPE_NUM,
2102                   &ra, &faddr_set, "FLASH memory base address");
2103         init_opts(&opts[1], 'l', true, OPTION_ARG_TYPE_NUM,
2104                   &len, &length_set, "length in bytes");
2105         init_opts(&opts[2], 'o', false, OPTION_ARG_TYPE_FLG,
2106                   &force_erase_set, &force_erase_set, "force erases block");
2107
2108         if (!scan_opts(argc, argv, 2, opts, 4, 0, 0, 0)) {
2109                 nand_usage("invalid arguments");
2110                 return;
2111         }
2112
2113         if (!faddr_set || !length_set) {
2114                 nand_usage("missing argument");
2115                 return;
2116         }
2117         if ((ra % NF_BLK_SZ) != 0 ||
2118                 (len % NF_BLK_SZ) != 0 || len == 0) {
2119                 diag_printf("Address or length is not block aligned or length is zero!\n");
2120                 diag_printf("Block size is 0x%x\n", NF_BLK_SZ);
2121                 return;
2122         }
2123
2124         if (!verify_action("About to erase 0x%x bytes from nand offset 0x%x\n", len, ra)) {
2125                 diag_printf("** Aborted\n");
2126                 return;
2127         }
2128
2129         // now ra is block aligned
2130         if (force_erase_set == true) {
2131                 diag_printf("Force erase ...");
2132                 nfc_erase_region(ra, len, 0, 1);
2133                 diag_printf("\n");
2134         } else {
2135                 nfc_erase_region(ra, len, 1, 1);
2136         }
2137         diag_printf("\n");
2138 }
2139
2140 extern void romupdate(int argc, char *argv[]);
2141 static void nand_scan(int argc, char *argv[])
2142 {
2143         bool force_erase = false;
2144         bool force_rescan = false;
2145         struct option_info opts[2];
2146
2147         init_opts(&opts[0], 'o', false, OPTION_ARG_TYPE_FLG,
2148                   &force_erase, NULL, "force erases block first");
2149
2150         init_opts(&opts[1], 'r', false, OPTION_ARG_TYPE_FLG,
2151                   &force_rescan, NULL, "force low level re-scan");
2152
2153         if (!scan_opts(argc, argv, 2, opts, 2, 0, 0, 0)) {
2154                 nand_usage("invalid arguments");
2155                 return;
2156         }
2157
2158         if (!force_erase && !force_rescan && !mxc_nfc_scan_done) {
2159                 diag_printf("Need to build BBT first with \"nand scan [-o|-r]\"\n");
2160                 return;
2161         }
2162         if (force_erase) {
2163                 void *bbt = g_bbt;
2164
2165                 diag_printf("Force erase first ...\n");
2166                 g_bbt = NULL;
2167                 // do force erase, skipping bad blocks. After this call, g_bbt should be re-built
2168                 // for the whole NAND flash.
2169                 if (nfc_erase_region(0, NF_DEV_SZ, true, false) != 0) {
2170                         g_bbt = bbt;
2171                         return;
2172                 }
2173                 g_bbt = bbt;
2174                 mxc_nfc_scan_done = 0;
2175                 diag_printf("\n");
2176         }
2177         if (force_rescan) {
2178                 diag_printf("Force re-scan ...\n");
2179                 memset(g_bbt, 0, g_bbt_sz);
2180                 mxc_nfc_scan(true);
2181         }
2182         // program g_bbt into the flash
2183         diag_printf("Writing BBT to flash\n");
2184         if (program_bbt_to_flash() != 0) {
2185                 diag_printf("Error: Failed to write BBT to flash\n");
2186         }
2187         if (force_erase) {
2188                 romupdate(0, NULL);
2189         }
2190 }
2191
2192 static void nand_info(int argc, char *argv[])
2193 {
2194         u32 i, j = 0;
2195
2196         if (nand_flash_index == -1) {
2197                 diag_printf("Can't find valid NAND flash: %d\n", __LINE__);
2198                 return;
2199         }
2200
2201         diag_printf("\nType:\t\t %s\n", NF_VEND_INFO);
2202         diag_printf("Total size:\t 0x%08x bytes (%d MiB)\n", NF_DEV_SZ, NF_DEV_SZ / SZ_1M);
2203         diag_printf("Total blocks:\t 0x%x (%d)\n", NF_BLK_CNT, NF_BLK_CNT);
2204         diag_printf("Block size:\t 0x%x (%d)\n", NF_BLK_SZ, NF_BLK_SZ);
2205         diag_printf("Page size:\t 0x%x (%d)\n", NF_PG_SZ, NF_PG_SZ);
2206         diag_printf("Spare size:\t 0x%x (%d)\n", NF_SPARE_SZ, NF_SPARE_SZ);
2207         diag_printf("Pages per block: 0x%x (%d)\n", NF_PG_PER_BLK, NF_PG_PER_BLK);
2208
2209         if (mxc_nfc_scan(false) == -1) {
2210                 return;
2211         }
2212         diag_printf("\n");
2213         for (i = 0; i < NF_BLK_CNT; i++) {
2214                 int res = nfc_is_badblock(i, g_bbt);
2215                 if (res & ~BLK_RESERVED) {
2216                         diag_printf("block %d at offset 0x%08x is a %s bad block\n",
2217                                                 i, i * NF_BLK_SZ, res == BLK_BAD_FACTORY ? "factory" : "runtime");
2218                         j++;
2219                 }
2220         }
2221         diag_printf("==================================\n");
2222         diag_printf("Found %d bad block(s) out of %d\n", j, i);
2223 }
2224
2225 static void nand_bad(int argc, char *argv[])
2226 {
2227         u32 ra;
2228         u32 block;
2229         bool ra_set = false;
2230         bool block_set = false;
2231         bool clear = false;
2232         struct option_info opts[3];
2233         int bad;
2234
2235         init_opts(&opts[0], 'f', true, OPTION_ARG_TYPE_NUM,
2236                           &ra, &ra_set, "FLASH memory base address");
2237         init_opts(&opts[1], 'b', true, OPTION_ARG_TYPE_NUM,
2238                           &block, &block_set, "block number");
2239         init_opts(&opts[2], 'c', false, OPTION_ARG_TYPE_FLG,
2240                           &clear, NULL, "clear bad block marker");
2241
2242         if (!scan_opts(argc, argv, 2, opts, NUM_ELEMS(opts), NULL, 0, NULL)) {
2243                 nand_usage("invalid arguments");
2244                 return;
2245         }
2246
2247         if (!ra_set && !block_set) {
2248                 nand_usage("missing argument");
2249                 return;
2250         }
2251         if (ra_set && block_set) {
2252                 nand_usage("options -f and -b are mutually exclusive");
2253                 return;
2254         } else if (ra_set) {
2255                 block = OFFSET_TO_BLOCK(ra & MXC_NAND_ADDR_MASK);
2256         } else {
2257                 ra = BLOCK_TO_OFFSET(block) + (unsigned long)flash_info.start;
2258         }
2259         if ((ra % NF_BLK_SZ) != 0) {
2260                 diag_printf("Address is not block aligned!\n");
2261                 diag_printf("Block size is 0x%08x\n", NF_BLK_SZ);
2262                 return;
2263         }
2264
2265         bad = nfc_is_badblock(block, g_bbt);
2266         if ((bad && !clear) || (!bad && clear)) {
2267                 diag_printf("block %5u at address 0x%08x is already %s\n",
2268                                         block, ra, bad ? "bad" : "good");
2269                 return;
2270         }
2271         if (clear && bad != BLK_BAD_RUNTIME) {
2272                 diag_printf("Refusing to mark a factory bad block as good!\n");
2273                 return;
2274         }
2275         if (!verify_action("Mark block %u at address 0x%08x %s in BBT",
2276                                            block, ra, clear ? "good" : "bad")) {
2277                 diag_printf("** Aborted\n");
2278                 return;
2279         }
2280
2281         nfc_printf(NFC_DEBUG_MIN, "Marking block %5u at 0x%08x %s\n",
2282                            block, ra, clear ? "good" : "bad");
2283         mark_blk_bad(block, g_bbt, clear ? 0 : BLK_BAD_RUNTIME);
2284         mxc_nfc_update_bbt(g_mxc_nfc_bbt_main_descr,
2285                                            g_mxc_nfc_bbt_mirror_descr);
2286 }
2287
2288 static void do_nand_cmds(int argc, char *argv[])
2289 {
2290         struct cmd *cmd;
2291
2292         if (!mxcnfc_init_ok) {
2293 #ifdef CYGHWR_DEVS_FLASH_MXC_MULTI
2294                 diag_printf("Warning: NAND flash hasn't been initialized. Try \"factive nand\" first\n\n");
2295 #else
2296                 diag_printf("Error: NAND flash hasn't been initialized\n");
2297 #endif
2298                 return;
2299         }
2300
2301         if (argc < 2) {
2302                 nand_usage("too few arguments");
2303                 return;
2304         }
2305
2306         if ((cmd = cmd_search(__NAND_cmds_TAB__, &__NAND_cmds_TAB_END__,
2307                                                   argv[1])) != NULL) {
2308                 cmd->fun(argc, argv);
2309                 return;
2310         }
2311         nand_usage("unrecognized command");
2312 }
2313
2314 /*!
2315  * Display a memory region by 16-bit words
2316  * @param pkt   pointer to the starting address of the memory
2317  * @param len   byte length of the buffer to be displayed
2318  */
2319 static void print_pkt_16(u16 *pkt, u32 len)
2320 {
2321         diag_printf("******************** %d bytes********************\n", len);
2322         u32 i = 0, tempLen = (len + 1) / 2;
2323
2324         while (tempLen != 0) {
2325                 if (tempLen >= 8) {
2326                         diag_printf("[%03x-%03x] ", i * 2, (i * 2) + 14);
2327                         diag_printf("%04x %04x %04x %04x %04x %04x %04x %04x\n",
2328                                                 pkt[i], pkt[i + 1], pkt[i + 2], pkt[i + 3],
2329                                                 pkt[i + 4], pkt[i + 5], pkt[i + 6], pkt[i + 7]);
2330                         tempLen -= 8;
2331                         i += 8;
2332                 } else {
2333                         if (tempLen != 0) {
2334                                 diag_printf("[%03x-%03x]", i * 2, (i + tempLen) * 2);
2335                                 while (tempLen-- != 0) {
2336                                         diag_printf(" %04x", pkt[i++]);
2337                                 }
2338                                 diag_printf("\n");
2339                         }
2340                         diag_printf("*************************************************\n");
2341                         return;
2342                 }
2343         }
2344 }
2345
2346 // addr = starting byte address within NAND flash
2347 static void print_page(u32 addr, bool spare_only)
2348 {
2349         u32 i, pg_no, pg_off;
2350         u32 blk_num = OFFSET_TO_BLOCK(addr), pg_num = OFFSET_TO_PAGE(addr);
2351
2352         if (addr % NF_PG_SZ) {
2353                 diag_printf("Non page-aligned read not supported here: 0x%x\n", addr);
2354                 return;
2355         }
2356         if (spare_only) {
2357                 diag_printf("Error %d: Not supported\n", __LINE__);
2358                 return;
2359         } else {
2360                 pg_no = addr / NF_PG_SZ;
2361                 pg_off = addr % NF_PG_SZ;
2362                 for (i = 0; i < num_of_nand_chips; i++) {
2363                         if (nfc_read_page(i, pg_no, pg_off) != 0) {
2364                                 diag_printf("Error %d: uncorrectable. But still printing ...\n", __LINE__);
2365                         }
2366                         pg_off = 0;
2367                         diag_printf("\n============ Printing block(%d) page(%d)  ==============\n",
2368                                                                   blk_num, pg_num);
2369
2370                         diag_printf("<<<<<<<<< spare area >>>>>>>>>\n");
2371                         print_pkt_16((u16*)NAND_SPAR_BUF0, NF_SPARE_SZ);
2372
2373                         if (!spare_only) {
2374                                 diag_printf("<<<<<<<<< main area >>>>>>>>>\n");
2375                                 print_pkt_16((u16*)NAND_MAIN_BUF0, NF_PG_SZ / num_of_nand_chips);
2376                         }
2377
2378                         diag_printf("\n");
2379                 }
2380         }
2381 }