packages/devs/flash/intel/28fxxx/v2_0/include/flash_28fxxx_parts.inl

   1 #ifndef CYGONCE_DEVS_FLASH_INTEL_28FXXX_PARTS_INL
   2 #define CYGONCE_DEVS_FLASH_INTEL_28FXXX_PARTS_INL
   3 //==========================================================================
   4 //
   5 //      flash_28fxxx_parts.inl
   6 //
   7 //      Intel 28Fxxx part descriptors
   8 //
   9 //==========================================================================
  10 //####ECOSGPLCOPYRIGHTBEGIN####
  11 // -------------------------------------------
  12 // This file is part of eCos, the Embedded Configurable Operating System.
  13 // Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
  14 // Copyright (C) 2002 Gary Thomas
  15 //
  16 // eCos is free software; you can redistribute it and/or modify it under
  17 // the terms of the GNU General Public License as published by the Free
  18 // Software Foundation; either version 2 or (at your option) any later version.
  19 //
  20 // eCos is distributed in the hope that it will be useful, but WITHOUT ANY
  21 // WARRANTY; without even the implied warranty of MERCHANTABILITY or
  22 // FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  23 // for more details.
  24 //
  25 // You should have received a copy of the GNU General Public License along
  26 // with eCos; if not, write to the Free Software Foundation, Inc.,
  27 // 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
  28 //
  29 // As a special exception, if other files instantiate templates or use macros
  30 // or inline functions from this file, or you compile this file and link it
  31 // with other works to produce a work based on this file, this file does not
  32 // by itself cause the resulting work to be covered by the GNU General Public
  33 // License. However the source code for this file must still be made available
  34 // in accordance with section (3) of the GNU General Public License.
  35 //
  36 // This exception does not invalidate any other reasons why a work based on
  37 // this file might be covered by the GNU General Public License.
  38 //
  39 // Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
  40 // at http://sources.redhat.com/ecos/ecos-license/
  41 // -------------------------------------------
  42 //####ECOSGPLCOPYRIGHTEND####
  43 //==========================================================================
  44 //#####DESCRIPTIONBEGIN####
  45 //
  46 // Author(s):    jskov
  47 // Contributors: jskov, gthomas
  48 // Date:         2001-08-07
  49 // Purpose:
  50 // Description:  Intel 28Fxxx part descriptors
  51 // Usage:        Should be included from the flash_28fxxx.inl file only.
  52 //
  53 // FIXME:        Add configury for selecting bottom/top bootblocks
  54 //####DESCRIPTIONEND####
  55 //
  56 //==========================================================================
  57
  58 #if CYGNUM_FLASH_WIDTH == 8
  59 #ifdef CYGHWR_DEVS_FLASH_SHARP_LH28F016SCT_Z4
  60     {   // LH28F016SCT_Z4
  61         device_id  : FLASHWORD(0xA0),
  62         block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
  63         block_count: 32,
  64         device_size: 0x200000 * CYGNUM_FLASH_INTERLEAVE,
  65         base_mask  : ~(0x200000 * CYGNUM_FLASH_INTERLEAVE - 1),
  66         buffered_w : false,
  67         locking    : true,
  68         bootblock  : false,
  69         banked     : false
  70     },
  71 #endif
  72
  73 #ifdef CYGHWR_DEVS_FLASH_SHARP_LH28F016SCT_95
  74     {   // LH28F016SCT_95
  75         device_id  : FLASHWORD(0xAA),
  76         block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
  77         block_count: 32,
  78         device_size: 0x200000 * CYGNUM_FLASH_INTERLEAVE,
  79         base_mask  : ~(0x200000 * CYGNUM_FLASH_INTERLEAVE - 1),
  80         buffered_w : false,
  81         locking    : true,
  82         bootblock  : false,
  83         banked     : false
  84     },
  85 #endif
  86
  87 #else // 16 bit devices
  88
  89 #ifdef CYGHWR_DEVS_FLASH_INTEL_28F320C3
  90     {   // 28F320C3-T
  91         device_id  : FLASHWORD(0x88c4),
  92         block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
  93         block_count: 64,
  94         device_size: 0x400000 * CYGNUM_FLASH_INTERLEAVE,
  95         base_mask  : ~(0x400000 * CYGNUM_FLASH_INTERLEAVE - 1),
  96         locking    : true,
  97         buffered_w : false,
  98         bootblock  : true,
  99         bootblocks : { 0x3f0000 * CYGNUM_FLASH_INTERLEAVE,
 100                        0x002000 * CYGNUM_FLASH_INTERLEAVE,
 101                        0x002000 * CYGNUM_FLASH_INTERLEAVE,
 102                        0x002000 * CYGNUM_FLASH_INTERLEAVE,
 103                        0x002000 * CYGNUM_FLASH_INTERLEAVE,
 104                        0x002000 * CYGNUM_FLASH_INTERLEAVE,
 105                        0x002000 * CYGNUM_FLASH_INTERLEAVE,
 106                        0x002000 * CYGNUM_FLASH_INTERLEAVE,
 107                        0x002000 * CYGNUM_FLASH_INTERLEAVE,
 108                        0
 109                      },
 110         banked     : false
 111     },
 112     {   // 28F320C3-B
 113         device_id  : FLASHWORD(0x88c5),
 114         block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
 115         block_count: 64,
 116         device_size: 0x400000 * CYGNUM_FLASH_INTERLEAVE,
 117         base_mask  : ~(0x400000 * CYGNUM_FLASH_INTERLEAVE - 1),
 118         locking    : true,
 119         buffered_w : false,
 120         bootblock  : true,
 121         bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
 122                        0x002000 * CYGNUM_FLASH_INTERLEAVE,
 123                        0x002000 * CYGNUM_FLASH_INTERLEAVE,
 124                        0x002000 * CYGNUM_FLASH_INTERLEAVE,
 125                        0x002000 * CYGNUM_FLASH_INTERLEAVE,
 126                        0x002000 * CYGNUM_FLASH_INTERLEAVE,
 127                        0x002000 * CYGNUM_FLASH_INTERLEAVE,
 128                        0x002000 * CYGNUM_FLASH_INTERLEAVE,
 129                        0x002000 * CYGNUM_FLASH_INTERLEAVE,
 130                        0
 131                      },
 132         banked     : false
 133     },
 134 #endif
 135
 136 #ifdef CYGHWR_DEVS_FLASH_INTEL_28F320B3
 137     {   // 28F320B3-T
 138         device_id  : FLASHWORD(0x8896),
 139         block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
 140         block_count: 64,
 141         device_size: 0x400000 * CYGNUM_FLASH_INTERLEAVE,
 142         base_mask  : ~(0x400000 * CYGNUM_FLASH_INTERLEAVE - 1),
 143         locking    : false,
 144         buffered_w : false,
 145         bootblock  : true,
 146         bootblocks : { 0x3f0000 * CYGNUM_FLASH_INTERLEAVE,
 147                        0x002000 * CYGNUM_FLASH_INTERLEAVE,
 148                        0x002000 * CYGNUM_FLASH_INTERLEAVE,
 149                        0x002000 * CYGNUM_FLASH_INTERLEAVE,
 150                        0x002000 * CYGNUM_FLASH_INTERLEAVE,
 151                        0x002000 * CYGNUM_FLASH_INTERLEAVE,
 152                        0x002000 * CYGNUM_FLASH_INTERLEAVE,
 153                        0x002000 * CYGNUM_FLASH_INTERLEAVE,
 154                        0x002000 * CYGNUM_FLASH_INTERLEAVE,
 155                        0
 156                      },
 157         banked     : false
 158     },
 159     {   // 28F320B3-B
 160         device_id  : FLASHWORD(0x8897),
 161         block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
 162         block_count: 64,
 163         device_size: 0x400000 * CYGNUM_FLASH_INTERLEAVE,
 164         base_mask  : ~(0x400000 * CYGNUM_FLASH_INTERLEAVE - 1),
 165         locking    : false,
 166         buffered_w : false,
 167         bootblock  : true,
 168         bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
 169                        0x002000 * CYGNUM_FLASH_INTERLEAVE,
 170                        0x002000 * CYGNUM_FLASH_INTERLEAVE,
 171                        0x002000 * CYGNUM_FLASH_INTERLEAVE,
 172                        0x002000 * CYGNUM_FLASH_INTERLEAVE,
 173                        0x002000 * CYGNUM_FLASH_INTERLEAVE,
 174                        0x002000 * CYGNUM_FLASH_INTERLEAVE,
 175                        0x002000 * CYGNUM_FLASH_INTERLEAVE,
 176                        0x002000 * CYGNUM_FLASH_INTERLEAVE,
 177                        0
 178                      },
 179         banked     : false
 180     },
 181 #endif
 182
 183
 184 #ifdef CYGHWR_DEVS_FLASH_INTEL_28F320S3
 185     {   // 28F320S3
 186         device_id  : FLASHWORD(0x00d4),
 187         block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
 188         block_count: 64,
 189         device_size: 0x400000 * CYGNUM_FLASH_INTERLEAVE,
 190         base_mask  : ~(0x400000 * CYGNUM_FLASH_INTERLEAVE - 1),
 191         locking    : true,
 192         buffered_w : false,
 193         bootblock  : false,
 194         banked     : false
 195     },
 196 #endif
 197
 198 #ifdef CYGHWR_DEVS_FLASH_INTEL_28F160S5
 199     {   // 28F160S5
 200         device_id  : FLASHWORD(0x00d0),
 201         block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
 202         block_count: 32,
 203         device_size: 0x200000 * CYGNUM_FLASH_INTERLEAVE,
 204         base_mask  : ~(0x200000 * CYGNUM_FLASH_INTERLEAVE - 1),
 205         buffered_w : true,
 206         locking    : false,
 207         bootblock  : false,
 208         banked     : false
 209     },
 210 #endif
 211
 212 #ifdef CYGHWR_DEVS_FLASH_INTEL_28F800B5
 213     {   // 28F800B5-T
 214         device_id  : FLASHWORD(0x889c),
 215         block_size : 0x20000 * CYGNUM_FLASH_INTERLEAVE,
 216         block_count: 8,
 217         device_size: 0x100000 * CYGNUM_FLASH_INTERLEAVE,
 218         base_mask  : ~(0x100000 * CYGNUM_FLASH_INTERLEAVE - 1),
 219         locking    : false,
 220         buffered_w : false,
 221         bootblock  : true,
 222         bootblocks : { 0xE0000,
 223                        0x18000,
 224                        0x2000,
 225                        0x2000,
 226                        0x4000
 227                      },
 228         banked     : false
 229     },
 230     {   // 28F800B5-B
 231         device_id  : FLASHWORD(0x889d),
 232         block_size : 0x20000 * CYGNUM_FLASH_INTERLEAVE,
 233         block_count: 8,
 234         device_size: 0x100000 * CYGNUM_FLASH_INTERLEAVE,
 235         base_mask  : ~(0x100000 * CYGNUM_FLASH_INTERLEAVE - 1),
 236         locking    : false,
 237         buffered_w : false,
 238         bootblock  : true,
 239         bootblocks : { 0x00000,
 240                        0x4000,
 241                        0x2000,
 242                        0x2000,
 243                        0x18000
 244                      },
 245         banked     : false
 246     },
 247 #endif
 248
 249 #ifdef CYGHWR_DEVS_FLASH_INTEL_28F256L18
 250     {   // 28F256L18-T
 251         device_id  : FLASHWORD(0x880d),
 252         block_size : 0x20000 * CYGNUM_FLASH_INTERLEAVE,
 253         block_count: 256,
 254         device_size:  0x2000000 * CYGNUM_FLASH_INTERLEAVE,
 255         base_mask  : ~(0x2000000 * CYGNUM_FLASH_INTERLEAVE - 1),
 256         locking    : true,
 257         buffered_w : true,
 258         bootblock  : true,
 259         bootblocks : {0x1fe0000 * CYGNUM_FLASH_INTERLEAVE,
 260                        0x008000 * CYGNUM_FLASH_INTERLEAVE,
 261                        0x008000 * CYGNUM_FLASH_INTERLEAVE,
 262                        0x008000 * CYGNUM_FLASH_INTERLEAVE,
 263                        0x008000 * CYGNUM_FLASH_INTERLEAVE,
 264                        0
 265                      },
 266         banked     : false
 267     },
 268     {   // 28F256L18-B
 269         device_id  : FLASHWORD(0x8810),
 270         block_size : 0x20000 * CYGNUM_FLASH_INTERLEAVE,
 271         block_count: 256,
 272         device_size:  0x2000000 * CYGNUM_FLASH_INTERLEAVE,
 273         base_mask  : ~(0x2000000 * CYGNUM_FLASH_INTERLEAVE - 1),
 274         locking    : true,
 275         buffered_w : true,
 276         bootblock  : true,
 277         bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
 278                        0x008000 * CYGNUM_FLASH_INTERLEAVE,
 279                        0x008000 * CYGNUM_FLASH_INTERLEAVE,
 280                        0x008000 * CYGNUM_FLASH_INTERLEAVE,
 281                        0x008000 * CYGNUM_FLASH_INTERLEAVE,
 282                        0
 283                      },
 284         banked     : false
 285     },
 286     {   // M18
 287         device_id  : FLASHWORD(0x887E),
 288         block_size : 0x40000 * CYGNUM_FLASH_INTERLEAVE,
 289         block_count: 256,
 290         device_size:  0x4000000 * CYGNUM_FLASH_INTERLEAVE,
 291         base_mask  : ~(0x4000000 * CYGNUM_FLASH_INTERLEAVE - 1),
 292         locking    : true,
 293         buffered_w : true,
 294         bootblock  : false,
 295         banked     : false
 296     },
 297
 298 #endif
 299
 300 #endif // 16 bit devices
 301
 302 #endif // CYGONCE_DEVS_FLASH_INTEL_28FXXX_PARTS_INL