packages/devs/flash/intel/28fxxx/v2_0/include/flash_28fxxx_parts.inl

   1 #ifndef CYGONCE_DEVS_FLASH_INTEL_28FXXX_PARTS_INL
   2 #define CYGONCE_DEVS_FLASH_INTEL_28FXXX_PARTS_INL
   3 //==========================================================================
   4 //
   5 //      flash_28fxxx_parts.inl
   6 //
   7 //      Intel 28Fxxx part descriptors
   8 //
   9 //==========================================================================
  10 //####ECOSGPLCOPYRIGHTBEGIN####
  11 // -------------------------------------------
  12 // This file is part of eCos, the Embedded Configurable Operating System.
  13 // Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
  14 // Copyright (C) 2002 Gary Thomas
  15 //
  16 // eCos is free software; you can redistribute it and/or modify it under
  17 // the terms of the GNU General Public License as published by the Free
  18 // Software Foundation; either version 2 or (at your option) any later version.
  19 //
  20 // eCos is distributed in the hope that it will be useful, but WITHOUT ANY
  21 // WARRANTY; without even the implied warranty of MERCHANTABILITY or
  22 // FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  23 // for more details.
  24 //
  25 // You should have received a copy of the GNU General Public License along
  26 // with eCos; if not, write to the Free Software Foundation, Inc.,
  27 // 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
  28 //
  29 // As a special exception, if other files instantiate templates or use macros
  30 // or inline functions from this file, or you compile this file and link it
  31 // with other works to produce a work based on this file, this file does not
  32 // by itself cause the resulting work to be covered by the GNU General Public
  33 // License. However the source code for this file must still be made available
  34 // in accordance with section (3) of the GNU General Public License.
  35 //
  36 // This exception does not invalidate any other reasons why a work based on
  37 // this file might be covered by the GNU General Public License.
  38 //
  39 // Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
  40 // at http://sources.redhat.com/ecos/ecos-license/
  41 // -------------------------------------------
  42 //####ECOSGPLCOPYRIGHTEND####
  43 //==========================================================================
  44 //#####DESCRIPTIONBEGIN####
  45 //
  46 // Author(s):    jskov
  47 // Contributors: jskov, gthomas
  48 // Date:         2001-08-07
  49 // Purpose:
  50 // Description:  Intel 28Fxxx part descriptors
  51 // Usage:        Should be included from the flash_28fxxx.inl file only.
  52 //
  53 // FIXME:        Add configury for selecting bottom/top bootblocks
  54 //####DESCRIPTIONEND####
  55 //
  56 //==========================================================================
  57
  58 #if CYGNUM_FLASH_WIDTH == 8
  59 #ifdef CYGHWR_DEVS_FLASH_SHARP_LH28F016SCT_Z4
  60     {   // LH28F016SCT_Z4
  61         device_id  : FLASHWORD(0xA0),
  62         block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
  63         block_count: 32,
  64         device_size: 0x200000 * CYGNUM_FLASH_INTERLEAVE,
  65         base_mask  : ~(0x200000 * CYGNUM_FLASH_INTERLEAVE - 1),
  66         buffered_w : false,
  67         locking    : true,
  68         bootblock  : false,
  69         banked     : false
  70     },
  71 #endif
  72
  73 #ifdef CYGHWR_DEVS_FLASH_SHARP_LH28F016SCT_95
  74     {   // LH28F016SCT_95
  75         device_id  : FLASHWORD(0xAA),
  76         block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
  77         block_count: 32,
  78         device_size: 0x200000 * CYGNUM_FLASH_INTERLEAVE,
  79         base_mask  : ~(0x200000 * CYGNUM_FLASH_INTERLEAVE - 1),
  80         buffered_w : false,
  81         locking    : true,
  82         bootblock  : false,
  83         banked     : false
  84     },
  85 #endif
  86
  87 #else // 16 bit devices
  88
  89 #ifdef CYGHWR_DEVS_FLASH_INTEL_28F320C3
  90     {   // 28F320C3-T
  91         device_id  : FLASHWORD(0x88c4),
  92         block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
  93         block_count: 64,
  94         device_size: 0x400000 * CYGNUM_FLASH_INTERLEAVE,
  95         base_mask  : ~(0x400000 * CYGNUM_FLASH_INTERLEAVE - 1),
  96         locking    : true,
  97         buffered_w : false,
  98         bootblock  : true,
  99         bootblocks : { 0x3f0000 * CYGNUM_FLASH_INTERLEAVE,
 100                        0x002000 * CYGNUM_FLASH_INTERLEAVE,
 101                        0x002000 * CYGNUM_FLASH_INTERLEAVE,
 102                        0x002000 * CYGNUM_FLASH_INTERLEAVE,
 103                        0x002000 * CYGNUM_FLASH_INTERLEAVE,
 104                        0x002000 * CYGNUM_FLASH_INTERLEAVE,
 105                        0x002000 * CYGNUM_FLASH_INTERLEAVE,
 106                        0x002000 * CYGNUM_FLASH_INTERLEAVE,
 107                        0x002000 * CYGNUM_FLASH_INTERLEAVE,
 108                        0
 109                      },
 110         banked     : false
 111     },
 112     {   // 28F320C3-B
 113         device_id  : FLASHWORD(0x88c5),
 114         block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
 115         block_count: 64,
 116         device_size: 0x400000 * CYGNUM_FLASH_INTERLEAVE,
 117         base_mask  : ~(0x400000 * CYGNUM_FLASH_INTERLEAVE - 1),
 118         locking    : true,
 119         buffered_w : false,
 120         bootblock  : true,
 121         bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
 122                        0x002000 * CYGNUM_FLASH_INTERLEAVE,
 123                        0x002000 * CYGNUM_FLASH_INTERLEAVE,
 124                        0x002000 * CYGNUM_FLASH_INTERLEAVE,
 125                        0x002000 * CYGNUM_FLASH_INTERLEAVE,
 126                        0x002000 * CYGNUM_FLASH_INTERLEAVE,
 127                        0x002000 * CYGNUM_FLASH_INTERLEAVE,
 128                        0x002000 * CYGNUM_FLASH_INTERLEAVE,
 129                        0x002000 * CYGNUM_FLASH_INTERLEAVE,
 130                        0
 131                      },
 132         banked     : false
 133     },
 134 #endif
 135
 136 #ifdef CYGHWR_DEVS_FLASH_INTEL_28F320B3
 137     {   // 28F320B3-T
 138         device_id  : FLASHWORD(0x8896),
 139         block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
 140         block_count: 64,
 141         device_size: 0x400000 * CYGNUM_FLASH_INTERLEAVE,
 142         base_mask  : ~(0x400000 * CYGNUM_FLASH_INTERLEAVE - 1),
 143         locking    : false,
 144         buffered_w : false,
 145         bootblock  : true,
 146         bootblocks : { 0x3f0000 * CYGNUM_FLASH_INTERLEAVE,
 147                        0x002000 * CYGNUM_FLASH_INTERLEAVE,
 148                        0x002000 * CYGNUM_FLASH_INTERLEAVE,
 149                        0x002000 * CYGNUM_FLASH_INTERLEAVE,
 150                        0x002000 * CYGNUM_FLASH_INTERLEAVE,
 151                        0x002000 * CYGNUM_FLASH_INTERLEAVE,
 152                        0x002000 * CYGNUM_FLASH_INTERLEAVE,
 153                        0x002000 * CYGNUM_FLASH_INTERLEAVE,
 154                        0x002000 * CYGNUM_FLASH_INTERLEAVE,
 155                        0
 156                      },
 157         banked     : false
 158     },
 159     {   // 28F320B3-B
 160         device_id  : FLASHWORD(0x8897),
 161         block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
 162         block_count: 64,
 163         device_size: 0x400000 * CYGNUM_FLASH_INTERLEAVE,
 164         base_mask  : ~(0x400000 * CYGNUM_FLASH_INTERLEAVE - 1),
 165         locking    : false,
 166         buffered_w : false,
 167         bootblock  : true,
 168         bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
 169                        0x002000 * CYGNUM_FLASH_INTERLEAVE,
 170                        0x002000 * CYGNUM_FLASH_INTERLEAVE,
 171                        0x002000 * CYGNUM_FLASH_INTERLEAVE,
 172                        0x002000 * CYGNUM_FLASH_INTERLEAVE,
 173                        0x002000 * CYGNUM_FLASH_INTERLEAVE,
 174                        0x002000 * CYGNUM_FLASH_INTERLEAVE,
 175                        0x002000 * CYGNUM_FLASH_INTERLEAVE,
 176                        0x002000 * CYGNUM_FLASH_INTERLEAVE,
 177                        0
 178                      },
 179         banked     : false
 180     },
 181 #endif
 182
 183 #ifdef CYGHWR_DEVS_FLASH_INTEL_28F320S3
 184     {   // 28F320S3
 185         device_id  : FLASHWORD(0x00d4),
 186         block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
 187         block_count: 64,
 188         device_size: 0x400000 * CYGNUM_FLASH_INTERLEAVE,
 189         base_mask  : ~(0x400000 * CYGNUM_FLASH_INTERLEAVE - 1),
 190         locking    : true,
 191         buffered_w : false,
 192         bootblock  : false,
 193         banked     : false
 194     },
 195 #endif
 196
 197 #ifdef CYGHWR_DEVS_FLASH_INTEL_28F320J3
 198     {   // 28F320J3
 199         device_id  : FLASHWORD(0x0016),
 200         block_size : 0x20000 * CYGNUM_FLASH_INTERLEAVE,
 201         block_count: 32,
 202         device_size: 0x400000 * CYGNUM_FLASH_INTERLEAVE,
 203         base_mask  : ~(0x400000 * CYGNUM_FLASH_INTERLEAVE - 1),
 204         locking    : false,
 205         buffered_w : false,
 206         bootblock  : false,
 207         banked     : false
 208     },
 209 #endif
 210
 211 #ifdef CYGHWR_DEVS_FLASH_INTEL_28F128K3
 212     {
 213         device_id  : FLASHWORD(0x8802),
 214         block_size : 0x20000 * CYGNUM_FLASH_INTERLEAVE,
 215         block_count: 128,
 216         device_size: 0x1000000 * CYGNUM_FLASH_INTERLEAVE,
 217         base_mask  : ~(0x1000000 * CYGNUM_FLASH_INTERLEAVE - 1),
 218         locking    : true,
 219         buffered_w : true,
 220         bootblock  : false,
 221         banked     : false
 222     },
 223 #endif
 224
 225 #ifdef CYGHWR_DEVS_FLASH_INTEL_28F128P30
 226     {
 227         device_id  : FLASHWORD(0x8818),
 228         block_size : 0x20000 * CYGNUM_FLASH_INTERLEAVE,
 229         block_count: 128,
 230         device_size: 0x1000000 * CYGNUM_FLASH_INTERLEAVE,
 231         base_mask  : ~(0x1000000 * CYGNUM_FLASH_INTERLEAVE - 1),
 232         locking    : true,
 233         buffered_w : true,
 234         bootblock  : false,
 235         banked     : false
 236     },
 237 #endif
 238
 239 #ifdef CYGHWR_DEVS_FLASH_INTEL_28F128J3
 240     {
 241         device_id  : FLASHWORD(0x18),
 242         block_size : 0x20000 * CYGNUM_FLASH_INTERLEAVE,
 243         block_count: 128,
 244         device_size: 0x1000000 * CYGNUM_FLASH_INTERLEAVE,
 245         base_mask  : ~(0x1000000 * CYGNUM_FLASH_INTERLEAVE - 1),
 246         locking    : true,
 247         buffered_w : true,
 248         bootblock  : false,
 249         banked     : false
 250     },
 251 #endif
 252
 253 #ifdef CYGHWR_DEVS_FLASH_INTEL_28F160S5
 254     {   // 28F160S5
 255         device_id  : FLASHWORD(0x00d0),
 256         block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
 257         block_count: 32,
 258         device_size: 0x200000 * CYGNUM_FLASH_INTERLEAVE,
 259         base_mask  : ~(0x200000 * CYGNUM_FLASH_INTERLEAVE - 1),
 260         buffered_w : true,
 261         locking    : false,
 262         bootblock  : false,
 263         banked     : false
 264     },
 265 #endif
 266
 267 #ifdef CYGHWR_DEVS_FLASH_INTEL_28F160B3T
 268     {   // 28F160B3-T
 269         device_id  : FLASHWORD(0x8890),
 270         block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
 271         block_count: 32,
 272         device_size: 0x200000 * CYGNUM_FLASH_INTERLEAVE,
 273         base_mask  : ~(0x200000 * CYGNUM_FLASH_INTERLEAVE - 1),
 274         buffered_w : false,
 275         locking    : true,
 276         bootblock  : true,
 277         bootblocks : { 0x1f0000 * CYGNUM_FLASH_INTERLEAVE,
 278                        0x002000 * CYGNUM_FLASH_INTERLEAVE,
 279                        0x002000 * CYGNUM_FLASH_INTERLEAVE,
 280                        0x002000 * CYGNUM_FLASH_INTERLEAVE,
 281                        0x002000 * CYGNUM_FLASH_INTERLEAVE,
 282                        0x002000 * CYGNUM_FLASH_INTERLEAVE,
 283                        0x002000 * CYGNUM_FLASH_INTERLEAVE,
 284                        0x002000 * CYGNUM_FLASH_INTERLEAVE,
 285                        0x002000 * CYGNUM_FLASH_INTERLEAVE,
 286                        0
 287                      },
 288         banked     : false
 289     },
 290 #endif
 291
 292 #ifdef CYGHWR_DEVS_FLASH_INTEL_28F160C3B
 293     {   // 28F160C3-B
 294         device_id  : FLASHWORD(0x88C3),
 295         block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
 296         block_count: 32,
 297         device_size: 0x200000 * CYGNUM_FLASH_INTERLEAVE,
 298         base_mask  : ~(0x200000 * CYGNUM_FLASH_INTERLEAVE - 1),
 299         buffered_w : false,
 300         locking    : true,
 301         bootblock  : true,
 302         bootblocks : { 0x002000 * CYGNUM_FLASH_INTERLEAVE,
 303                        0x002000 * CYGNUM_FLASH_INTERLEAVE,
 304                        0x002000 * CYGNUM_FLASH_INTERLEAVE,
 305                        0x002000 * CYGNUM_FLASH_INTERLEAVE,
 306                        0x002000 * CYGNUM_FLASH_INTERLEAVE,
 307                        0x002000 * CYGNUM_FLASH_INTERLEAVE,
 308                        0x002000 * CYGNUM_FLASH_INTERLEAVE,
 309                        0x002000 * CYGNUM_FLASH_INTERLEAVE,
 310                        0x1f0000 * CYGNUM_FLASH_INTERLEAVE,
 311                        0
 312                      },
 313         banked     : false
 314     },
 315 #endif
 316
 317 #ifdef CYGHWR_DEVS_FLASH_INTEL_28F800B5
 318     {   // 28F800B5-T
 319         device_id  : FLASHWORD(0x889c),
 320         block_size : 0x20000 * CYGNUM_FLASH_INTERLEAVE,
 321         block_count: 8,
 322         device_size: 0x100000 * CYGNUM_FLASH_INTERLEAVE,
 323         base_mask  : ~(0x100000 * CYGNUM_FLASH_INTERLEAVE - 1),
 324         locking    : false,
 325         buffered_w : false,
 326         bootblock  : true,
 327         bootblocks : { 0xE0000,
 328                        0x18000,
 329                        0x2000,
 330                        0x2000,
 331                        0x4000
 332                      },
 333         banked     : false
 334     },
 335     {   // 28F800B5-B
 336         device_id  : FLASHWORD(0x889d),
 337         block_size : 0x20000 * CYGNUM_FLASH_INTERLEAVE,
 338         block_count: 8,
 339         device_size: 0x100000 * CYGNUM_FLASH_INTERLEAVE,
 340         base_mask  : ~(0x100000 * CYGNUM_FLASH_INTERLEAVE - 1),
 341         locking    : false,
 342         buffered_w : false,
 343         bootblock  : true,
 344         bootblocks : { 0x00000,
 345                        0x4000,
 346                        0x2000,
 347                        0x2000,
 348                        0x18000
 349                      },
 350         banked     : false
 351     },
 352 #endif
 353
 354 #ifdef CYGHWR_DEVS_FLASH_INTEL_28F256L18
 355     {   // 28F256L18-T
 356         device_id  : FLASHWORD(0x880d),
 357         block_size : 0x20000 * CYGNUM_FLASH_INTERLEAVE,
 358         block_count: 256,
 359         device_size:  0x2000000 * CYGNUM_FLASH_INTERLEAVE,
 360         base_mask  : ~(0x2000000 * CYGNUM_FLASH_INTERLEAVE - 1),
 361         locking    : true,
 362         buffered_w : true,
 363         bootblock  : true,
 364         bootblocks : {0x1fe0000 * CYGNUM_FLASH_INTERLEAVE,
 365                        0x008000 * CYGNUM_FLASH_INTERLEAVE,
 366                        0x008000 * CYGNUM_FLASH_INTERLEAVE,
 367                        0x008000 * CYGNUM_FLASH_INTERLEAVE,
 368                        0x008000 * CYGNUM_FLASH_INTERLEAVE,
 369                        0
 370                      },
 371         banked     : false
 372     },
 373     {   // 28F256L18-B
 374         device_id  : FLASHWORD(0x8810),
 375         block_size : 0x20000 * CYGNUM_FLASH_INTERLEAVE,
 376         block_count: 256,
 377         device_size:  0x2000000 * CYGNUM_FLASH_INTERLEAVE,
 378         base_mask  : ~(0x2000000 * CYGNUM_FLASH_INTERLEAVE - 1),
 379         locking    : true,
 380         buffered_w : true,
 381         bootblock  : true,
 382         bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
 383                        0x008000 * CYGNUM_FLASH_INTERLEAVE,
 384                        0x008000 * CYGNUM_FLASH_INTERLEAVE,
 385                        0x008000 * CYGNUM_FLASH_INTERLEAVE,
 386                        0x008000 * CYGNUM_FLASH_INTERLEAVE,
 387                        0
 388                      },
 389         banked     : false
 390     },
 391     {   // M18
 392         device_id  : FLASHWORD(0x887E),
 393         block_size : 0x40000 * CYGNUM_FLASH_INTERLEAVE,
 394         block_count: 256,
 395         device_size:  0x4000000 * CYGNUM_FLASH_INTERLEAVE,
 396         base_mask  : ~(0x4000000 * CYGNUM_FLASH_INTERLEAVE - 1),
 397         locking    : true,
 398         buffered_w : true,
 399         bootblock  : false,
 400         banked     : false
 401     },
 402
 403 #endif
 404
 405 #endif // 16 bit devices
 406
 407 #endif // CYGONCE_DEVS_FLASH_INTEL_28FXXX_PARTS_INL