packages/devs/serial/powerpc/mpc555/v2_0/src/mpc555_serial_with_ints.c

   1 //==========================================================================
   2 //
   3 //      mpc555_serial_with_ints.c
   4 //
   5 //      PowerPC 5xx MPC555 Serial I/O Interface Module (interrupt driven)
   6 //
   7 //==========================================================================
   8 //####ECOSGPLCOPYRIGHTBEGIN####
   9 // -------------------------------------------
  10 // This file is part of eCos, the Embedded Configurable Operating System.
  11 // Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
  12 //
  13 // eCos is free software; you can redistribute it and/or modify it under
  14 // the terms of the GNU General Public License as published by the Free
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  16 //
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  18 // WARRANTY; without even the implied warranty of MERCHANTABILITY or
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  23 // with eCos; if not, write to the Free Software Foundation, Inc.,
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  25 //
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  27 // or inline functions from this file, or you compile this file and link it
  28 // with other works to produce a work based on this file, this file does not
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  30 // License. However the source code for this file must still be made available
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  34 // this file might be covered by the GNU General Public License.
  35 // -------------------------------------------
  36 //####ECOSGPLCOPYRIGHTEND####
  37 //==========================================================================
  38 //#####DESCRIPTIONBEGIN####
  39 //
  40 // Author(s):   Bob Koninckx
  41 // Contributors:
  42 // Date:        2002-04-25
  43 // Purpose:     MPC555 Serial I/O module (interrupt driven version)
  44 // Description:
  45 //
  46 //
  47 //####DESCRIPTIONEND####
  48 //==========================================================================
  49 //----------------------------------
  50 // Includes and forward declarations
  51 //----------------------------------
  52 #include <pkgconf/io_serial.h>
  53 #include <pkgconf/io.h>
  54
  55 #include <cyg/io/io.h>
  56 #include <cyg/hal/hal_intr.h>
  57 #include <cyg/hal/hal_arbiter.h>
  58 #include <cyg/io/devtab.h>
  59 #include <cyg/infra/diag.h>
  60 #include <cyg/io/serial.h>
  61
  62 // Only build this driver for the MPC555 based boards
  63 #ifdef CYGPKG_IO_SERIAL_POWERPC_MPC555
  64
  65 #include "mpc555_serial.h"
  66
  67 //-----------------
  68 // Type definitions
  69 //-----------------
  70 typedef struct mpc555_serial_info {
  71   CYG_ADDRWORD   base;                  // The base address of the serial port
  72   CYG_WORD       tx_interrupt_num;      // trivial
  73   CYG_WORD       rx_interrupt_num;      // trivial
  74   cyg_priority_t tx_interrupt_priority; // trivial
  75   cyg_priority_t rx_interrupt_priority; // trivial
  76   bool           tx_interrupt_enable;   // tells if the transmit interrupt may be re-enabled
  77   cyg_interrupt  tx_interrupt;          // the tx interrupt object
  78   cyg_handle_t   tx_interrupt_handle;   // the tx interrupt handle
  79   cyg_interrupt  rx_interrupt;          // the rx interrupt object
  80   cyg_handle_t   rx_interrupt_handle;   // the rx interrupt handle
  81 } mpc555_serial_info;
  82
  83 //--------------------
  84 // Function prototypes
  85 //--------------------
  86 static bool mpc555_serial_init(struct cyg_devtab_entry * tab);
  87 static bool mpc555_serial_putc(serial_channel * chan, unsigned char c);
  88 static Cyg_ErrNo mpc555_serial_lookup(struct cyg_devtab_entry ** tab,
  89                                       struct cyg_devtab_entry * sub_tab,
  90                                       const char * name);
  91 static unsigned char mpc555_serial_getc(serial_channel *chan);
  92 static Cyg_ErrNo mpc555_serial_set_config(serial_channel *chan, cyg_uint32 key,
  93                                           const void *xbuf, cyg_uint32 *len);
  94 static void mpc555_serial_start_xmit(serial_channel *chan);
  95 static void mpc555_serial_stop_xmit(serial_channel *chan);
  96
  97 // The interrupt servers
  98 static cyg_uint32 mpc555_serial_tx_ISR(cyg_vector_t vector, cyg_addrword_t data);
  99 static cyg_uint32 mpc555_serial_rx_ISR(cyg_vector_t vector, cyg_addrword_t data);
 100 static void       mpc555_serial_tx_DSR(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data);
 101 static void       mpc555_serial_rx_DSR(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data);
 102
 103 //-------------------------------------------
 104 // Register the device driver with the kernel
 105 //-------------------------------------------
 106 static SERIAL_FUNS(mpc555_serial_funs,
 107                    mpc555_serial_putc,
 108                    mpc555_serial_getc,
 109                    mpc555_serial_set_config,
 110                    mpc555_serial_start_xmit,
 111                    mpc555_serial_stop_xmit);
 112
 113 //-------------------
 114 // Device driver data
 115 //-------------------
 116 #ifdef CYGPKG_IO_SERIAL_POWERPC_MPC555_SERIAL_A
 117 static mpc555_serial_info mpc555_serial_info0 = {MPC555_SERIAL_BASE_A,
 118                                                  CYGNUM_HAL_INTERRUPT_IMB3_SCI0_TX,
 119                                                  CYGNUM_HAL_INTERRUPT_IMB3_SCI0_RX,
 120                                                  CYGNUM_HAL_INTERRUPT_IMB3_SCI0_TX_PRIORITY,
 121                                                  CYGNUM_HAL_INTERRUPT_IMB3_SCI0_RX_PRIORITY,
 122                                                  false};
 123 #if CYGNUM_IO_SERIAL_POWERPC_MPC555_SERIAL_A_BUFSIZE > 0
 124 static unsigned char mpc555_serial_out_buf0[CYGNUM_IO_SERIAL_POWERPC_MPC555_SERIAL_A_BUFSIZE];
 125 static unsigned char mpc555_serial_in_buf0[CYGNUM_IO_SERIAL_POWERPC_MPC555_SERIAL_A_BUFSIZE];
 126
 127 static SERIAL_CHANNEL_USING_INTERRUPTS(mpc555_serial_channel0,
 128                                        mpc555_serial_funs,
 129                                        mpc555_serial_info0,
 130                                        CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_POWERPC_MPC555_SERIAL_A_BAUD),
 131                                        CYG_SERIAL_STOP_DEFAULT,
 132                                        CYG_SERIAL_PARITY_DEFAULT,
 133                                        CYG_SERIAL_WORD_LENGTH_DEFAULT,
 134                                        CYG_SERIAL_FLAGS_DEFAULT,
 135                                        &mpc555_serial_out_buf0[0],
 136                                        sizeof(mpc555_serial_out_buf0),
 137                                        &mpc555_serial_in_buf0[0],
 138                                        sizeof(mpc555_serial_in_buf0));
 139 #else
 140 static SERIAL_CHANNEL(mpc555_serial_channel0,
 141                       mpc555_serial_funs,
 142                       mpc555_serial_info0,
 143                       CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_POWERPC_MPC555_SERIAL_A_BAUD),
 144                       CYG_SERIAL_STOP_DEFAULT,
 145                       CYG_SERIAL_PARITY_DEFAULT,
 146                       CYG_SERIAL_WORD_LENGTH_DEFAULT,
 147                       CYG_SERIAL_FLAGS_DEFAULT);
 148 #endif
 149 DEVTAB_ENTRY(mpc555_serial_io0,
 150              CYGDAT_IO_SERIAL_POWERPC_MPC555_SERIAL_A_NAME,
 151              0, // does not depend on a lower level device driver
 152              &cyg_io_serial_devio,
 153              mpc555_serial_init,
 154              mpc555_serial_lookup,
 155              &mpc555_serial_channel0);
 156 #endif // ifdef CYGPKG_IO_SERIAL_POWERPC_MPC555_SERIAL_A
 157
 158 #ifdef CYGPKG_IO_SERIAL_POWERPC_MPC555_SERIAL_B
 159 static mpc555_serial_info mpc555_serial_info1 = {MPC555_SERIAL_BASE_B,
 160                                                  CYGNUM_HAL_INTERRUPT_IMB3_SCI1_TX,
 161                                                  CYGNUM_HAL_INTERRUPT_IMB3_SCI1_RX,
 162                                                  CYGNUM_HAL_INTERRUPT_IMB3_SCI1_TX_PRIORITY,
 163                                                  CYGNUM_HAL_INTERRUPT_IMB3_SCI1_RX_PRIORITY,
 164                                                  false};
 165 #if CYGNUM_IO_SERIAL_POWERPC_MPC555_SERIAL_B_BUFSIZE > 0
 166 static unsigned char mpc555_serial_out_buf1[CYGNUM_IO_SERIAL_POWERPC_MPC555_SERIAL_B_BUFSIZE];
 167 static unsigned char mpc555_serial_in_buf1[CYGNUM_IO_SERIAL_POWERPC_MPC555_SERIAL_B_BUFSIZE];
 168
 169 static SERIAL_CHANNEL_USING_INTERRUPTS(mpc555_serial_channel1,
 170                                        mpc555_serial_funs,
 171                                        mpc555_serial_info1,
 172                                        CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_POWERPC_MPC555_SERIAL_B_BAUD),
 173                                        CYG_SERIAL_STOP_DEFAULT,
 174                                        CYG_SERIAL_PARITY_DEFAULT,
 175                                        CYG_SERIAL_WORD_LENGTH_DEFAULT,
 176                                        CYG_SERIAL_FLAGS_DEFAULT,
 177                                        &mpc555_serial_out_buf1[0],
 178                                        sizeof(mpc555_serial_out_buf1),
 179                                        &mpc555_serial_in_buf1[0],
 180                                        sizeof(mpc555_serial_in_buf1));
 181 #else
 182 static SERIAL_CHANNEL(mpc555_serial_channel1,
 183                       mpc555_serial_funs,
 184                       mpc555_serial_info1,
 185                       CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_POWERPC_MPC555_SERIAL_B_BAUD),
 186                       CYG_SERIAL_STOP_DEFAULT,
 187                       CYG_SERIAL_PARITY_DEFAULT,
 188                       CYG_SERIAL_WORD_LENGTH_DEFAULT,
 189                       CYG_SERIAL_FLAGS_DEFAULT);
 190 #endif
 191 DEVTAB_ENTRY(mpc555_serial_io1,
 192              CYGDAT_IO_SERIAL_POWERPC_MPC555_SERIAL_B_NAME,
 193              0, // does not depend on a lower level device driver
 194              &cyg_io_serial_devio,
 195              mpc555_serial_init,
 196              mpc555_serial_lookup,
 197              &mpc555_serial_channel1);
 198 #endif // ifdef CYGPKG_IO_SERIAL_POWERPC_MPC555_SERIAL_B
 199
 200 //-----------------------------
 201 // Device driver implementation
 202 //-----------------------------
 203
 204 // The arbitration isr.
 205 // I think this is the best place to implement it. The device driver is the only place
 206 // in the code where the knowledge is present about how the hardware is used
 207 //
 208 // Always check receive interrupts. Some rom monitor might be waiting for CTRL-C
 209 static cyg_uint32 hal_arbitration_isr_qsci(CYG_ADDRWORD a_vector, CYG_ADDRWORD a_data)
 210 {
 211   cyg_uint16 status;
 212   cyg_uint16 control;
 213
 214   HAL_READ_UINT16(CYGARC_REG_IMM_SC1SR, status);
 215   HAL_READ_UINT16(CYGARC_REG_IMM_SCC1R1, control);
 216   if((status & CYGARC_REG_IMM_SCxSR_RDRF) && (control & CYGARC_REG_IMM_SCCxR1_RIE))
 217     return hal_call_isr(CYGNUM_HAL_INTERRUPT_IMB3_SCI0_RX);
 218 #ifdef CYGPKG_IO_SERIAL_POWERPC_MPC555_SERIAL_A // Do not waist time on unused hardware
 219   if((status & CYGARC_REG_IMM_SCxSR_TDRE) && (control & CYGARC_REG_IMM_SCCxR1_TIE))
 220     return hal_call_isr(CYGNUM_HAL_INTERRUPT_IMB3_SCI0_TX);
 221 // Don't waist time on unused interrupts
 222 //  if((status & CYGARC_REG_IMM_SCxSR_TC) && (control & CYGARC_REG_IMM_SCCxR1_TCIE))
 223 //    return hal_call_isr(CYGNUM_HAL_INTERRUPT_IMB3_SCI0_TXC);
 224 // Don't waist time on unused interrupts
 225 //  if((status & CYGARC_REG_IMM_SCxSR_IDLE) && (control & CYGARC_REG_IMM_SCCxR1_ILIE))
 226 //    return hal_call_isr(CYGNUM_HAL_INTERRUPT_IMB3_SCI0_IDLE);
 227 #endif
 228
 229   HAL_READ_UINT16(CYGARC_REG_IMM_SC2SR, status);
 230   HAL_READ_UINT16(CYGARC_REG_IMM_SCC2R1, control);
 231   if((status & CYGARC_REG_IMM_SCxSR_RDRF) && (control & CYGARC_REG_IMM_SCCxR1_RIE))
 232     return hal_call_isr(CYGNUM_HAL_INTERRUPT_IMB3_SCI1_RX);
 233 #ifdef CYGPKG_IO_SERIAL_POWERPC_MPC555_SERIAL_B // Do not waist time on unused hardware
 234   if((status & CYGARC_REG_IMM_SCxSR_TDRE) && (control & CYGARC_REG_IMM_SCCxR1_TIE))
 235     return hal_call_isr(CYGNUM_HAL_INTERRUPT_IMB3_SCI1_TX);
 236 // Don't waist time on unused interrupts
 237 //  if((status & CYGARC_REG_IMM_SCxSR_TC) && (control & CYGARC_REG_IMM_SCCxR1_TCIE))
 238 //    return hal_call_isr(CYGNUM_HAL_INTERRUPT_IMB3_SCI1_TXC);
 239 // Don't waist time on unused interrupts
 240 //  if((status & CYGARC_REG_IMM_SCxSR_IDLE) && (control & CYGARC_REG_IMM_SCCxR1_ILIE))
 241 //    return hal_call_isr(CYGNUM_HAL_INTERRUPT_IMB3_SCI1_IDLE);
 242
 243 #if 0
 244   // The driver doesn't use the queue operation of the hardware (It would need different code for serial 1 and 2
 245   // since oly one port supports queue mode). So the following is not needed.
 246   // Leave it there. It is easyer for later implementations to remove the comments than finding
 247   // out how the hardware works again.
 248   HAL_READ_UINT16(CYGARC_REG_IMM_QSCI1SR, status);
 249   HAL_READ_UINT16(CYGARC_REG_IMM_QSCI1CR, control);
 250   if((status & CYGARC_REG_IMM_QSCI1SR_QTHF) && (control & CYGARC_REG_IMM_QSCI1CR_QTHFI))
 251     return hal_call_isr(CYGNUM_HAL_INTERRUPT_IMB3_SCI1_RXQTHF);
 252   if((status & CYGARC_REG_IMM_QSCI1SR_QBHF) && (control & CYGARC_REG_IMM_QSCI1CR_QBHFI))
 253     return hal_call_isr(CYGNUM_HAL_INTERRUPT_IMB3_SCI1_RXQBHF);
 254   if((status & CYGARC_REG_IMM_QSCI1SR_QTHE) && (control & CYGARC_REG_IMM_QSCI1CR_QTHEI))
 255     return hal_call_isr(CYGNUM_HAL_INTERRUPT_IMB3_SCI1_TXQTHE);
 256   if((status & CYGARC_REG_IMM_QSCI1SR_QBHE) && (control & CYGARC_REG_IMM_QSCI1CR_QBHEI))
 257     return hal_call_isr(CYGNUM_HAL_INTERRUPT_IMB3_SCI1_TXQBHE);
 258
 259   cyg_uint16 status;
 260   cyg_uint16 control;
 261
 262   HAL_READ_UINT16(CYGARC_REG_IMM_SPSR, status);
 263   HAL_READ_UINT16(CYGARC_REG_IMM_SPCR2, control);
 264   if((status & CYGARC_REG_IMM_SPSR_SPIF) && (control & CYGARC_REG_IMM_SPCR2_SPIFIE))
 265     return hal_call_isr(CYGNUM_HAL_INTERRUPT_IMB3_SPI_FI);
 266
 267   HAL_READ_UINT16(CYGARC_REG_IMM_SPCR3, control);
 268   if((status & CYGARC_REG_IMM_SPSR_MODF) && (control & CYGARC_REG_IMM_SPCR3_HMIE))
 269     return hal_call_isr(CYGNUM_HAL_INTERRUPT_IMB3_SPI_MODF);
 270
 271   if((status & CYGARC_REG_IMM_SPSR_HALTA) && (control & CYGARC_REG_IMM_SPCR3_HMIE))
 272     return hal_call_isr(CYGNUM_HAL_INTERRUPT_IMB3_SPI_HALTA);
 273 #endif
 274
 275 #endif
 276
 277   return 0;
 278 }
 279
 280 //--------------------------------------------------------------------------------
 281 // Internal function to actually configure the hardware to desired baud rate, etc.
 282 //--------------------------------------------------------------------------------
 283 static bool mpc555_serial_config_port(serial_channel * chan, cyg_serial_info_t * new_config, bool init)
 284 {
 285   mpc555_serial_info * mpc555_chan = (mpc555_serial_info *)(chan->dev_priv);
 286
 287   cyg_addrword_t port = mpc555_chan->base;
 288   cyg_uint16 baud_rate = select_baud[new_config->baud];
 289   unsigned char frame_length = 1; // The start bit
 290
 291   cyg_uint16 old_isrstate;
 292   cyg_uint16 sccxr;
 293
 294   if(!baud_rate)
 295     return false;    // Invalid baud rate selected
 296
 297   if((new_config->word_length != CYGNUM_SERIAL_WORD_LENGTH_7) &&
 298      (new_config->word_length != CYGNUM_SERIAL_WORD_LENGTH_8))
 299     return false;    // Invalid word length selected
 300
 301   if((new_config->parity != CYGNUM_SERIAL_PARITY_NONE) &&
 302      (new_config->parity != CYGNUM_SERIAL_PARITY_EVEN) &&
 303      (new_config->parity != CYGNUM_SERIAL_PARITY_ODD))
 304     return false;    // Invalid parity selected
 305
 306   if((new_config->stop != CYGNUM_SERIAL_STOP_1) &&
 307      (new_config->stop != CYGNUM_SERIAL_STOP_2))
 308     return false;    // Invalid stop bits selected
 309
 310   frame_length += select_word_length[new_config->word_length - CYGNUM_SERIAL_WORD_LENGTH_5];
 311   frame_length += select_stop_bits[new_config->stop];
 312   frame_length += select_parity[new_config->parity];
 313
 314   if((frame_length != 10) && (frame_length != 11))
 315     return false;    // Invalid frame format selected
 316
 317   // Disable port interrupts while changing hardware
 318   HAL_READ_UINT16(port + MPC555_SERIAL_SCCxR1, sccxr);
 319   old_isrstate = sccxr;
 320   old_isrstate &= ~((cyg_uint16)MPC555_SERIAL_SCCxR1_LOOPS);
 321   old_isrstate &= ~((cyg_uint16)MPC555_SERIAL_SCCxR1_WOMS);
 322   old_isrstate &= ~((cyg_uint16)MPC555_SERIAL_SCCxR1_ILT);
 323   old_isrstate &= ~((cyg_uint16)MPC555_SERIAL_SCCxR1_PT);
 324   old_isrstate &= ~((cyg_uint16)MPC555_SERIAL_SCCxR1_PE);
 325   old_isrstate &= ~((cyg_uint16)MPC555_SERIAL_SCCxR1_M);
 326   old_isrstate &= ~((cyg_uint16)MPC555_SERIAL_SCCxR1_WAKE);
 327   old_isrstate &= ~((cyg_uint16)MPC555_SERIAL_SCCxR1_TE);
 328   old_isrstate &= ~((cyg_uint16)MPC555_SERIAL_SCCxR1_RE);
 329   old_isrstate &= ~((cyg_uint16)MPC555_SERIAL_SCCxR1_RWU);
 330   old_isrstate &= ~((cyg_uint16)MPC555_SERIAL_SCCxR1_SBK);
 331   sccxr &= ~((cyg_uint16)MPC555_SERIAL_SCCxR1_TIE);
 332   sccxr &= ~((cyg_uint16)MPC555_SERIAL_SCCxR1_TCIE);
 333   sccxr &= ~((cyg_uint16)MPC555_SERIAL_SCCxR1_RIE);
 334   sccxr &= ~((cyg_uint16)MPC555_SERIAL_SCCxR1_ILIE);
 335   HAL_WRITE_UINT16(port + MPC555_SERIAL_SCCxR1, sccxr);
 336
 337   // Set databits, stopbits and parity.
 338   HAL_READ_UINT16(port + MPC555_SERIAL_SCCxR1, sccxr);
 339
 340   if(frame_length == 11)
 341     sccxr |= (cyg_uint16)MPC555_SERIAL_SCCxR1_M;
 342   else
 343     sccxr &= ~((cyg_uint16)MPC555_SERIAL_SCCxR1_M);
 344
 345   switch(new_config->parity)
 346   {
 347     case CYGNUM_SERIAL_PARITY_NONE:
 348       sccxr &= ~((cyg_uint16)MPC555_SERIAL_SCCxR1_PE);
 349       break;
 350     case CYGNUM_SERIAL_PARITY_EVEN:
 351       sccxr |= (cyg_uint16)MPC555_SERIAL_SCCxR1_PE;
 352       sccxr &= ~((cyg_uint16)MPC555_SERIAL_SCCxR1_PT);
 353       break;
 354     case CYGNUM_SERIAL_PARITY_ODD:
 355       sccxr |= (cyg_uint16)MPC555_SERIAL_SCCxR1_PE;
 356       sccxr |= (cyg_uint16)MPC555_SERIAL_SCCxR1_PT;
 357       break;
 358     default:
 359       break;
 360   }
 361   HAL_WRITE_UINT16(port + MPC555_SERIAL_SCCxR1, sccxr);
 362
 363   // Set baud rate.
 364   baud_rate &= ~((cyg_uint16)MPC555_SERIAL_SCCxR0_OTHR);
 365   baud_rate &= ~((cyg_uint16)MPC555_SERIAL_SCCxR0_LINKBD);
 366   HAL_READ_UINT16(port + MPC555_SERIAL_SCCxR0, sccxr);
 367   sccxr &= ~(MPC555_SERIAL_SCCxR0_SCxBR);
 368   sccxr |= baud_rate;
 369   HAL_WRITE_UINT16(port + MPC555_SERIAL_SCCxR0, sccxr);
 370
 371   // Enable the device
 372   HAL_READ_UINT16(port + MPC555_SERIAL_SCCxR1, sccxr);
 373   sccxr |= MPC555_SERIAL_SCCxR1_TE;
 374   sccxr |= MPC555_SERIAL_SCCxR1_RE;
 375   HAL_WRITE_UINT16(port + MPC555_SERIAL_SCCxR1, sccxr);
 376
 377   if(init)
 378   { // enable the receiver interrupt
 379     HAL_READ_UINT16(port + MPC555_SERIAL_SCCxR1, sccxr);
 380     sccxr |= MPC555_SERIAL_SCCxR1_RIE;
 381     HAL_WRITE_UINT16(port + MPC555_SERIAL_SCCxR1, sccxr);
 382   }
 383   else // Restore the old interrupt state
 384   {
 385     HAL_READ_UINT16(port + MPC555_SERIAL_SCCxR1, sccxr);
 386     sccxr |= old_isrstate;
 387     HAL_WRITE_UINT16(port + MPC555_SERIAL_SCCxR1, sccxr);
 388   }
 389
 390   if(new_config != &chan->config)
 391     chan->config = *new_config;
 392
 393   return true;
 394 }
 395
 396 //--------------------------------------------------------------
 397 // Function to initialize the device.  Called at bootstrap time.
 398 //--------------------------------------------------------------
 399 static hal_mpc5xx_arbitration_data arbiter;
 400
 401 static bool mpc555_serial_init(struct cyg_devtab_entry * tab)
 402 {
 403    serial_channel * chan = (serial_channel *)tab->priv;
 404    mpc555_serial_info * mpc555_chan = (mpc555_serial_info *)chan->dev_priv;
 405
 406    if(!mpc555_serial_config_port(chan, &chan->config, true))
 407      return false;
 408
 409    (chan->callbacks->serial_init)(chan);  // Really only required for interrupt driven devices
 410    if(chan->out_cbuf.len != 0)
 411    {
 412      arbiter.priority = CYGNUM_HAL_ISR_SOURCE_PRIORITY_QSCI;
 413      arbiter.data     = 0;
 414      arbiter.arbiter  = hal_arbitration_isr_qsci;
 415
 416      // Install the arbitration isr, Make sure that is is not installed twice
 417      hal_mpc5xx_remove_arbitration_isr(CYGNUM_HAL_ISR_SOURCE_PRIORITY_QSCI);
 418      hal_mpc5xx_install_arbitration_isr(&arbiter);
 419
 420      // Create the Tx interrupt, do not enable it yet
 421      cyg_drv_interrupt_create(mpc555_chan->tx_interrupt_num,
 422                               mpc555_chan->tx_interrupt_priority,
 423                               (cyg_addrword_t)chan,   //  Data item passed to interrupt handler
 424                               mpc555_serial_tx_ISR,
 425                               mpc555_serial_tx_DSR,
 426                               &mpc555_chan->tx_interrupt_handle,
 427                               &mpc555_chan->tx_interrupt);
 428      cyg_drv_interrupt_attach(mpc555_chan->tx_interrupt_handle);
 429
 430      // Create the Rx interrupt, this can be safely unmasked now
 431      cyg_drv_interrupt_create(mpc555_chan->rx_interrupt_num,
 432                               mpc555_chan->rx_interrupt_priority,
 433                               (cyg_addrword_t)chan,
 434                               mpc555_serial_rx_ISR,
 435                               mpc555_serial_rx_DSR,
 436                               &mpc555_chan->rx_interrupt_handle,
 437                               &mpc555_chan->rx_interrupt);
 438      cyg_drv_interrupt_attach(mpc555_chan->rx_interrupt_handle);
 439      cyg_drv_interrupt_unmask(mpc555_chan->rx_interrupt_num);
 440     }
 441
 442     return true;
 443 }
 444
 445 //----------------------------------------------------------------------
 446 // This routine is called when the device is "looked" up (i.e. attached)
 447 //----------------------------------------------------------------------
 448 static Cyg_ErrNo mpc555_serial_lookup(struct cyg_devtab_entry ** tab,
 449                                       struct cyg_devtab_entry * sub_tab,
 450                                       const char * name)
 451 {
 452   serial_channel * chan = (serial_channel *)(*tab)->priv;
 453   (chan->callbacks->serial_init)(chan);  // Really only required for interrupt driven devices
 454
 455   return ENOERR;
 456 }
 457
 458 //----------------------------------------------
 459 // Send a character to the device output buffer.
 460 // Return 'true' if character is sent to device
 461 //----------------------------------------------
 462 static bool mpc555_serial_putc(serial_channel * chan, unsigned char c)
 463 {
 464   mpc555_serial_info * mpc555_chan = (mpc555_serial_info *)chan->dev_priv;
 465   cyg_addrword_t port = mpc555_chan->base;
 466
 467   cyg_uint16 scsr;
 468   cyg_uint16 scdr;
 469
 470   HAL_READ_UINT16(port + MPC555_SERIAL_SCxSR, scsr);
 471   if(scsr & MPC555_SERIAL_SCxSR_TDRE)
 472   { // Ok, we have space, write the character and return success
 473     scdr = (cyg_uint16)c;
 474     HAL_WRITE_UINT16(port + MPC555_SERIAL_SCxDR, scdr);
 475     return true;
 476   }
 477   else
 478     // We cannot write to the transmitter, return failure
 479     return false;
 480 }
 481
 482 //---------------------------------------------------------------------
 483 // Fetch a character from the device input buffer, waiting if necessary
 484 //---------------------------------------------------------------------
 485 static unsigned char mpc555_serial_getc(serial_channel * chan)
 486 {
 487   unsigned char c;
 488   mpc555_serial_info * mpc555_chan = (mpc555_serial_info *)chan->dev_priv;
 489   cyg_addrword_t port = mpc555_chan->base;
 490
 491   cyg_uint16 scsr;
 492   cyg_uint16 scdr;
 493
 494   do {
 495     HAL_READ_UINT16(port + MPC555_SERIAL_SCxSR, scsr);
 496   } while(!(scsr & MPC555_SERIAL_SCxSR_RDRF));
 497
 498   // Ok, data is received, read it out and return
 499   HAL_READ_UINT16(port + MPC555_SERIAL_SCxDR, scdr);
 500   c = (unsigned char)scdr;
 501
 502   return c;
 503 }
 504
 505 //---------------------------------------------------
 506 // Set up the device characteristics; baud rate, etc.
 507 //---------------------------------------------------
 508 static bool mpc555_serial_set_config(serial_channel * chan, cyg_uint32 key,
 509                                      const void *xbuf, cyg_uint32 * len)
 510 {
 511   switch(key) {
 512   case CYG_IO_SET_CONFIG_SERIAL_INFO:
 513     {
 514       cyg_serial_info_t *config = (cyg_serial_info_t *)xbuf;
 515       if(*len < sizeof(cyg_serial_info_t)) {
 516         return -EINVAL;
 517       }
 518       *len = sizeof(cyg_serial_info_t);
 519       if(true != mpc555_serial_config_port(chan, config, false))
 520         return -EINVAL;
 521     }
 522     break;
 523   default:
 524     return -EINVAL;
 525   }
 526   return ENOERR;
 527 }
 528
 529 //-------------------------------------
 530 // Enable the transmitter on the device
 531 //-------------------------------------
 532 static void mpc555_serial_start_xmit(serial_channel * chan)
 533 {
 534   mpc555_serial_info * mpc555_chan = (mpc555_serial_info *)chan->dev_priv;
 535
 536   mpc555_chan->tx_interrupt_enable = true;
 537   cyg_drv_interrupt_unmask(mpc555_chan->tx_interrupt_num);
 538
 539   // No need to call xmt_char, this will generate an interrupt immediately.
 540 }
 541
 542 //--------------------------------------
 543 // Disable the transmitter on the device
 544 //--------------------------------------
 545 static void mpc555_serial_stop_xmit(serial_channel * chan)
 546 {
 547   mpc555_serial_info * mpc555_chan = (mpc555_serial_info *)chan->dev_priv;
 548
 549   cyg_drv_dsr_lock();
 550   mpc555_chan->tx_interrupt_enable = false;
 551   cyg_drv_interrupt_mask(mpc555_chan->tx_interrupt_num);
 552   cyg_drv_dsr_unlock();
 553 }
 554
 555 //-----------------------------------------
 556 // The low level transmit interrupt handler
 557 //-----------------------------------------
 558 static cyg_uint32 mpc555_serial_tx_ISR(cyg_vector_t vector, cyg_addrword_t data)
 559 {
 560   serial_channel * chan = (serial_channel *)data;
 561   mpc555_serial_info * mpc555_chan = (mpc555_serial_info *)chan->dev_priv;
 562
 563   cyg_drv_interrupt_mask(mpc555_chan->tx_interrupt_num);
 564   cyg_drv_interrupt_acknowledge(mpc555_chan->tx_interrupt_num);
 565
 566   return CYG_ISR_CALL_DSR; // cause the DSR to run
 567 }
 568
 569 //----------------------------------------
 570 // The low level receive interrupt handler
 571 //----------------------------------------
 572 static cyg_uint32 mpc555_serial_rx_ISR(cyg_vector_t vector, cyg_addrword_t data)
 573 {
 574   serial_channel * chan = (serial_channel *)data;
 575   mpc555_serial_info * mpc555_chan = (mpc555_serial_info *)chan->dev_priv;
 576
 577   cyg_drv_interrupt_mask(mpc555_chan->rx_interrupt_num);
 578   cyg_drv_interrupt_acknowledge(mpc555_chan->rx_interrupt_num);
 579
 580   return CYG_ISR_CALL_DSR; // cause the DSR to run
 581 }
 582
 583 //------------------------------------------
 584 // The high level transmit interrupt handler
 585 //------------------------------------------
 586 static void mpc555_serial_tx_DSR(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data)
 587 {
 588   serial_channel * chan = (serial_channel *)data;
 589   mpc555_serial_info * mpc555_chan = (mpc555_serial_info *)chan->dev_priv;
 590
 591   (chan->callbacks->xmt_char)(chan);
 592   if(mpc555_chan->tx_interrupt_enable)
 593     cyg_drv_interrupt_unmask(mpc555_chan->tx_interrupt_num);
 594 }
 595
 596 //-----------------------------------------
 597 // The high level receive interrupt handler
 598 //-----------------------------------------
 599 #define MPC555_SERIAL_SCxSR_ERRORS (MPC555_SERIAL_SCxSR_OR | \
 600                                     MPC555_SERIAL_SCxSR_NF | \
 601                                     MPC555_SERIAL_SCxSR_FE | \
 602                                     MPC555_SERIAL_SCxSR_PF)
 603
 604 static void mpc555_serial_rx_DSR(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data)
 605 {
 606   serial_channel * chan = (serial_channel *)data;
 607   mpc555_serial_info * mpc555_chan = (mpc555_serial_info *)chan->dev_priv;
 608   cyg_addrword_t port = mpc555_chan->base;
 609   cyg_uint16 scdr;
 610   cyg_uint16 scsr;
 611
 612   // Allways read out the received character, in order to clear receiver flags
 613   HAL_READ_UINT16(port + MPC555_SERIAL_SCxDR, scdr);
 614
 615   HAL_READ_UINT16(port + MPC555_SERIAL_SCxSR, scsr);
 616   if(scsr & (cyg_uint16)MPC555_SERIAL_SCxSR_ERRORS)
 617   {
 618     scsr &= ~((cyg_uint16)MPC555_SERIAL_SCxSR_ERRORS);
 619     HAL_WRITE_UINT16(port + MPC555_SERIAL_SCxSR, scsr);
 620   }
 621   else
 622   {
 623     (chan->callbacks->rcv_char)(chan, (cyg_uint8)scdr);
 624   }
 625
 626   cyg_drv_interrupt_unmask(mpc555_chan->rx_interrupt_num);
 627 }
 628
 629 #endif // CYGPKG_IO_SERIAL_POWERPC_MPC555
 630
 631 // EOF mpc555_serial_with_ints.c