packages/devs/serial/sparclite/sleb/v2_0/src/sleb_sdtr.c

   1 //==========================================================================
   2 //
   3 //      io/serial/sparclite/sleb_sdtr.c
   4 //
   5 //      Serial I/O interface module for SPARClite Eval Board (SLEB)
   6 //
   7 //==========================================================================
   8 //####ECOSGPLCOPYRIGHTBEGIN####
   9 // -------------------------------------------
  10 // This file is part of eCos, the Embedded Configurable Operating System.
  11 // Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
  12 //
  13 // eCos is free software; you can redistribute it and/or modify it under
  14 // the terms of the GNU General Public License as published by the Free
  15 // Software Foundation; either version 2 or (at your option) any later version.
  16 //
  17 // eCos is distributed in the hope that it will be useful, but WITHOUT ANY
  18 // WARRANTY; without even the implied warranty of MERCHANTABILITY or
  19 // FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  20 // for more details.
  21 //
  22 // You should have received a copy of the GNU General Public License along
  23 // with eCos; if not, write to the Free Software Foundation, Inc.,
  24 // 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
  25 //
  26 // As a special exception, if other files instantiate templates or use macros
  27 // or inline functions from this file, or you compile this file and link it
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  29 // by itself cause the resulting work to be covered by the GNU General Public
  30 // License. However the source code for this file must still be made available
  31 // in accordance with section (3) of the GNU General Public License.
  32 //
  33 // This exception does not invalidate any other reasons why a work based on
  34 // this file might be covered by the GNU General Public License.
  35 //
  36 // Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
  37 // at http://sources.redhat.com/ecos/ecos-license/
  38 // -------------------------------------------
  39 //####ECOSGPLCOPYRIGHTEND####
  40 //==========================================================================
  41 //#####DESCRIPTIONBEGIN####
  42 //
  43 // Author(s):   gthomas
  44 // Contributors:  gthomas
  45 // Date:        1999-02-04
  46 // Purpose:     SLEB serial I/O module
  47 // Description:
  48 //
  49 //####DESCRIPTIONEND####
  50 //
  51 //==========================================================================
  52
  53 #include <pkgconf/io.h>
  54 #include <pkgconf/io_serial.h>
  55 #include <cyg/io/io.h>
  56 #include <cyg/hal/hal_intr.h>
  57 #include <cyg/io/devtab.h>
  58 #include <cyg/io/serial.h>
  59
  60 #ifdef  CYGPKG_IO_SERIAL_SPARCLITE_SLEB
  61
  62 #include "sleb_sdtr.h"
  63
  64 extern void diag_printf(const char *fmt, ...);
  65
  66 #define BUFSIZE 128
  67
  68 typedef struct sleb_sdtr_info {
  69     CYG_ADDRWORD   base;
  70     CYG_WORD       tx_int_num;
  71     CYG_WORD       rx_int_num;
  72     cyg_interrupt  tx_serial_interrupt;
  73     cyg_handle_t   tx_serial_interrupt_handle;
  74     cyg_interrupt  rx_serial_interrupt;
  75     cyg_handle_t   rx_serial_interrupt_handle;
  76     cyg_uint8      cmd_reg;
  77     bool           xmit_enabled;
  78 } sleb_sdtr_info;
  79
  80 static bool sleb_sdtr_init(struct cyg_devtab_entry *tab);
  81 static bool sleb_sdtr_putc(serial_channel *chan, unsigned char c);
  82 static Cyg_ErrNo sleb_sdtr_lookup(struct cyg_devtab_entry **tab,
  83                                    struct cyg_devtab_entry *sub_tab,
  84                                    const char *name);
  85 static unsigned char sleb_sdtr_getc(serial_channel *chan);
  86 static Cyg_ErrNo sleb_sdtr_set_config(serial_channel *chan, cyg_uint32 key,
  87                                       const void *xbuf, cyg_uint32 *len);
  88 static void sleb_sdtr_start_xmit(serial_channel *chan);
  89 static void sleb_sdtr_stop_xmit(serial_channel *chan);
  90
  91 static cyg_uint32 sleb_sdtr_tx_ISR(cyg_vector_t vector, cyg_addrword_t data);
  92 static void       sleb_sdtr_tx_DSR(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data);
  93 static cyg_uint32 sleb_sdtr_rx_ISR(cyg_vector_t vector, cyg_addrword_t data);
  94 static void       sleb_sdtr_rx_DSR(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data);
  95
  96 static SERIAL_FUNS(sleb_sdtr_funs,
  97                    sleb_sdtr_putc,
  98                    sleb_sdtr_getc,
  99                    sleb_sdtr_set_config,
 100                    sleb_sdtr_start_xmit,
 101                    sleb_sdtr_stop_xmit
 102     );
 103
 104 #ifdef CYGPKG_IO_SERIAL_SPARCLITE_SLEB_CON1
 105 static sleb_sdtr_info sleb_sdtr_info0 = {SLEB_SDTR0_BASE, SLEB_SDTR0_TX_INT, SLEB_SDTR0_RX_INT};
 106 #if CYGNUM_IO_SERIAL_SPARCLITE_SLEB_CON1_BUFSIZE > 0
 107 static unsigned char sleb_sdtr_out_buf0[CYGNUM_IO_SERIAL_SPARCLITE_SLEB_CON1_BUFSIZE];
 108 static unsigned char sleb_sdtr_in_buf0[CYGNUM_IO_SERIAL_SPARCLITE_SLEB_CON1_BUFSIZE];
 109
 110 static SERIAL_CHANNEL_USING_INTERRUPTS(sleb_sdtr_channel0,
 111                                        sleb_sdtr_funs,
 112                                        sleb_sdtr_info0,
 113                                        CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_SPARCLITE_SLEB_CON1_BAUD),
 114                                        CYG_SERIAL_STOP_DEFAULT,
 115                                        CYG_SERIAL_PARITY_DEFAULT,
 116                                        CYG_SERIAL_WORD_LENGTH_DEFAULT,
 117                                        CYG_SERIAL_FLAGS_DEFAULT,
 118                                        &sleb_sdtr_out_buf0[0], sizeof(sleb_sdtr_out_buf0),
 119                                        &sleb_sdtr_in_buf0[0], sizeof(sleb_sdtr_in_buf0)
 120     );
 121 #else
 122 static SERIAL_CHANNEL(sleb_sdtr_channel0,
 123                       sleb_sdtr_funs,
 124                       sleb_sdtr_info0,
 125                       CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_SPARCLITE_SLEB_CON1_BAUD),
 126                       CYG_SERIAL_STOP_DEFAULT,
 127                       CYG_SERIAL_PARITY_DEFAULT,
 128                       CYG_SERIAL_WORD_LENGTH_DEFAULT,
 129                       CYG_SERIAL_FLAGS_DEFAULT
 130     );
 131 #endif
 132
 133 DEVTAB_ENTRY(sleb_sdtr_io0,
 134              CYGDAT_IO_SERIAL_SPARCLITE_SLEB_CON1_NAME,
 135              0,                     // Does not depend on a lower level interface
 136              &cyg_io_serial_devio,
 137              sleb_sdtr_init,
 138              sleb_sdtr_lookup,     // Serial driver may need initializing
 139              &sleb_sdtr_channel0
 140     );
 141 #endif // CYGPKG_IO_SERIAL_SPARCLITE_SLEB_CON1
 142
 143 #ifdef  CYGPKG_IO_SERIAL_SPARCLITE_SLEB_CON2
 144 static sleb_sdtr_info sleb_sdtr_info1 = {SLEB_SDTR1_BASE, SLEB_SDTR1_TX_INT, SLEB_SDTR1_RX_INT};
 145 #if CYGNUM_IO_SERIAL_SPARCLITE_SLEB_CON2_BUFSIZE > 0
 146 static unsigned char sleb_sdtr_out_buf1[CYGNUM_IO_SERIAL_SPARCLITE_SLEB_CON2_BUFSIZE];
 147 static unsigned char sleb_sdtr_in_buf1[CYGNUM_IO_SERIAL_SPARCLITE_SLEB_CON2_BUFSIZE];
 148
 149 static SERIAL_CHANNEL_USING_INTERRUPTS(sleb_sdtr_channel1,
 150                                        sleb_sdtr_funs,
 151                                        sleb_sdtr_info1,
 152                                        CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_SPARCLITE_SLEB_CON2_BAUD),
 153                                        CYG_SERIAL_STOP_DEFAULT,
 154                                        CYG_SERIAL_PARITY_DEFAULT,
 155                                        CYG_SERIAL_WORD_LENGTH_DEFAULT,
 156                                        CYG_SERIAL_FLAGS_DEFAULT,
 157                                        &sleb_sdtr_out_buf1[0], sizeof(sleb_sdtr_out_buf1),
 158                                        &sleb_sdtr_in_buf1[0], sizeof(sleb_sdtr_in_buf1)
 159     );
 160 #else
 161 static SERIAL_CHANNEL(sleb_sdtr_channel1,
 162                       sleb_sdtr_funs,
 163                       sleb_sdtr_info1,
 164                       CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_SPARCLITE_SLEB_CON2_BAUD),
 165                       CYG_SERIAL_STOP_DEFAULT,
 166                       CYG_SERIAL_PARITY_DEFAULT,
 167                       CYG_SERIAL_WORD_LENGTH_DEFAULT,
 168                       CYG_SERIAL_FLAGS_DEFAULT
 169     );
 170 #endif
 171
 172 DEVTAB_ENTRY(sleb_sdtr_io1,
 173              CYGDAT_IO_SERIAL_SPARCLITE_SLEB_CON2_NAME,
 174              0,                     // Does not depend on a lower level interface
 175              &cyg_io_serial_devio,
 176              sleb_sdtr_init,
 177              sleb_sdtr_lookup,     // Serial driver may need initializing
 178              &sleb_sdtr_channel1
 179     );
 180 #endif // CYGPKG_IO_SERIAL_SPARCLITE_SLEB_CON2
 181
 182 // Internal function to actually configure the hardware to desired baud rate, etc.
 183 static bool
 184 sleb_sdtr_config_port(serial_channel *chan, cyg_serial_info_t *new_config, bool init)
 185 {
 186     sleb_sdtr_info *sdtr_chan = (sleb_sdtr_info *)chan->dev_priv;
 187     CYG_ADDRWORD port = sdtr_chan->base;
 188     cyg_int32 baud_divisor;
 189     cyg_int32 clk, tval;
 190     unsigned char mode;
 191 #if 0
 192     if ((new_config->baud < CYGNUM_SERIAL_BAUD_MIN) || (new_config->baud > CYGNUM_SERIAL_BAUD_MAX))
 193         return false;  // Invalid baud rate
 194 #endif
 195     baud_divisor = select_baud[new_config->baud];
 196     if (baud_divisor == 0)
 197         return false; // Unsupported baud rate
 198     // Reset the port
 199     HAL_SPARC_86940_WRITE(SDTR_CONTROL(port), SDTR_CMD_RST);
 200     // Write the mode
 201     mode = SDTR_MODE_MODE_ASYNC16 |
 202         select_word_length[new_config->word_length - CYGNUM_SERIAL_WORD_LENGTH_5] |
 203         select_stop_bits[new_config->stop] |
 204         select_parity[new_config->parity];
 205     HAL_SPARC_86940_WRITE(SDTR_CONTROL(port), mode);
 206     // Set baud rate clock.
 207     // ***** CAUTION! Both ports use the same time, thus they must both run at the same baud rate!
 208     clk = *SLEB_CLOCK_SWITCH;  // Compute board speed
 209     if (clk & 0x80)  clk = 10;
 210     clk = (clk & 0x3F) * 1000000;  // in MHz
 211     tval = (clk / (baud_divisor * 32)) - 1;
 212     HAL_SPARC_86940_WRITE(SLEB_TIMER3_RELOAD, tval);
 213     // Set up control register
 214     sdtr_chan->cmd_reg = SDTR_CMD_RTS | SDTR_CMD_DTR | SDTR_CMD_TxEN;
 215 #ifdef CYGPKG_IO_SERIAL_SPARCLITE_SLEB_CON1
 216     // Cygmon needs the receiver
 217     if ((chan->out_cbuf.len != 0) || (chan == &sleb_sdtr_channel0)) {
 218 #else
 219     if (chan->out_cbuf.len != 0) {
 220 #endif
 221         sdtr_chan->cmd_reg |= SDTR_CMD_RxEN;
 222     }
 223     if (init) {
 224         sdtr_chan->xmit_enabled = false;
 225     }
 226     HAL_SPARC_86940_WRITE(SDTR_CONTROL(port), sdtr_chan->cmd_reg);
 227     if (new_config != &chan->config)
 228         chan->config = *new_config;
 229     return true;
 230 }
 231
 232 // Function to initialize the device.  Called at bootstrap time.
 233 static bool
 234 sleb_sdtr_init(struct cyg_devtab_entry *tab)
 235 {
 236     serial_channel *chan = (serial_channel *)tab->priv;
 237     sleb_sdtr_info *sdtr_chan = (sleb_sdtr_info *)chan->dev_priv;
 238 #ifdef CYGDBG_IO_INIT
 239     diag_printf("SLEB SERIAL init - dev: %x.%d.%d\n", sdtr_chan->base, sdtr_chan->tx_int_num, sdtr_chan->rx_int_num);
 240 #endif
 241     (chan->callbacks->serial_init)(chan);  // Really only required for interrupt driven devices
 242     if (chan->out_cbuf.len != 0) {
 243         cyg_drv_interrupt_create(sdtr_chan->tx_int_num,
 244                                  99,                     // Priority - unused
 245                                  (cyg_addrword_t)chan,   //  Data item passed to interrupt handler
 246                                  sleb_sdtr_tx_ISR,
 247                                  sleb_sdtr_tx_DSR,
 248                                  &sdtr_chan->tx_serial_interrupt_handle,
 249                                  &sdtr_chan->tx_serial_interrupt);
 250         cyg_drv_interrupt_attach(sdtr_chan->tx_serial_interrupt_handle);
 251         cyg_drv_interrupt_mask(sdtr_chan->tx_int_num);
 252         cyg_drv_interrupt_create(sdtr_chan->rx_int_num,
 253                                  99,                     // Priority - unused
 254                                  (cyg_addrword_t)chan,   //  Data item passed to interrupt handler
 255                                  sleb_sdtr_rx_ISR,
 256                                  sleb_sdtr_rx_DSR,
 257                                  &sdtr_chan->rx_serial_interrupt_handle,
 258                                  &sdtr_chan->rx_serial_interrupt);
 259         cyg_drv_interrupt_attach(sdtr_chan->rx_serial_interrupt_handle);
 260         cyg_drv_interrupt_unmask(sdtr_chan->rx_int_num);
 261     }
 262     sleb_sdtr_config_port(chan, &chan->config, true);
 263     return true;
 264 }
 265
 266 // This routine is called when the device is "looked" up (i.e. attached)
 267 static Cyg_ErrNo
 268 sleb_sdtr_lookup(struct cyg_devtab_entry **tab,
 269                   struct cyg_devtab_entry *sub_tab,
 270                   const char *name)
 271 {
 272     serial_channel *chan = (serial_channel *)(*tab)->priv;
 273     (chan->callbacks->serial_init)(chan);  // Really only required for interrupt driven devices
 274     return ENOERR;
 275 }
 276
 277 // Send a character to the device output buffer.
 278 // Return 'true' if character is sent to device
 279 static bool
 280 sleb_sdtr_putc(serial_channel *chan, unsigned char c)
 281 {
 282     sleb_sdtr_info *sdtr_chan = (sleb_sdtr_info *)chan->dev_priv;
 283     CYG_ADDRWORD port = sdtr_chan->base;
 284     cyg_uint8 status;
 285     HAL_SPARC_86940_READ(SDTR_STATUS(port), status);
 286     if (status & SDTR_STAT_TxRDY) {
 287 // Transmit buffer is empty
 288         HAL_SPARC_86940_WRITE(SDTR_TXDATA(port), c);
 289         return true;
 290     } else {
 291 // No space
 292         return false;
 293     }
 294 }
 295
 296 // Fetch a character from the device input buffer, waiting if necessary
 297 static unsigned char
 298 sleb_sdtr_getc(serial_channel *chan)
 299 {
 300     unsigned char c;
 301     sleb_sdtr_info *sdtr_chan = (sleb_sdtr_info *)chan->dev_priv;
 302     CYG_ADDRWORD port = sdtr_chan->base;
 303     cyg_uint8 status;
 304     HAL_SPARC_86940_READ(SDTR_STATUS(port), status);
 305     while ((status & SDTR_STAT_RxRDY) == 0)
 306         HAL_SPARC_86940_READ(SDTR_STATUS(port), status);  // Wait for char
 307     HAL_SPARC_86940_READ(SDTR_RXDATA(port), c);
 308     return c;
 309 }
 310
 311 // Set up the device characteristics; baud rate, etc.
 312 static Cyg_ErrNo
 313 sleb_sdtr_set_config(serial_channel *chan, cyg_uint32 key,
 314                      const void *xbuf, cyg_uint32 *len)
 315 {
 316     switch (key) {
 317     case CYG_IO_SET_CONFIG_SERIAL_INFO:
 318       {
 319         cyg_serial_info_t *config = (cyg_serial_info_t *)xbuf;
 320         if ( *len < sizeof(cyg_serial_info_t) ) {
 321             return -EINVAL;
 322         }
 323         *len = sizeof(cyg_serial_info_t);
 324         if ( true != sleb_sdtr_config_port(chan, config, false) )
 325             return -EINVAL;
 326       }
 327       break;
 328     default:
 329         return -EINVAL;
 330     }
 331     return ENOERR;
 332 }
 333
 334 // Enable the transmitter on the device
 335 static void
 336 sleb_sdtr_start_xmit(serial_channel *chan)
 337 {
 338     sleb_sdtr_info *sdtr_chan = (sleb_sdtr_info *)chan->dev_priv;
 339     sdtr_chan->xmit_enabled = true;
 340     cyg_drv_interrupt_unmask(sdtr_chan->tx_int_num);
 341 }
 342
 343 // Disable the transmitter on the device
 344 static void
 345 sleb_sdtr_stop_xmit(serial_channel *chan)
 346 {
 347     sleb_sdtr_info *sdtr_chan = (sleb_sdtr_info *)chan->dev_priv;
 348     cyg_drv_interrupt_mask(sdtr_chan->tx_int_num);
 349     sdtr_chan->xmit_enabled = false;
 350 }
 351
 352 // Serial I/O - low level interrupt handler (ISR)
 353 static cyg_uint32
 354 sleb_sdtr_tx_ISR(cyg_vector_t vector, cyg_addrword_t data)
 355 {
 356     serial_channel *chan = (serial_channel *)data;
 357     sleb_sdtr_info *sdtr_chan = (sleb_sdtr_info *)chan->dev_priv;
 358     cyg_drv_interrupt_mask(sdtr_chan->tx_int_num);
 359     cyg_drv_interrupt_acknowledge(sdtr_chan->tx_int_num);
 360     return CYG_ISR_CALL_DSR;  // Cause DSR to be run
 361 }
 362
 363 // Serial I/O - high level interrupt handler (DSR)
 364 static void
 365 sleb_sdtr_tx_DSR(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data)
 366 {
 367     serial_channel *chan = (serial_channel *)data;
 368     sleb_sdtr_info *sdtr_chan = (sleb_sdtr_info *)chan->dev_priv;
 369     (chan->callbacks->xmt_char)(chan);
 370     if (sdtr_chan->xmit_enabled)
 371         cyg_drv_interrupt_unmask(sdtr_chan->tx_int_num);
 372 }
 373
 374 // Serial I/O - low level interrupt handler (ISR)
 375 static cyg_uint32
 376 sleb_sdtr_rx_ISR(cyg_vector_t vector, cyg_addrword_t data)
 377 {
 378     serial_channel *chan = (serial_channel *)data;
 379     sleb_sdtr_info *sdtr_chan = (sleb_sdtr_info *)chan->dev_priv;
 380     cyg_drv_interrupt_mask(sdtr_chan->rx_int_num);
 381     return CYG_ISR_CALL_DSR;  // Cause DSR to be run
 382 }
 383
 384 // Serial I/O - high level interrupt handler (DSR)
 385 static void
 386 sleb_sdtr_rx_DSR(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data)
 387 {
 388     serial_channel *chan = (serial_channel *)data;
 389     sleb_sdtr_info *sdtr_chan = (sleb_sdtr_info *)chan->dev_priv;
 390     CYG_ADDRWORD port = sdtr_chan->base;
 391     cyg_uint8 status, c;
 392     HAL_SPARC_86940_READ(SDTR_STATUS(port), status);
 393     if ((status & SDTR_STAT_RxRDY) != 0) {
 394         HAL_SPARC_86940_READ(SDTR_RXDATA(port), c);
 395         (chan->callbacks->rcv_char)(chan, c);
 396     }
 397     cyg_drv_interrupt_acknowledge(sdtr_chan->rx_int_num);
 398     cyg_drv_interrupt_unmask(sdtr_chan->rx_int_num);
 399 }
 400
 401 #endif //  CYGPKG_IO_SERIAL_SPARCLITE_SLEB