5 //#define IMX_SPI_DEBUG
8 #define diag_printf1 diag_printf
10 #define diag_printf1(fmt,args...)
13 #define IMX_SPI_ACTIVE_HIGH 1
14 #define IMX_SPI_ACTIVE_LOW 0
15 #define SPI_RETRY_TIMES 100
17 // Only for SPI master support
19 unsigned int base; // base address of SPI module the device is connected to
20 unsigned int freq; // desired clock freq in Hz for this device
21 unsigned int ss_pol; // ss polarity: 1=active high; 0=active low
22 unsigned int ss; // slave select
23 unsigned int in_sctl; // inactive sclk ctl: 1=stay low; 0=stay high
24 unsigned int in_dctl; // inactive data ctl: 1=stay low; 0=stay high
25 unsigned int ssctl; // single burst mode vs multiple: 0=single; 1=multi
26 unsigned int sclkpol; // sclk polarity: active high=0; active low=1
27 unsigned int sclkpha; // sclk phase: 0=phase 0; 1=phase1
28 unsigned int fifo_sz; // fifo size in bytes for either tx or rx. Don't add them up!
29 unsigned int us_delay; // us delay in each xfer
30 void *reg; // pointer to a set of SPI registers
34 unsigned int ctrl_reg;
38 // setup IOMUX for the spi device
40 int imx_spi_init_v2_3 (
41 struct imx_spi_dev *dev
44 // transfer up to fifo bytes data via spi. The data transferred is the sum of both the tx and rx
45 int imx_spi_xfer_v2_3 (
46 struct imx_spi_dev *dev, // spi device pointer
47 unsigned char *tx_buf, // tx buffer (has to be 4-byte aligned)
48 unsigned char *rx_buf, // rx buffer (has to be 4-byte aligned)
49 int burst_bytes // total number of bytes in one burst or xfer
52 typedef int imx_spi_init_func_t(struct imx_spi_dev *);
53 typedef int imx_spi_xfer_func_t(struct imx_spi_dev *, unsigned char *, unsigned char *, int);
55 unsigned int pmic_reg(unsigned int reg, unsigned int val, unsigned int write);
57 void io_cfg_spi(struct imx_spi_dev *dev);
59 #endif // __IMX_SPI_H__