1 #ifndef CYGONCE_HAL_PLATFORM_SETUP_H
2 #define CYGONCE_HAL_PLATFORM_SETUP_H
3 //==========================================================================
5 // hal_platform_setup.h
9 //==========================================================================
10 //####ECOSGPLCOPYRIGHTBEGIN####
11 // -------------------------------------------
12 // This file is part of eCos, the Embedded Configurable Operating System.
13 // Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
15 // eCos is free software; you can redistribute it and/or modify it under
16 // the terms of the GNU General Public License as published by the Free
17 // Software Foundation; either version 2 or (at your option) any later version.
19 // eCos is distributed in the hope that it will be useful, but WITHOUT ANY
20 // WARRANTY; without even the implied warranty of MERCHANTABILITY or
21 // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
24 // You should have received a copy of the GNU General Public License along
25 // with eCos; if not, write to the Free Software Foundation, Inc.,
26 // 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
28 // As a special exception, if other files instantiate templates or use macros
29 // or inline functions from this file, or you compile this file and link it
30 // with other works to produce a work based on this file, this file does not
31 // by itself cause the resulting work to be covered by the GNU General Public
32 // License. However the source code for this file must still be made available
33 // in accordance with section (3) of the GNU General Public License.
35 // This exception does not invalidate any other reasons why a work based on
36 // this file might be covered by the GNU General Public License.
38 // Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
39 // at http://sources.redhat.com/ecos/ecos-license/
40 // -------------------------------------------
41 //####ECOSGPLCOPYRIGHTEND####
42 //==========================================================================
43 //#####DESCRIPTIONBEGIN####
46 // Contributors: gthomas, jskov, rcassebohm
47 // Grant Edwards <grante@visi.com>
52 //####DESCRIPTIONEND####
54 //========================================================================*/
56 #include <cyg/hal/plf_io.h>
63 orr r1,r1,#((0x7 & (~(\x))))
65 #ifdef CYGSEM_HAL_LED_WITH_DELAY
73 #define CYGHWR_LED_MACRO \
77 // Use relative branch since we are going to switch the address space
79 #define CYGSEM_HAL_ROM_RESET_USES_JUMP
81 .macro PLATFORM_RELOCATE
84 ldr r2,=0x07 /* set led display to output */
89 /* Check that it worked, otherwise try Sync DRAM setup */
99 ldr r3, =0xe7ffff90 /* sdram c+wb disabled, regs @ 0x03ff0000 */
100 ldr r0, =KS32C_SYSCFG
102 1: mov r1,pc /* actual address */
103 sub r1,r1,#8 /* + 8 */
104 ldr r0,=1b /* address off 1: after remap */
109 #ifdef CYG_HAL_STARTUP_ROMRAM
112 ldr r1,=AIM711_ROM0_LA_START
119 ldr r0,=KS32C_EXTDBWTH
123 #ifdef CYG_HAL_STARTUP_ROMRAM
125 /* Relocate text segment */
126 ldr r2,=__exception_handlers
127 ldr r3,=AIM711_ROM0_LA_START
130 ldr r4,=__rom_data_end
144 /* The below are set with a store-multiple instruction */
146 /* Sync DRAM setup */
147 /* Flash is 8 bit, DRAM is 32 bit and EXTIO is 8 bit */
148 /* .long KS32C_EXTDBWTH */
149 40: .long ( (KS32C_EXTDBWTH_8BIT<<KS32C_EXTDBWTH_DSR0_shift) \
150 |(KS32C_EXTDBWTH_32BIT<<KS32C_EXTDBWTH_DSD0_shift) \
151 |(KS32C_EXTDBWTH_8BIT<<KS32C_EXTDBWTH_DSX0_shift) \
152 |(KS32C_EXTDBWTH_8BIT<<KS32C_EXTDBWTH_DSX2_shift) )
153 /* Flash at 0x02000000-0x02100000, 5 cycles, 7 cycles */
154 /* .long KS32C_ROMCON0 */
155 .long ( (KS32C_ROMCON_PMC_ROM) \
156 |(KS32C_ROMCON_TPA_5C) \
157 |(KS32C_ROMCON_TACC_7C) \
158 |((AIM711_ROM0_LA_START >> 16) << KS32C_ROMCON_BASE_shift) \
159 |((AIM711_ROM0_LA_END >> 16) << KS32C_ROMCON_NEXT_shift))
160 /* .long KS32C_ROMCON1 */
161 .long ( (KS32C_ROMCON_PMC_ROM) \
162 |(KS32C_ROMCON_TPA_5C) \
163 |(KS32C_ROMCON_TACC_5C) \
164 |((0x00000000 >> 16) << KS32C_ROMCON_BASE_shift) \
165 |((0x00000000 >> 16) << KS32C_ROMCON_NEXT_shift))
166 /* .long KS32C_ROMCON2 */
167 .long ( (KS32C_ROMCON_PMC_ROM) \
168 |(KS32C_ROMCON_TPA_5C) \
169 |(KS32C_ROMCON_TACC_5C) \
170 |((0x00000000 >> 16) << KS32C_ROMCON_BASE_shift) \
171 |((0x00000000 >> 16) << KS32C_ROMCON_NEXT_shift))
172 /* .long KS32C_ROMCON3 */
173 .long ( (KS32C_ROMCON_PMC_ROM) \
174 |(KS32C_ROMCON_TPA_5C) \
175 |(KS32C_ROMCON_TACC_5C) \
176 |((0x00000000 >> 16) << KS32C_ROMCON_BASE_shift) \
177 |((0x00000000 >> 16) << KS32C_ROMCON_NEXT_shift))
178 /* .long KS32C_ROMCON4 */
179 .long ( (KS32C_ROMCON_PMC_ROM) \
180 |(KS32C_ROMCON_TPA_5C) \
181 |(KS32C_ROMCON_TACC_5C) \
182 |((0x00000000 >> 16) << KS32C_ROMCON_BASE_shift) \
183 |((0x00000000 >> 16) << KS32C_ROMCON_NEXT_shift))
184 /* .long KS32C_ROMCON5 */
185 .long ( (KS32C_ROMCON_PMC_ROM) \
186 |(KS32C_ROMCON_TPA_5C) \
187 |(KS32C_ROMCON_TACC_5C) \
188 |((0x00000000 >> 16) << KS32C_ROMCON_BASE_shift) \
189 |((0x00000000 >> 16) << KS32C_ROMCON_NEXT_shift))
190 /* .long KS32C_DRAMCON0 */
191 .long ( (KS32C_DRAMCON_RESERVED) \
192 |(KS32C_DRAMCON_CAN_8) \
193 |(KS32C_DRAMCON_TRP_4C) \
194 |(KS32C_DRAMCON_TRC_2C) \
195 |((AIM711_DRAM_LA_START >> 16) << KS32C_DRAMCON_BASE_shift) \
196 |((AIM711_DRAM_LA_END >> 16) << KS32C_DRAMCON_NEXT_shift))
197 /* .long KS32C_DRAMCON1 */
198 .long ( (KS32C_DRAMCON_RESERVED) \
199 |(KS32C_DRAMCON_CAN_8) \
200 |(KS32C_DRAMCON_TRP_2C) \
201 |(KS32C_DRAMCON_TRC_2C) \
202 |((0x00000000 >> 16) << KS32C_DRAMCON_BASE_shift) \
203 |((0x00000000 >> 16) << KS32C_DRAMCON_NEXT_shift))
204 /* .long KS32C_DRAMCON2 */
205 .long ( (KS32C_DRAMCON_RESERVED) \
206 |(KS32C_DRAMCON_CAN_8) \
207 |(KS32C_DRAMCON_TRP_2C) \
208 |(KS32C_DRAMCON_TRC_2C) \
209 |((0x00000000 >> 16) << KS32C_DRAMCON_BASE_shift) \
210 |((0x00000000 >> 16) << KS32C_DRAMCON_NEXT_shift))
211 /* .long KS32C_DRAMCON3 */
212 .long ( (KS32C_DRAMCON_RESERVED) \
213 |(KS32C_DRAMCON_CAN_8) \
214 |(KS32C_DRAMCON_TRP_2C) \
215 |(KS32C_DRAMCON_TRC_2C) \
216 |((0x00000000 >> 16) << KS32C_DRAMCON_BASE_shift) \
217 |((0x00000000 >> 16) << KS32C_DRAMCON_NEXT_shift))
218 /* .long KS32C_REFEXTCON */
219 .long (((2048+1-(8*CYGNUM_HAL_CPUCLOCK/1000000)) << KS32C_REFEXTCON_RCV_shift) \
220 |(KS32C_REFEXTCON_TRC_4C) \
221 |(KS32C_REFEXTCON_REN) \
222 |(KS32C_REFEXTCON_VSF) \
223 |(AIM711_EXT0_LA_START >> 16) )
226 .long 0x07113001 /* ROM half-word, RAM word, EXT-IO */
227 .long 0x21080060 /* ROM 32 - 33 MByte */
233 .long 0x0800038e /* RAM 0 - 8 MByte */
237 .long 0xc01583fd /* Reactivate external Bus */
252 #if defined(CYG_HAL_STARTUP_ROM) || defined(CYG_HAL_STARTUP_ROMRAM)
253 #define PLATFORM_SETUP1 \
256 #define PLATFORM_SETUP1
259 //-----------------------------------------------------------------------------
260 // end of hal_platform_setup.h
261 #endif // CYGONCE_HAL_PLATFORM_SETUP_H