packages/hal/arm/arch/v2_0/include/hal_arch.h

   1 #ifndef CYGONCE_HAL_ARCH_H
   2 #define CYGONCE_HAL_ARCH_H
   3
   4 //==========================================================================
   5 //
   6 //      hal_arch.h
   7 //
   8 //      Architecture specific abstractions
   9 //
  10 //==========================================================================
  11 //####ECOSGPLCOPYRIGHTBEGIN####
  12 // -------------------------------------------
  13 // This file is part of eCos, the Embedded Configurable Operating System.
  14 // Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Red Hat, Inc.
  15 //
  16 // eCos is free software; you can redistribute it and/or modify it under
  17 // the terms of the GNU General Public License as published by the Free
  18 // Software Foundation; either version 2 or (at your option) any later version.
  19 //
  20 // eCos is distributed in the hope that it will be useful, but WITHOUT ANY
  21 // WARRANTY; without even the implied warranty of MERCHANTABILITY or
  22 // FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  23 // for more details.
  24 //
  25 // You should have received a copy of the GNU General Public License along
  26 // with eCos; if not, write to the Free Software Foundation, Inc.,
  27 // 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
  28 //
  29 // As a special exception, if other files instantiate templates or use macros
  30 // or inline functions from this file, or you compile this file and link it
  31 // with other works to produce a work based on this file, this file does not
  32 // by itself cause the resulting work to be covered by the GNU General Public
  33 // License. However the source code for this file must still be made available
  34 // in accordance with section (3) of the GNU General Public License.
  35 //
  36 // This exception does not invalidate any other reasons why a work based on
  37 // this file might be covered by the GNU General Public License.
  38 //
  39 // Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
  40 // at http://sources.redhat.com/ecos/ecos-license/
  41 // -------------------------------------------
  42 //####ECOSGPLCOPYRIGHTEND####
  43 //==========================================================================
  44 //#####DESCRIPTIONBEGIN####
  45 //
  46 // Author(s):    nickg, gthomas
  47 // Contributors: nickg, gthomas
  48 // Date:         1999-02-20
  49 // Purpose:      Define architecture abstractions
  50 // Usage:        #include <cyg/hal/hal_arch.h>
  51
  52 //
  53 //####DESCRIPTIONEND####
  54 //
  55 //==========================================================================
  56
  57 #include <pkgconf/hal.h>         // To decide on stack usage
  58 #include <cyg/infra/cyg_type.h>
  59
  60 #ifdef CYGBLD_HAL_ARM_PLF_ARCH_H
  61 #include <cyg/hal/plf_arch.h>
  62 #endif
  63
  64 #ifdef CYGBLD_HAL_ARM_VAR_ARCH_H
  65 #include <cyg/hal/var_arch.h>
  66 #endif
  67
  68 //
  69 // CPSR Register defines
  70 //
  71
  72 #define CPSR_IRQ_DISABLE        0x80    // IRQ disabled when =1
  73 #define CPSR_FIQ_DISABLE        0x40    // FIQ disabled when =1
  74 #define CPSR_THUMB_ENABLE       0x20    // Thumb mode when =1
  75 #define CPSR_USER_MODE          0x10
  76 #define CPSR_FIQ_MODE           0x11
  77 #define CPSR_IRQ_MODE           0x12
  78 #define CPSR_SUPERVISOR_MODE    0x13
  79 #define CPSR_UNDEF_MODE         0x1B
  80
  81 #define CPSR_MODE_BITS          0x1F
  82
  83 #define CPSR_INITIAL (CPSR_IRQ_DISABLE|CPSR_FIQ_DISABLE|CPSR_SUPERVISOR_MODE)
  84 #define CPSR_THREAD_INITIAL (CPSR_SUPERVISOR_MODE)
  85
  86 //--------------------------------------------------------------------------
  87 // Processor saved states:
  88 // The layout of this structure is also defined in "arm.inc", for assembly
  89 // code, which will be generated automatically if this file changes.
  90
  91 #define HAL_THREAD_CONTEXT_FIRST        0
  92 #define HAL_THREAD_CONTEXT_R0           (0-HAL_THREAD_CONTEXT_FIRST)
  93 #define HAL_THREAD_CONTEXT_R4           (4-HAL_THREAD_CONTEXT_FIRST)
  94 #define HAL_THREAD_CONTEXT_R8           (8-HAL_THREAD_CONTEXT_FIRST)
  95 #define HAL_THREAD_CONTEXT_R9           (9-HAL_THREAD_CONTEXT_FIRST)
  96 #define HAL_THREAD_CONTEXT_R10          (10-HAL_THREAD_CONTEXT_FIRST)
  97 #define HAL_THREAD_CONTEXT_LAST         10
  98 #define HAL_NUM_THREAD_CONTEXT_REGS     (HAL_THREAD_CONTEXT_LAST - \
  99                                           HAL_THREAD_CONTEXT_FIRST+1)
 100
 101 // It seems that r0-r3,r12 are considered scratch by function calls
 102
 103 typedef struct
 104 {
 105     // These are common to all saved states
 106     cyg_uint32  d[HAL_NUM_THREAD_CONTEXT_REGS] ;  // Data regs (r0..r10)
 107     cyg_uint32  fp;                               // (r11) Frame pointer
 108     cyg_uint32  ip;                               // (r12)
 109     cyg_uint32  sp;                               // (r13) Stack pointer
 110     cyg_uint32  lr;                               // (r14) Link Reg
 111     cyg_uint32  pc;                               // (r15) PC place holder
 112                                                   //       (never used)
 113     cyg_uint32  cpsr;                             // Condition Reg
 114     // These are only saved for exceptions and interrupts
 115     cyg_uint32  vector;                           // Vector number
 116     cyg_uint32  svc_lr;                           // saved svc mode lr
 117     cyg_uint32  svc_sp;                           // saved svc mode sp
 118
 119 } HAL_SavedRegisters;
 120
 121 //-------------------------------------------------------------------------
 122 // Exception handling function.
 123 // This function is defined by the kernel according to this prototype. It is
 124 // invoked from the HAL to deal with any CPU exceptions that the HAL does
 125 // not want to deal with itself. It usually invokes the kernel's exception
 126 // delivery mechanism.
 127
 128 externC void cyg_hal_deliver_exception( CYG_WORD code, CYG_ADDRWORD data );
 129
 130 //-------------------------------------------------------------------------
 131 // Bit manipulation macros
 132
 133 externC int hal_lsbindex(int);
 134 externC int hal_msbindex(int);
 135
 136 #define HAL_LSBIT_INDEX(index, mask) index = hal_lsbindex(mask)
 137 #define HAL_MSBIT_INDEX(index, mask) index = hal_msbindex(mask)
 138
 139 //-------------------------------------------------------------------------
 140 // Context Initialization
 141 // Initialize the context of a thread.
 142 // Arguments:
 143 // _sparg_ name of variable containing current sp, will be changed to new sp
 144 // _thread_ thread object address, passed as argument to entry point
 145 // _entry_ entry point address.
 146 // _id_ bit pattern used in initializing registers, for debugging.
 147
 148 #define HAL_THREAD_INIT_CONTEXT( _sparg_, _thread_, _entry_, _id_ )         \
 149     CYG_MACRO_START                                                         \
 150     register CYG_WORD _sp_ = ((CYG_WORD)_sparg_) &~15;                      \
 151     register HAL_SavedRegisters *_regs_;                                    \
 152     int _i_;                                                                \
 153     _regs_ = (HAL_SavedRegisters *)((_sp_) - sizeof(HAL_SavedRegisters));   \
 154     for( _i_ = HAL_THREAD_CONTEXT_FIRST; _i_ <= HAL_THREAD_CONTEXT_LAST;    \
 155            _i_++ )                                                          \
 156         (_regs_)->d[_i_] = (_id_)|_i_;                                      \
 157     (_regs_)->d[00] = (CYG_WORD)(_thread_); /* R0 = arg1 = thread ptr */    \
 158     (_regs_)->sp = (CYG_WORD)(_sp_);        /* SP = top of stack      */    \
 159     (_regs_)->lr = (CYG_WORD)(_entry_);     /* LR = entry point       */    \
 160     (_regs_)->pc = (CYG_WORD)(_entry_);     /* PC = [initial] entry point */\
 161     (_regs_)->cpsr = (CPSR_THREAD_INITIAL); /* PSR = Interrupt enabled */   \
 162     _sparg_ = (CYG_ADDRESS)_regs_;                                          \
 163     CYG_MACRO_END
 164
 165 //--------------------------------------------------------------------------
 166 // Context switch macros.
 167 // The arguments are pointers to locations where the stack pointer
 168 // of the current thread is to be stored, and from where the sp of the
 169 // next thread is to be fetched.
 170
 171 externC void hal_thread_switch_context( CYG_ADDRESS to, CYG_ADDRESS from );
 172 externC void hal_thread_load_context( CYG_ADDRESS to )
 173     __attribute__ ((noreturn));
 174
 175 #define HAL_THREAD_SWITCH_CONTEXT(_fspptr_,_tspptr_)                    \
 176         hal_thread_switch_context((CYG_ADDRESS)_tspptr_,                \
 177                                   (CYG_ADDRESS)_fspptr_);
 178
 179 #define HAL_THREAD_LOAD_CONTEXT(_tspptr_)                               \
 180         hal_thread_load_context( (CYG_ADDRESS)_tspptr_ );
 181
 182 //--------------------------------------------------------------------------
 183 // Execution reorder barrier.
 184 // When optimizing the compiler can reorder code. In multithreaded systems
 185 // where the order of actions is vital, this can sometimes cause problems.
 186 // This macro may be inserted into places where reordering should not happen.
 187
 188 #define HAL_REORDER_BARRIER() asm volatile ( "" : : : "memory" )
 189
 190 //--------------------------------------------------------------------------
 191 // Breakpoint support
 192 // HAL_BREAKPOINT() is a code sequence that will cause a breakpoint to happen
 193 // if executed.
 194 // HAL_BREAKINST is the value of the breakpoint instruction and
 195 // HAL_BREAKINST_SIZE is its size in bytes.
 196
 197 #define _stringify1(__arg) #__arg
 198 #define _stringify(__arg) _stringify1(__arg)
 199
 200 #define HAL_BREAKINST_ARM          0xE7FFDEFE
 201 #define HAL_BREAKINST_ARM_SIZE     4
 202 #define HAL_BREAKINST_THUMB        0xbebe  // illegal instruction currently
 203 #define HAL_BREAKINST_THUMB_SIZE   2
 204
 205 #ifdef __thumb__
 206
 207 # define HAL_BREAKPOINT(_label_)                         \
 208 asm volatile (" .code 16;"                               \
 209               " .globl  " #_label_ ";"                   \
 210               #_label_":"                                \
 211               " .short " _stringify(HAL_BREAKINST_THUMB) \
 212     );
 213
 214 # define HAL_BREAKINST           HAL_BREAKINST_THUMB
 215 # define HAL_BREAKINST_SIZE      HAL_BREAKINST_THUMB_SIZE
 216 # define HAL_BREAKINST_TYPE      cyg_uint16
 217 #else // __thumb__
 218
 219 #define HAL_BREAKPOINT(_label_)                   \
 220 asm volatile (" .globl  " #_label_ ";"            \
 221               #_label_":"                         \
 222               " .word " _stringify(HAL_BREAKINST_ARM) \
 223     );
 224
 225 //#define HAL_BREAKINST           {0xFE, 0xDE, 0xFF, 0xE7}
 226 #define HAL_BREAKINST            HAL_BREAKINST_ARM
 227 #define HAL_BREAKINST_SIZE       HAL_BREAKINST_ARM_SIZE
 228 #define HAL_BREAKINST_TYPE       cyg_uint32
 229 #endif // __thumb__
 230
 231
 232 extern cyg_uint32 __arm_breakinst;
 233 extern cyg_uint16 __thumb_breakinst;
 234 #define HAL_BREAKINST_ADDR(x) (((x)==2)? \
 235                               ((void*)&__thumb_breakinst) : \
 236                               ((void*)&__arm_breakinst))
 237
 238 //--------------------------------------------------------------------------
 239 // Thread register state manipulation for GDB support.
 240
 241 // Register layout expected by GDB
 242 typedef struct
 243 {
 244     cyg_uint32  gpr[16];
 245     cyg_uint32  f0[3];
 246     cyg_uint32  f1[3];
 247     cyg_uint32  f2[3];
 248     cyg_uint32  f3[3];
 249     cyg_uint32  f4[3];
 250     cyg_uint32  f5[3];
 251     cyg_uint32  f6[3];
 252     cyg_uint32  f7[3];
 253     cyg_uint32  fps;
 254     cyg_uint32  ps;
 255 } GDB_Registers;
 256
 257 // Translate a stack pointer as saved by the thread context macros above into
 258 // a pointer to a HAL_SavedRegisters structure.
 259 #define HAL_THREAD_GET_SAVED_REGISTERS( _sp_, _regs_ )  \
 260         (_regs_) = (HAL_SavedRegisters *)(_sp_)
 261
 262 // Copy a set of coprocessor registers from a HAL_SavedRegisters structure
 263 // into a GDB_Registers structure. GDB expects placeholders for FP regs
 264 // even for non-FP targets, so we just zero fill the fields.
 265 #define HAL_GET_GDB_COPROCESSOR_REGISTERS( _gdb_, _regs_ )      \
 266     CYG_MACRO_START                                             \
 267     cyg_uint32 *_p_ = _gdb_->f0;                                \
 268     for(_i_ = 0; _i_ < (8 * 3); _i_++)                          \
 269         *_p_++ = 0;                                             \
 270     _gdb_->fps = 0;                                             \
 271     CYG_MACRO_END
 272
 273 // Copy coprocessor registers from a GDB_Registers structure into a
 274 // HAL_SavedRegisters structure.
 275 #define HAL_SET_GDB_COPROCESSOR_REGISTERS( _regs_, _gdb_ )
 276
 277 // Copy a set of registers from a HAL_SavedRegisters structure into a
 278 // GDB_Registers structure.
 279 #define HAL_GET_GDB_REGISTERS( _aregval_, _regs_ )              \
 280     CYG_MACRO_START                                             \
 281     GDB_Registers *_gdb_ = (GDB_Registers *)(_aregval_);        \
 282     int _i_;                                                    \
 283                                                                 \
 284     for( _i_ = 0; _i_ <= 10; _i_++ )                            \
 285         _gdb_->gpr[_i_] = (_regs_)->d[_i_];                     \
 286                                                                 \
 287     _gdb_->gpr[11] = (_regs_)->fp;                              \
 288     _gdb_->gpr[12] = (_regs_)->ip;                              \
 289     _gdb_->gpr[13] = (_regs_)->sp;                              \
 290     _gdb_->gpr[14] = (_regs_)->lr;                              \
 291     _gdb_->gpr[15] = (_regs_)->pc;                              \
 292     _gdb_->ps = (_regs_)->cpsr;                                 \
 293     HAL_GET_GDB_COPROCESSOR_REGISTERS(_gdb_,_regs_);            \
 294     CYG_MACRO_END
 295
 296 // Copy a set of registers from a GDB_Registers structure into a
 297 // HAL_SavedRegisters structure.
 298 #define HAL_SET_GDB_REGISTERS( _regs_ , _aregval_ )             \
 299     CYG_MACRO_START                                             \
 300     GDB_Registers *_gdb_ = (GDB_Registers *)(_aregval_);        \
 301     int _i_;                                                    \
 302                                                                 \
 303     for( _i_ = 0; _i_ <= 10; _i_++ )                            \
 304         (_regs_)->d[_i_] = _gdb_->gpr[_i_];                     \
 305                                                                 \
 306     (_regs_)->fp = _gdb_->gpr[11];                              \
 307     (_regs_)->ip = _gdb_->gpr[12];                              \
 308     (_regs_)->sp = _gdb_->gpr[13];                              \
 309     (_regs_)->lr = _gdb_->gpr[14];                              \
 310     (_regs_)->pc = _gdb_->gpr[15];                              \
 311     (_regs_)->cpsr = _gdb_->ps;                                 \
 312     HAL_SET_GDB_COPROCESSOR_REGISTERS(_regs_,_gdb_);            \
 313     CYG_MACRO_END
 314
 315 #if defined(CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT) || defined(CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT)
 316 #define HAL_GET_PROFILE_INFO( _thepc_, _thesp_ )                \
 317     CYG_MACRO_START                                             \
 318     extern HAL_SavedRegisters *hal_saved_interrupt_state;       \
 319     if ( hal_saved_interrupt_state ) {                          \
 320         (_thepc_) = (char *)(hal_saved_interrupt_state->pc);    \
 321         (_thesp_) = (char *)(hal_saved_interrupt_state->sp);    \
 322     }                                                           \
 323     CYG_MACRO_END
 324 #endif
 325
 326 //--------------------------------------------------------------------------
 327 // HAL setjmp
 328
 329 #define CYGARC_JMP_BUF_SIZE 16  // Actually 11, but some room left over
 330
 331 typedef cyg_uint32 hal_jmp_buf[CYGARC_JMP_BUF_SIZE];
 332
 333 externC int hal_setjmp(hal_jmp_buf env);
 334 externC void hal_longjmp(hal_jmp_buf env, int val);
 335
 336
 337 //--------------------------------------------------------------------------
 338 // Idle thread code.
 339 // This macro is called in the idle thread loop, and gives the HAL the
 340 // chance to insert code. Typical idle thread behaviour might be to halt the
 341 // processor. Here we only supply a default fallback if the variant/platform
 342 // doesn't define anything.
 343
 344 #ifndef HAL_IDLE_THREAD_ACTION
 345 #define HAL_IDLE_THREAD_ACTION(_count_) CYG_EMPTY_STATEMENT
 346 #endif
 347
 348 //---------------------------------------------------------------------------
 349
 350 // Minimal and sensible stack sizes: the intention is that applications
 351 // will use these to provide a stack size in the first instance prior to
 352 // proper analysis.  Idle thread stack should be this big.
 353
 354 //    THESE ARE NOT INTENDED TO BE MICROMETRICALLY ACCURATE FIGURES.
 355 //           THEY ARE HOWEVER ENOUGH TO START PROGRAMMING.
 356 // YOU MUST MAKE YOUR STACKS LARGER IF YOU HAVE LARGE "AUTO" VARIABLES!
 357
 358 // This is not a config option because it should not be adjusted except
 359 // under "enough rope" sort of disclaimers.
 360
 361 // A minimal, optimized stack frame, rounded up - no autos
 362 #define CYGNUM_HAL_STACK_FRAME_SIZE (4 * 20)
 363
 364 // Stack needed for a context switch: this is implicit in the estimate for
 365 // interrupts so not explicitly used below:
 366 #define CYGNUM_HAL_STACK_CONTEXT_SIZE (4 * 20)
 367
 368 // Interrupt + call to ISR, interrupt_end() and the DSR
 369 #define CYGNUM_HAL_STACK_INTERRUPT_SIZE \
 370     ((4 * 20) + 2 * CYGNUM_HAL_STACK_FRAME_SIZE)
 371
 372 // Space for the maximum number of nested interrupts, plus room to call functions
 373 #define CYGNUM_HAL_MAX_INTERRUPT_NESTING 4
 374
 375 #define CYGNUM_HAL_STACK_SIZE_MINIMUM \
 376         (CYGNUM_HAL_MAX_INTERRUPT_NESTING * CYGNUM_HAL_STACK_INTERRUPT_SIZE + \
 377          2 * CYGNUM_HAL_STACK_FRAME_SIZE)
 378
 379 #define CYGNUM_HAL_STACK_SIZE_TYPICAL \
 380         (CYGNUM_HAL_STACK_SIZE_MINIMUM + \
 381          16 * CYGNUM_HAL_STACK_FRAME_SIZE)
 382
 383 //--------------------------------------------------------------------------
 384 // Macros for switching context between two eCos instances (jump from
 385 // code in ROM to code in RAM or vice versa).
 386 #define CYGARC_HAL_SAVE_GP()
 387 #define CYGARC_HAL_RESTORE_GP()
 388
 389 #endif // CYGONCE_HAL_ARCH_H
 390 // End of hal_arch.h