1 # ====================================================================
3 # hal_arm_arm9_aaed2000.cdl
5 # Agilent AAED2000 platform HAL package configuration data
7 # ====================================================================
8 #####ECOSGPLCOPYRIGHTBEGIN####
9 ## -------------------------------------------
10 ## This file is part of eCos, the Embedded Configurable Operating System.
11 ## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
13 ## eCos is free software; you can redistribute it and/or modify it under
14 ## the terms of the GNU General Public License as published by the Free
15 ## Software Foundation; either version 2 or (at your option) any later version.
17 ## eCos is distributed in the hope that it will be useful, but WITHOUT ANY
18 ## WARRANTY; without even the implied warranty of MERCHANTABILITY or
19 ## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
22 ## You should have received a copy of the GNU General Public License along
23 ## with eCos; if not, write to the Free Software Foundation, Inc.,
24 ## 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
26 ## As a special exception, if other files instantiate templates or use macros
27 ## or inline functions from this file, or you compile this file and link it
28 ## with other works to produce a work based on this file, this file does not
29 ## by itself cause the resulting work to be covered by the GNU General Public
30 ## License. However the source code for this file must still be made available
31 ## in accordance with section (3) of the GNU General Public License.
33 ## This exception does not invalidate any other reasons why a work based on
34 ## this file might be covered by the GNU General Public License.
36 ## Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
37 ## at http://sources.redhat.com/ecos/ecos-license/
38 ## -------------------------------------------
39 #####ECOSGPLCOPYRIGHTEND####
40 # ====================================================================
41 ######DESCRIPTIONBEGIN####
44 # Original data: gthomas
48 #####DESCRIPTIONEND####
50 # ====================================================================
51 cdl_package CYGPKG_HAL_ARM_ARM9_AAED2000 {
52 display "Agilent Aaed2000 evaluation board"
53 parent CYGPKG_HAL_ARM_ARM9
54 requires CYGPKG_HAL_ARM_ARM9_ARM920T
57 define_header hal_arm_arm9_aaed2000.h
59 This HAL platform package provides generic
60 support for the Agilent based board, known as 'aaed2000'."
62 compile aaed2000_misc.c hal_diag.c kbd_drvr.c
64 implements CYGINT_HAL_DEBUG_GDB_STUBS
65 implements CYGINT_HAL_DEBUG_GDB_STUBS_BREAK
66 implements CYGINT_HAL_VIRTUAL_VECTOR_SUPPORT
67 implements CYGINT_HAL_PLF_IF_INIT
71 puts $::cdl_system_header "#define CYGBLD_HAL_TARGET_H <pkgconf/hal_arm.h>"
72 puts $::cdl_system_header "#define CYGBLD_HAL_VARIANT_H <pkgconf/hal_arm_arm9.h>"
73 puts $::cdl_system_header "#define CYGBLD_HAL_PLATFORM_H <pkgconf/hal_arm_arm9_aaed2000.h>"
75 puts $::cdl_header "#define HAL_PLATFORM_CPU \"ARM9\""
76 puts $::cdl_header "#define HAL_PLATFORM_BOARD \"AAED2000 system\""
77 puts $::cdl_header "#define HAL_PLATFORM_EXTRA \"\[\" __Xstr(CYGHWR_REDBOOT_BOOTMONITOR) \"\]\" "
78 puts $::cdl_header "#define HAL_PLATFORM_MACHINE_TYPE 106"
81 cdl_component CYG_HAL_STARTUP {
82 display "Startup type"
85 legal_values {"RAM" "ROM" "ROMRAM" }
87 define -file system.h CYG_HAL_STARTUP
89 When targetting the Aaed2000 eval board it is possible to build
90 the system for either RAM bootstrap or ROM bootstrap(s). Select
91 'ram' when building programs to load into RAM using eCos GDB
92 stubs. Select 'rom' when building a stand-alone application
93 which will be put into ROM, or for the special case of
94 building the eCos GDB stubs themselves."
97 cdl_component CYGNUM_HAL_ARM_AAED2000_CLOCK {
98 display "Board (CPU and bus) speed"
100 legal_values {"150/75MHz" "166/83MHz"}
101 default_value {"150/75MHz"}
103 This option controls the CPU and bus frequencies. It
104 does so by presetting the PLL details when one of the
105 frequency combinations are selected. It's also possible
106 to customize the PLL values by selecting 'Custom'
107 and adjusting the options accordingly. See the 'Clock and Control'
108 section of the CPU manual for further information."
110 # Note: there are options for these settings, even though they
111 # are compute. That's because I initially thought the cpu/bus
112 # speed could be calculated properly - for now they are also
113 # just set as a result of the _CLOCK choice.
114 # See table 5-7 in the manual for the setting of these parameters.
115 cdl_option CYGNUM_HAL_ARM_AAED2000_CLOCK_REF {
116 display "CPU clock reference clock (crystal)"
120 This is the CPU reference clock. It is 14.7456MHz and
124 cdl_option CYGNUM_HAL_ARM_AAED2000_CLOCK_HCLKDIV {
125 display "CPU clock HCLKDIV"
127 calculated { CYGNUM_HAL_ARM_AAED2000_CLOCK == "150/75MHz" ? 1 :
128 CYGNUM_HAL_ARM_AAED2000_CLOCK == "166/83MHz" ? 1 :
134 cdl_option CYGNUM_HAL_ARM_AAED2000_CLOCK_PREDIV {
135 display "CPU clock PREDIV"
137 calculated { CYGNUM_HAL_ARM_AAED2000_CLOCK == "150/75MHz" ? 12 :
138 CYGNUM_HAL_ARM_AAED2000_CLOCK == "166/83MHz" ? 18 :
144 cdl_option CYGNUM_HAL_ARM_AAED2000_CLOCK_MAINDIV1 {
145 display "CPU clock MAINDIV1"
147 calculated { CYGNUM_HAL_ARM_AAED2000_CLOCK == "150/75MHz" ? 13 :
148 CYGNUM_HAL_ARM_AAED2000_CLOCK == "166/83MHz" ? 13 :
154 cdl_option CYGNUM_HAL_ARM_AAED2000_CLOCK_MAINDIV2 {
155 display "CPU clock MAINDIV2"
157 calculated { CYGNUM_HAL_ARM_AAED2000_CLOCK == "150/75MHz" ? 17 :
158 CYGNUM_HAL_ARM_AAED2000_CLOCK == "166/83MHz" ? 28 :
164 cdl_option CYGNUM_HAL_ARM_AAED2000_CLOCK_PCLKDIV {
165 display "CPU clock PCLKDIV"
167 calculated { CYGNUM_HAL_ARM_AAED2000_CLOCK == "150/75MHz" ? 1 :
168 CYGNUM_HAL_ARM_AAED2000_CLOCK == "166/83MHz" ? 1 :
174 cdl_option CYGNUM_HAL_ARM_AAED2000_CLOCK_PS {
175 display "CPU clock PS"
177 calculated { CYGNUM_HAL_ARM_AAED2000_CLOCK == "150/75MHz" ? 1 :
178 CYGNUM_HAL_ARM_AAED2000_CLOCK == "166/83MHz" ? 1 :
185 cdl_option CYGNUM_HAL_ARM_AAED2000_CPU_CLOCK {
188 calculated { CYGNUM_HAL_ARM_AAED2000_CLOCK == "150/75MHz" ? 150890000 :
189 CYGNUM_HAL_ARM_AAED2000_CLOCK == "166/83MHz" ? 165888000 :
192 This is the actual CPU operating frequency."
195 cdl_option CYGNUM_HAL_ARM_AAED2000_BUS_CLOCK {
198 calculated { CYGNUM_HAL_ARM_AAED2000_CLOCK == "150/75MHz" ? 75445000 :
199 CYGNUM_HAL_ARM_AAED2000_CLOCK == "166/83MHz" ? 82944000 :
202 This is the actual bus operating frequency."
207 # Real-time clock/counter specifics
208 cdl_component CYGNUM_HAL_RTC_CONSTANTS {
209 display "Real-time clock constants"
213 cdl_option CYGNUM_HAL_RTC_NUMERATOR {
214 display "Real-time clock numerator"
216 default_value 1000000000
218 cdl_option CYGNUM_HAL_RTC_DENOMINATOR {
219 display "Real-time clock denominator"
223 # The timer used runs at 508kHz
224 cdl_option CYGNUM_HAL_RTC_PERIOD {
225 display "Real-time clock period"
227 default_value ((508000/CYGNUM_HAL_RTC_DENOMINATOR)-1)
231 cdl_component CYGSEM_AAED2000_LCD_SUPPORT {
232 display "Support LCD"
235 compile lcd_support.c
237 Enabling this option will enable the use the LCD as a
238 simple framebuffer, suitable for use with a windowing
241 cdl_option CYGSEM_AAED2000_LCD_PORTRAIT_MODE {
242 display "LCD portrait mode"
246 Setting this option will orient the data on the LCD screen
247 in portrait (480x640) mode."
250 cdl_component CYGSEM_AAED2000_LCD_COMM {
251 display "Support LCD/keyboard for comminication channel"
252 active_if CYGPKG_REDBOOT
256 Enabling this option will use the LCD and keyboard for a
257 communications channel, suitable for RedBoot, etc."
259 cdl_option CYGOPT_AAED2000_LCD_COMM_LOGO {
260 display "RedHat logo location"
262 legal_values { "TOP" "BOTTOM" }
263 default_value { "TOP" }
265 Use this option to control where the RedHat logo is placed
272 cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_BAUD {
273 display "Diagnostic serial port baud rate"
275 legal_values 9600 19200 38400 57600 115200
278 This option selects the baud rate used for the diagnostic port.
279 Note: this should match the value chosen for the GDB port if the
280 diagnostic and GDB port are the same."
283 cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_DEBUG_CHANNEL_BAUD {
284 display "GDB serial port baud rate"
286 legal_values 9600 19200 38400 57600 115200
289 This option selects the baud rate used for the diagnostic port.
290 Note: this should match the value chosen for the GDB port if the
291 diagnostic and GDB port are the same."
294 cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS {
295 display "Number of communication channels on the board"
297 calculated 1+CYGSEM_AAED2000_LCD_COMM
300 cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_DEBUG_CHANNEL {
301 display "Debug serial port"
302 active_if CYGPRI_HAL_VIRTUAL_VECTOR_DEBUG_CHANNEL_CONFIGURABLE
304 legal_values 0 to CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS-1
307 The aaed2000 board has two serial ports. This option
308 chooses which port will be used to connect to a host
312 cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_DEFAULT {
313 display "Default console channel."
315 legal_values 0 to CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS-1
319 cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL {
320 display "Diagnostic serial port"
321 active_if CYGPRI_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_CONFIGURABLE
323 legal_values 0 to CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS-1
324 default_value CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_DEFAULT
326 The aaed2000 board has two serial ports. This option
327 chooses which port will be used for diagnostic output."
330 cdl_component CYGBLD_GLOBAL_OPTIONS {
331 display "Global build options"
335 Global build options including control over
336 compiler flags, linker flags and choice of toolchain."
341 cdl_option CYGBLD_GLOBAL_COMMAND_PREFIX {
342 display "Global command prefix"
345 default_value { "arm-elf" }
347 This option specifies the command prefix used when
348 invoking the build tools."
351 cdl_option CYGBLD_GLOBAL_CFLAGS {
352 display "Global compiler flags"
355 default_value { "-mcpu=arm9 -Wall -Wpointer-arith -Wstrict-prototypes -Winline -Wundef -Woverloaded-virtual -g -O2 -ffunction-sections -fdata-sections -fno-rtti -fno-exceptions -fvtable-gc -finit-priority" }
357 This option controls the global compiler flags which are used to
358 compile all packages by default. Individual packages may define
359 options which override these global flags."
362 cdl_option CYGBLD_GLOBAL_LDFLAGS {
363 display "Global linker flags"
366 default_value { "-Wl,--gc-sections -Wl,-static -g -O2 -nostdlib" }
368 This option controls the global linker flags. Individual
369 packages may define options which override these global flags."
372 cdl_option CYGBLD_BUILD_GDB_STUBS {
373 display "Build GDB stub ROM image"
375 requires { CYG_HAL_STARTUP == "ROM" }
376 requires CYGSEM_HAL_ROM_MONITOR
377 requires CYGBLD_BUILD_COMMON_GDB_STUBS
378 requires CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
379 requires CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT
380 requires CYGDBG_HAL_DEBUG_GDB_THREAD_SUPPORT
381 requires ! CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT
382 requires ! CYGDBG_HAL_COMMON_CONTEXT_SAVE_MINIMUM
385 This option enables the building of the GDB stubs for the
386 board. The common HAL controls takes care of most of the
387 build process, but the final conversion from ELF image to
388 binary data is handled by the platform CDL, allowing
389 relocation of the data if necessary."
392 <PREFIX>/bin/gdb_module.srec : <PREFIX>/bin/gdb_module.img
393 $(OBJCOPY) --remove-section=.fixed_vectors $< gdb_module.tmp
394 $(OBJCOPY) -O srec --change-address 0x10000000 gdb_module.tmp $@
399 cdl_component CYGPKG_HAL_ARM_ARM9_AAED2000_OPTIONS {
400 display "ARM9/AAED2000 build options"
404 Package specific build options including control over
405 compiler flags used only in building this package,
406 and details of which tests are built."
409 cdl_option CYGPKG_HAL_ARM_ARM9_AAED2000_CFLAGS_ADD {
410 display "Additional compiler flags"
415 This option modifies the set of compiler flags for
416 building the ARM9 AAED2000 HAL. These flags are used in addition
417 to the set of global flags."
420 cdl_option CYGPKG_HAL_ARM_ARM9_AAED2000_CFLAGS_REMOVE {
421 display "Suppressed compiler flags"
426 This option modifies the set of compiler flags for
427 building the ARM9 AAED2000 HAL. These flags are removed from
428 the set of global flags if present."
431 cdl_option CYGPKG_HAL_ARM_ARM9_AAED2000_TESTS {
432 display "ARM9/AAED2000 tests"
437 This option specifies the set of tests for the ARM9 Aaed2000 HAL."
441 cdl_component CYGHWR_MEMORY_LAYOUT {
442 display "Memory layout"
445 calculated { CYG_HAL_STARTUP == "RAM" ? "arm_arm9_aaed2000_ram" : \
446 CYG_HAL_STARTUP == "ROM" ? "arm_arm9_aaed2000_rom" : \
447 "arm_arm9_aaed2000_romram" }
449 cdl_option CYGHWR_MEMORY_LAYOUT_LDI {
450 display "Memory layout linker script fragment"
453 define -file system.h CYGHWR_MEMORY_LAYOUT_LDI
454 calculated { CYG_HAL_STARTUP == "RAM" ? "<pkgconf/mlt_arm_arm9_aaed2000_ram.ldi>" : \
455 CYG_HAL_STARTUP == "ROM" ? "<pkgconf/mlt_arm_arm9_aaed2000_rom.ldi>" : \
456 "<pkgconf/mlt_arm_arm9_aaed2000_romram.ldi>" }
459 cdl_option CYGHWR_MEMORY_LAYOUT_H {
460 display "Memory layout header file"
463 define -file system.h CYGHWR_MEMORY_LAYOUT_H
464 calculated { CYG_HAL_STARTUP == "RAM" ? "<pkgconf/mlt_arm_arm9_aaed2000_ram.h>" : \
465 CYG_HAL_STARTUP == "ROM" ? "<pkgconf/mlt_arm_arm9_aaed2000_rom.h>" : \
466 "<pkgconf/mlt_arm_arm9_aaed2000_romram.h>" }
470 cdl_option CYGSEM_HAL_ROM_MONITOR {
471 display "Behave as a ROM monitor"
474 parent CYGPKG_HAL_ROM_MONITOR
475 requires { CYG_HAL_STARTUP == "ROM" || CYG_HAL_STARTUP == "ROMRAM" }
477 Enable this option if this program is to be used as a ROM monitor,
478 i.e. applications will be loaded into RAM on the board, and this
479 ROM monitor may process exceptions or interrupts generated from the
480 application. This enables features such as utilizing a separate
481 interrupt stack when exceptions are generated."
484 cdl_option CYGSEM_HAL_USE_ROM_MONITOR {
485 display "Work with a ROM monitor"
487 legal_values { "Generic" "GDB_stubs" }
488 default_value { CYG_HAL_STARTUP == "RAM" ? "GDB_stubs" : 0 }
489 parent CYGPKG_HAL_ROM_MONITOR
490 requires { CYG_HAL_STARTUP == "RAM" }
492 Support can be enabled for different varieties of ROM monitor.
493 This support changes various eCos semantics such as the encoding
494 of diagnostic output, or the overriding of hardware interrupt
496 Firstly there is \"Generic\" support which prevents the HAL
497 from overriding the hardware vectors that it does not use, to
498 instead allow an installed ROM monitor to handle them. This is
499 the most basic support which is likely to be common to most
500 implementations of ROM monitor.
501 \"GDB_stubs\" provides support when GDB stubs are included in
502 the ROM monitor or boot ROM."
505 cdl_component CYGPKG_REDBOOT_HAL_OPTIONS {
506 display "Redboot HAL options"
509 parent CYGPKG_REDBOOT
510 active_if CYGPKG_REDBOOT
512 This option lists the target's requirements for a valid Redboot
515 # The backup image is not needed, since ROMRAM is the normal
516 # RedBoot startup type.
517 requires {!CYGPKG_REDBOOT_FLASH || CYGOPT_REDBOOT_FIS_REDBOOT_BACKUP == 0}
520 requires { CYGPKG_REDBOOT_ARM_LINUX_EXEC }
521 requires { CYGHWR_REDBOOT_ARM_LINUX_EXEC_ADDRESS_DEFAULT == 0xf0008000 }
523 puts $::cdl_header "#define CYGHWR_REDBOOT_ARM_TRAMPOLINE_ADDRESS 0x00001f00"
526 cdl_option CYGHWR_REDBOOT_BOOTMONITOR {
527 display "Controls where RedBoot is in the boot chain"
528 default_value {"Primary"}
529 legal_values {"Primary"}
531 active_if CYGPKG_REDBOOT_FLASH
533 This option selects whether RedBoot sits in the boot chain.
534 Presently it's only supported as the primary booter."
537 cdl_option CYGBLD_BUILD_REDBOOT_BIN {
538 display "Build Redboot ROM binary image"
539 active_if CYGBLD_BUILD_REDBOOT
542 description "This option enables the conversion of the Redboot ELF
543 image to the various relocated SREC images needed
547 <PREFIX>/bin/redboot.bin : <PREFIX>/bin/redboot.elf
548 $(OBJCOPY) --strip-debug $< $(@:.bin=.img)
549 $(OBJCOPY) -O srec $< $(@:.bin=.srec)
550 $(OBJCOPY) -O binary $< $@