1 #ifndef CYGONCE_HAL_CMA230_H
2 #define CYGONCE_HAL_CMA230_H
4 /*=============================================================================
8 // HAL Support for Kernel Diagnostic Routines
10 //=============================================================================
11 //####ECOSGPLCOPYRIGHTBEGIN####
12 // -------------------------------------------
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41 // -------------------------------------------
42 //####ECOSGPLCOPYRIGHTEND####
43 //=============================================================================
44 //#####DESCRIPTIONBEGIN####
47 // Contributors: gthomas
49 // Purpose: Cogent CMA230 hardware description
51 // Usage: #include <cyg/hal/hal_cma230.h>
53 //####DESCRIPTIONEND####
55 //===========================================================================*/
57 // Note: these defintions match the documentation, thus no attempt is made
58 // to sanitise (mangle) the names. Also, care should be taken to keep this
59 // clean for use in assembly code (no "C" constructs).
61 #define CMA230_ISR 0x0F600000 // Interrupt source register - Read only
62 #define CMA230_CLR 0x0F600008 // Clear interrupt source - Write only
63 #define CMA230_IMRr 0x0F600010 // Interrupt mask register - Read only
64 #define CMA230_IMRw 0x0F600018 // Interrupt mask register - Write only
65 #define CMA230_ACK1 0x0F600020 // Interrupt acknowledge slot 1 - Read only
66 #define CMA230_ACK2 0x0F600028 // Interrupt acknowledge slot 2 - Read only
67 #define CMA230_ACK3 0x0F600030 // Interrupt acknowledge slot 3 - Read only
69 #define CMA230_TC_COUNT 0x0F700020 // Timer value - 16 bits - Read only
70 #define CMA230_TC_PRELOAD 0x0F700028 // Timer preload - 16 bits - Write only
71 #define CMA230_TC_CLEAR 0x0F700030 // Timer clear - Write only
72 #define CMA230_TC_ENABLE 0x0F700038 // Timer enable/start - Write only
74 // Motherboard definitions
76 #define CMA101_DUARTB 0x0E900000 // Base address
77 #define CMA101_DUARTB_RHR 0x0E900000 // Receive holding register
78 #define CMA101_DUARTB_THR 0x0E900000 // Transmit holding register
79 #define CMA101_DUARTB_LBR 0x0E900000 // Low byte of baud rate
80 #define CMA101_DUARTB_IER 0x0E900008 // Interrupt enable
81 #define CMA101_DUARTB_HBR 0x0E900008 // High byte of baud rate
82 #define CMA101_DUARTB_ISR 0x0E900010 // Interrupt status
83 #define CMA101_DUARTB_FCTL 0x0E900010 // FIFO control
84 #define CMA101_DUARTB_LCTL 0x0E900018 // Line control
85 #define CMA101_DUARTB_MCTL 0x0E900020 // Modem control
86 #define CMA101_DUARTB_LSR 0x0E900028 // Line status
87 #define CMA101_DUARTB_MSR 0x0E900030 // Modem status
88 #define CMA101_DUARTB_SCR 0x0E900038 // Scratch
90 #define CMA101_DUARTA 0x0E900040 // Base address
91 #define CMA101_DUARTA_RHR 0x0E900040 // Receive holding register
92 #define CMA101_DUARTA_THR 0x0E900040 // Transmit holding register
93 #define CMA101_DUARTA_LBR 0x0E900040 // Low byte of baud rate
94 #define CMA101_DUARTA_IER 0x0E900048 // Interrupt enable
95 #define CMA101_DUARTA_HBR 0x0E900048 // High byte of baud rate
96 #define CMA101_DUARTA_ISR 0x0E900050 // Interrupt status
97 #define CMA101_DUARTA_FCTL 0x0E900050 // FIFO control
98 #define CMA101_DUARTA_LCTL 0x0E900058 // Line control
99 #define CMA101_DUARTA_MCTL 0x0E900060 // Modem control
100 #define CMA101_DUARTA_LSR 0x0E900068 // Line status
101 #define CMA101_DUARTA_MSR 0x0E900070 // Modem status
102 #define CMA101_DUARTA_SCR 0x0E900078 // Scratch
104 /*---------------------------------------------------------------------------*/
105 /* end of hal_cma230.h */
106 #endif /* CYGONCE_HAL_CMA230_H */