1 /*=============================================================================
5 // HAL diagnostic output code
7 //=============================================================================
8 //####ECOSGPLCOPYRIGHTBEGIN####
9 // -------------------------------------------
10 // This file is part of eCos, the Embedded Configurable Operating System.
11 // Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
12 // Copyright (C) 2004 eCosCentric Limited
14 // eCos is free software; you can redistribute it and/or modify it under
15 // the terms of the GNU General Public License as published by the Free
16 // Software Foundation; either version 2 or (at your option) any later version.
18 // eCos is distributed in the hope that it will be useful, but WITHOUT ANY
19 // WARRANTY; without even the implied warranty of MERCHANTABILITY or
20 // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
23 // You should have received a copy of the GNU General Public License along
24 // with eCos; if not, write to the Free Software Foundation, Inc.,
25 // 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
27 // As a special exception, if other files instantiate templates or use macros
28 // or inline functions from this file, or you compile this file and link it
29 // with other works to produce a work based on this file, this file does not
30 // by itself cause the resulting work to be covered by the GNU General Public
31 // License. However the source code for this file must still be made available
32 // in accordance with section (3) of the GNU General Public License.
34 // This exception does not invalidate any other reasons why a work based on
35 // this file might be covered by the GNU General Public License.
36 // -------------------------------------------
37 //####ECOSGPLCOPYRIGHTEND####
38 //=============================================================================
39 //#####DESCRIPTIONBEGIN####
42 // Contributors:jskov, gthomas
44 // Purpose: HAL diagnostic output
45 // Description: Implementations of HAL diagnostic output support.
47 //####DESCRIPTIONEND####
49 //===========================================================================*/
52 //===========================================================================
54 //===========================================================================
55 #include <pkgconf/hal.h>
56 #include CYGBLD_HAL_PLATFORM_H
58 #include <cyg/infra/cyg_type.h> // base types
60 #include <cyg/hal/hal_arch.h> // SAVE/RESTORE GP macros
61 #include <cyg/hal/hal_io.h> // IO macros
62 #include <cyg/hal/hal_if.h> // interface API
63 #include <cyg/hal/hal_intr.h> // HAL_ENABLE/MASK/UNMASK_INTERRUPTS
64 #include <cyg/hal/hal_misc.h> // Helper functions
65 #include <cyg/hal/drv_api.h> // CYG_ISR_HANDLED
66 #include <cyg/hal/hal_diag.h>
68 #include <cyg/hal/var_io.h> // USART registers
69 #include <cyg/hal/lpc24xx_misc.h> // peripheral identifiers
72 //===========================================================================
74 //===========================================================================-
78 cyg_int32 msec_timeout;
86 // Diagnostic serial channel data
88 static channel_data_t lpc2xxx_ser_channels[2] =
90 { (cyg_uint8*)CYGARC_HAL_LPC24XX_REG_UART0_BASE,
92 CYGNUM_HAL_INTERRUPT_UART0,
93 CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_BAUD,
94 CYNUM_HAL_LPC24XX_PCLK_UART0},
96 { (cyg_uint8*)CYGARC_HAL_LPC24XX_REG_UART1_BASE,
98 CYGNUM_HAL_INTERRUPT_UART1,
99 CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_BAUD,
100 CYNUM_HAL_LPC24XX_PCLK_UART1}
104 //===========================================================================
105 // Initialize diagnostic serial channel
106 //===========================================================================
107 static void cyg_hal_plf_serial_init_channel(void* __ch_data)
109 channel_data_t* chan = (channel_data_t*)__ch_data;
110 cyg_uint8* base = chan->base;
111 cyg_uint16 divider = CYG_HAL_ARM_LPC24XX_BAUD_GENERATOR(chan->periph_id,
114 HAL_WRITE_UINT32(base + CYGARC_HAL_LPC24XX_REG_UxLCR,
115 CYGARC_HAL_LPC24XX_REG_UxLCR_DLAB);
116 HAL_WRITE_UINT32(base + CYGARC_HAL_LPC24XX_REG_UxDLM, divider >> 8);
117 HAL_WRITE_UINT32(base + CYGARC_HAL_LPC24XX_REG_UxDLL, divider & 0xFF);
120 HAL_WRITE_UINT32(base + CYGARC_HAL_LPC24XX_REG_UxLCR,
121 CYGARC_HAL_LPC24XX_REG_UxLCR_WORD_LENGTH_8 |
122 CYGARC_HAL_LPC24XX_REG_UxLCR_STOP_1);
124 // Reset and enable FIFO
125 HAL_WRITE_UINT32(base + CYGARC_HAL_LPC24XX_REG_UxFCR,
126 CYGARC_HAL_LPC24XX_REG_UxFCR_FIFO_ENA |
127 CYGARC_HAL_LPC24XX_REG_UxFCR_RX_FIFO_RESET |
128 CYGARC_HAL_LPC24XX_REG_UxFCR_TX_FIFO_RESET);
132 //===========================================================================
133 // Write single character
134 //===========================================================================
135 void cyg_hal_plf_serial_putc(void *__ch_data, char c)
137 cyg_uint8* base = ((channel_data_t*)__ch_data)->base;
139 CYGARC_HAL_SAVE_GP();
142 HAL_READ_UINT32(base + CYGARC_HAL_LPC24XX_REG_UxLSR, stat);
143 } while ((stat & CYGARC_HAL_LPC24XX_REG_UxLSR_THRE) == 0);
145 HAL_WRITE_UINT32(base + CYGARC_HAL_LPC24XX_REG_UxTHR, c);
147 CYGARC_HAL_RESTORE_GP();
151 //===========================================================================
152 // Read single character non blocking
153 //===========================================================================
154 static cyg_bool cyg_hal_plf_serial_getc_nonblock(void* __ch_data, cyg_uint8* ch)
156 channel_data_t* chan = (channel_data_t*)__ch_data;
157 cyg_uint8* base = chan->base;
160 HAL_READ_UINT32(base + CYGARC_HAL_LPC24XX_REG_UxLSR, stat);
161 if ((stat & CYGARC_HAL_LPC24XX_REG_UxLSR_RDR) == 0)
164 HAL_READ_UINT32(base + CYGARC_HAL_LPC24XX_REG_UxRBR, *ch);
170 //===========================================================================
171 // Read single character blocking
172 //===========================================================================
173 cyg_uint8 cyg_hal_plf_serial_getc(void* __ch_data)
176 CYGARC_HAL_SAVE_GP();
178 while(!cyg_hal_plf_serial_getc_nonblock(__ch_data, &ch));
180 CYGARC_HAL_RESTORE_GP();
185 //===========================================================================
186 // Write data buffer via serial line
187 //===========================================================================
188 static void cyg_hal_plf_serial_write(void* __ch_data, const cyg_uint8* __buf,
191 CYGARC_HAL_SAVE_GP();
194 cyg_hal_plf_serial_putc(__ch_data, *__buf++);
196 CYGARC_HAL_RESTORE_GP();
200 //===========================================================================
202 //===========================================================================
203 static void cyg_hal_plf_serial_read(void* __ch_data, cyg_uint8* __buf,
206 CYGARC_HAL_SAVE_GP();
209 *__buf++ = cyg_hal_plf_serial_getc(__ch_data);
211 CYGARC_HAL_RESTORE_GP();
215 //===========================================================================
216 // Read single character with timeout
217 //===========================================================================
218 cyg_bool cyg_hal_plf_serial_getc_timeout(void* __ch_data, cyg_uint8* ch)
221 channel_data_t* chan = (channel_data_t*)__ch_data;
223 CYGARC_HAL_SAVE_GP();
225 delay_count = chan->msec_timeout * 10; // delay in .1 ms steps
228 res = cyg_hal_plf_serial_getc_nonblock(__ch_data, ch);
229 if (res || 0 == delay_count--)
232 CYGACC_CALL_IF_DELAY_US(100);
235 CYGARC_HAL_RESTORE_GP();
240 //===========================================================================
241 // Control serial channel configuration
242 //===========================================================================
243 static int cyg_hal_plf_serial_control(void *__ch_data,
244 __comm_control_cmd_t __func, ...)
246 static int irq_state = 0;
247 channel_data_t* chan = (channel_data_t*)__ch_data;
248 cyg_uint8* base = ((channel_data_t*)__ch_data)->base;
252 CYGARC_HAL_SAVE_GP();
253 va_start(ap, __func);
256 case __COMMCTL_GETBAUD:
257 ret = chan->baud_rate;
259 case __COMMCTL_SETBAUD:
260 chan->baud_rate = va_arg(ap, cyg_int32);
261 // Should we verify this value here?
262 cyg_hal_plf_serial_init_channel(chan);
265 case __COMMCTL_IRQ_ENABLE:
267 HAL_INTERRUPT_ACKNOWLEDGE(chan->isr_vector);
268 HAL_INTERRUPT_UNMASK(chan->isr_vector);
269 HAL_WRITE_UINT32(base+CYGARC_HAL_LPC24XX_REG_UxIER,
270 CYGARC_HAL_LPC24XX_REG_UxIER_RXDATA_INT);
272 case __COMMCTL_IRQ_DISABLE:
275 HAL_INTERRUPT_MASK(chan->isr_vector);
276 HAL_WRITE_UINT32(base+CYGARC_HAL_LPC24XX_REG_UxIER, 0);
278 case __COMMCTL_DBG_ISR_VECTOR:
279 ret = chan->isr_vector;
281 case __COMMCTL_SET_TIMEOUT:
282 ret = chan->msec_timeout;
283 chan->msec_timeout = va_arg(ap, cyg_uint32);
289 CYGARC_HAL_RESTORE_GP();
294 //===========================================================================
295 // Serial channel ISR
296 //===========================================================================
297 static int cyg_hal_plf_serial_isr(void *__ch_data, int* __ctrlc,
298 CYG_ADDRWORD __vector, CYG_ADDRWORD __data)
301 channel_data_t* chan = (channel_data_t*)__ch_data;
305 CYGARC_HAL_SAVE_GP();
309 HAL_READ_UINT32(chan->base + CYGARC_HAL_LPC24XX_REG_UxIIR, iir);
311 if((iir & (CYGARC_HAL_LPC24XX_REG_UxIIR_IIR0 |
312 CYGARC_HAL_LPC24XX_REG_UxIIR_IIR1 |
313 CYGARC_HAL_LPC24XX_REG_UxIIR_IIR2))
314 == CYGARC_HAL_LPC24XX_REG_UxIIR_IIR2)
316 // Rx data available or character timeout
317 // Read data in order to clear interrupt
318 HAL_READ_UINT32(chan->base + CYGARC_HAL_LPC24XX_REG_UxRBR, c);
319 if( cyg_hal_is_break( &c , 1 ) ) *__ctrlc = 1;
321 res = CYG_ISR_HANDLED;
324 HAL_INTERRUPT_ACKNOWLEDGE(chan->isr_vector);
326 CYGARC_HAL_RESTORE_GP();
331 //===========================================================================
332 // Initialize serial channel
333 //===========================================================================
334 void cyg_hal_plf_serial_init(void)
336 hal_virtual_comm_table_t* comm;
340 CYGACC_CALL_IF_SET_CONSOLE_COMM(CYGNUM_CALL_IF_SET_COMM_ID_QUERY_CURRENT);
343 cyg_hal_plf_serial_init_channel(&lpc2xxx_ser_channels[0]);
344 #if CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS > 1
345 cyg_hal_plf_serial_init_channel(&lpc2xxx_ser_channels[1]);
348 // Setup procs in the vector table
351 CYGACC_CALL_IF_SET_CONSOLE_COMM(0);
352 comm = CYGACC_CALL_IF_CONSOLE_PROCS();
353 CYGACC_COMM_IF_CH_DATA_SET(*comm, &lpc2xxx_ser_channels[0]);
354 CYGACC_COMM_IF_WRITE_SET(*comm, cyg_hal_plf_serial_write);
355 CYGACC_COMM_IF_READ_SET(*comm, cyg_hal_plf_serial_read);
356 CYGACC_COMM_IF_PUTC_SET(*comm, cyg_hal_plf_serial_putc);
357 CYGACC_COMM_IF_GETC_SET(*comm, cyg_hal_plf_serial_getc);
358 CYGACC_COMM_IF_CONTROL_SET(*comm, cyg_hal_plf_serial_control);
359 CYGACC_COMM_IF_DBG_ISR_SET(*comm, cyg_hal_plf_serial_isr);
360 CYGACC_COMM_IF_GETC_TIMEOUT_SET(*comm, cyg_hal_plf_serial_getc_timeout);
362 #if CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS > 1
364 CYGACC_CALL_IF_SET_CONSOLE_COMM(1);
365 comm = CYGACC_CALL_IF_CONSOLE_PROCS();
366 CYGACC_COMM_IF_CH_DATA_SET(*comm, &lpc2xxx_ser_channels[1]);
367 CYGACC_COMM_IF_WRITE_SET(*comm, cyg_hal_plf_serial_write);
368 CYGACC_COMM_IF_READ_SET(*comm, cyg_hal_plf_serial_read);
369 CYGACC_COMM_IF_PUTC_SET(*comm, cyg_hal_plf_serial_putc);
370 CYGACC_COMM_IF_GETC_SET(*comm, cyg_hal_plf_serial_getc);
371 CYGACC_COMM_IF_CONTROL_SET(*comm, cyg_hal_plf_serial_control);
372 CYGACC_COMM_IF_DBG_ISR_SET(*comm, cyg_hal_plf_serial_isr);
373 CYGACC_COMM_IF_GETC_TIMEOUT_SET(*comm, cyg_hal_plf_serial_getc_timeout);
376 // Restore original console
377 CYGACC_CALL_IF_SET_CONSOLE_COMM(cur);
381 //===========================================================================
382 // Set diagnostic led
383 //===========================================================================
384 void hal_diag_led(int mask)
386 hal_lpc24xx_set_leds(mask);
389 //-----------------------------------------------------------------------------