1 #ifndef CYGONCE_HAL_PLATFORM_INTS_H
2 #define CYGONCE_HAL_PLATFORM_INTS_H
3 //==========================================================================
7 // HAL Interrupt and clock assignments for MAC7100/MACE1
9 //==========================================================================
10 //####ECOSGPLCOPYRIGHTBEGIN####
11 // -------------------------------------------
12 // This file is part of eCos, the Embedded Configurable Operating System.
13 // Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
14 // Copyright (C) 2003 Nick Garnett <nickg@calivar.com>
15 // Copyright (C) 2996 eCosCentric Ltd
17 // eCos is free software; you can redistribute it and/or modify it under
18 // the terms of the GNU General Public License as published by the Free
19 // Software Foundation; either version 2 or (at your option) any later version.
21 // eCos is distributed in the hope that it will be useful, but WITHOUT ANY
22 // WARRANTY; without even the implied warranty of MERCHANTABILITY or
23 // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
26 // You should have received a copy of the GNU General Public License along
27 // with eCos; if not, write to the Free Software Foundation, Inc.,
28 // 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
30 // As a special exception, if other files instantiate templates or use macros
31 // or inline functions from this file, or you compile this file and link it
32 // with other works to produce a work based on this file, this file does not
33 // by itself cause the resulting work to be covered by the GNU General Public
34 // License. However the source code for this file must still be made available
35 // in accordance with section (3) of the GNU General Public License.
37 // This exception does not invalidate any other reasons why a work based on
38 // this file might be covered by the GNU General Public License.
39 // -------------------------------------------
40 //####ECOSGPLCOPYRIGHTEND####
41 //==========================================================================
42 //#####DESCRIPTIONBEGIN####
44 // Author(s): Ilija Koco <ilijak@siva.com.mk>
47 // Purpose: Define Interrupt support
48 // Description: The interrupt specifics for the MAC7100/MACE1 board/platform
51 // Usage: #include <cyg/hal/hal_platform_ints.h>
55 //####DESCRIPTIONEND####
57 //==========================================================================
59 #define CYGNUM_HAL_ISR_MIN 0
60 #define CYGNUM_HAL_ISR_MAX 63
61 #define CYGNUM_HAL_ISR_COUNT (CYGNUM_HAL_ISR_MAX + 1)
65 #define MAC7100_EDMA0_LEVEL (0)
66 #define MAC7100_EDMA1_LEVEL (0)
67 #define MAC7100_EDMA2_LEVEL (0)
68 #define MAC7100_EDMA3_LEVEL (0)
69 #define MAC7100_EDMA4_LEVEL (0)
70 #define MAC7100_EDMA5_LEVEL (0)
71 #define MAC7100_EDMA6_LEVEL (0)
72 #define MAC7100_EDMA7_LEVEL (0)
73 #define MAC7100_EDMA8_LEVEL (0)
74 #define MAC7100_EDMA9_LEVEL (0)
75 #define MAC7100_EDMA10_LEVEL (0)
76 #define MAC7100_EDMA11_LEVEL (0)
77 #define MAC7100_EDMA12_LEVEL (0)
78 #define MAC7100_EDMA13_LEVEL (0)
79 #define MAC7100_EDMA14_LEVEL (0)
80 #define MAC7100_EDMA15_LEVEL (0)
81 #define MAC7100_EDMA_Error_LEVEL (0)
82 #define MAC7100_MCM_SWT_LEVEL (0)
83 #define MAC7100_CRG_LEVEL (0)
84 #define MAC7100_PIT1_LEVEL (9)
85 #define MAC7100_PIT2_LEVEL (9)
86 #define MAC7100_PIT3_LEVEL (10)
87 #define MAC7100_PIT4_RTI_LEVEL (9)
88 #define MAC7100_VREG_LEVEL (4)
89 #define MAC7100_CAN_A_MB_LEVEL (4)
90 #define MAC7100_CAN_A_MB14_LEVEL (4)
91 #define MAC7100_CAN_A_Error_LEVEL (4)
92 #define MAC7100_CAN_B_MB_LEVEL (4)
93 #define MAC7100_CAN_B_MB14_LEVEL (4)
94 #define MAC7100_CAN_B_Error_LEVEL (4)
95 #define MAC7100_CAN_C_MB_LEVEL (4)
96 #define MAC7100_CAN_C_MB14_LEVEL (4)
97 #define MAC7100_CAN_C_Error_LEVEL (4)
98 #define MAC7100_CAN_D_MB_LEVEL (4)
99 #define MAC7100_CAN_D_MB14_LEVEL (4)
100 #define MAC7100_CAN_D_Error_LEVEL (4)
101 #define MAC7100_I2C_LEVEL (4)
102 #define MAC7100_DSPI_A_LEVEL (5)
103 #define MAC7100_DSPI_B_LEVEL (5)
104 #define MAC7100_ESCI_A_LEVEL (8)
105 #define MAC7100_ESCI_B_LEVEL (8)
106 #define MAC7100_ESCI_C_LEVEL (8)
107 #define MAC7100_ESCI_D_LEVEL (8)
108 #define MAC7100_EMIOS0_LEVEL (7)
109 #define MAC7100_EMIOS1_LEVEL (7)
110 #define MAC7100_EMIOS2_LEVEL (7)
111 #define MAC7100_EMIOS3_LEVEL (7)
112 #define MAC7100_EMIOS4_LEVEL (7)
113 #define MAC7100_EMIOS5_LEVEL (7)
114 #define MAC7100_EMIOS6_LEVEL (7)
115 #define MAC7100_EMIOS7_LEVEL (7)
116 #define MAC7100_EMIOS8_LEVEL (7)
117 #define MAC7100_EMIOS9_LEVEL (7)
118 #define MAC7100_EMIOS10_LEVEL (7)
119 #define MAC7100_EMIOS11_LEVEL (7)
120 #define MAC7100_EMIOS12_LEVEL (7)
121 #define MAC7100_EMIOS13_LEVEL (7)
122 #define MAC7100_EMIOS14_LEVEL (7)
123 #define MAC7100_EMIOS15_LEVEL (7)
124 #define MAC7100_ATD_LEVEL (11)
125 #define MAC7100_CFM_LEVEL (7)
126 #define MAC7100_PIM_LEVEL (11)
127 #define MAC7100_IRQ_LEVEL (12)
128 #define MAC7100_XIRQ_LEVEL (12)
130 // The vector used by the Real time clock
131 #if CYGNUM_PIT_CHAN_CLOCK==0
132 #define CYGNUM_HAL_INTERRUPT_RTC MAC7100_PIT4_RTI_IV
134 #define CYGNUM_HAL_INTERRUPT_RTC (MAC7100_PIT1_IV+CYGNUM_PIT_CHAN_CLOCK-1)
137 //----------------------------------------------------------------------------
139 __externC void hal_mac7100_reset_cpu(void);
140 #define HAL_PLATFORM_RESET() hal_mac7100_reset_cpu()
142 #define HAL_PLATFORM_RESET_ENTRY 0x01000000
144 #endif // CYGONCE_HAL_PLATFORM_INTS_H