1 #ifndef CYGONCE_HAL_CACHE_H
2 #define CYGONCE_HAL_CACHE_H
4 //=============================================================================
8 // HAL cache control API
10 //=============================================================================
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40 //=============================================================================
41 //#####DESCRIPTIONBEGIN####
43 // Author(s): nickg, gthomas
44 // Contributors: nickg, gthomas
46 // Purpose: Cache control API
47 // Description: The macros defined here provide the HAL APIs for handling
48 // cache control operations.
50 // #include <cyg/hal/hal_cache.h>
54 //####DESCRIPTIONEND####
56 //=============================================================================
58 #include <cyg/infra/cyg_type.h>
60 //-----------------------------------------------------------------------------
64 //#define HAL_DCACHE_SIZE 0 // Size of data cache in bytes
65 //#define HAL_DCACHE_LINE_SIZE 0 // Size of a data cache line
66 //#define HAL_DCACHE_WAYS 0 // Associativity of the cache
69 //#define HAL_ICACHE_SIZE 0 // Size of cache in bytes
70 //#define HAL_ICACHE_LINE_SIZE 0 // Size of a cache line
71 //#define HAL_ICACHE_WAYS 0 // Associativity of the cache
73 //#define HAL_DCACHE_SETS (HAL_DCACHE_SIZE/(HAL_DCACHE_LINE_SIZE*HAL_DCACHE_WAYS))
74 //#define HAL_ICACHE_SETS (HAL_ICACHE_SIZE/(HAL_ICACHE_LINE_SIZE*HAL_ICACHE_WAYS))
76 //-----------------------------------------------------------------------------
77 // Global control of data cache
79 // Enable the data cache
80 #define HAL_DCACHE_ENABLE()
82 // Disable the data cache
83 #define HAL_DCACHE_DISABLE()
85 // Invalidate the entire cache
86 #define HAL_DCACHE_INVALIDATE_ALL()
88 // Synchronize the contents of the cache with memory.
89 #define HAL_DCACHE_SYNC()
91 // Purge contents of data cache
92 #define HAL_DCACHE_PURGE_ALL()
94 // Query the state of the data cache (does not affect the caching)
95 #define HAL_DCACHE_IS_ENABLED(_state_) \
100 // Set the data cache refill burst size
101 //#define HAL_DCACHE_BURST_SIZE(_size_)
103 // Set the data cache write mode
104 //#define HAL_DCACHE_WRITE_MODE( _mode_ )
106 //#define HAL_DCACHE_WRITETHRU_MODE 0
107 //#define HAL_DCACHE_WRITEBACK_MODE 1
109 // Load the contents of the given address range into the data cache
110 // and then lock the cache so that it stays there.
111 //#define HAL_DCACHE_LOCK(_base_, _size_)
113 // Undo a previous lock operation
114 //#define HAL_DCACHE_UNLOCK(_base_, _size_)
116 // Unlock entire cache
117 //#define HAL_DCACHE_UNLOCK_ALL()
119 //-----------------------------------------------------------------------------
120 // Data cache line control
122 // Allocate cache lines for the given address range without reading its
123 // contents from memory.
124 //#define HAL_DCACHE_ALLOCATE( _base_ , _size_ )
126 // Write dirty cache lines to memory and invalidate the cache entries
127 // for the given address range.
128 //#define HAL_DCACHE_FLUSH( _base_ , _size_ )
130 // Invalidate cache lines in the given range without writing to memory.
131 //#define HAL_DCACHE_INVALIDATE( _base_ , _size_ )
133 // Write dirty cache lines to memory for the given address range.
134 //#define HAL_DCACHE_STORE( _base_ , _size_ )
136 // Preread the given range into the cache with the intention of reading
138 //#define HAL_DCACHE_READ_HINT( _base_ , _size_ )
140 // Preread the given range into the cache with the intention of writing
142 //#define HAL_DCACHE_WRITE_HINT( _base_ , _size_ )
144 // Allocate and zero the cache lines associated with the given range.
145 //#define HAL_DCACHE_ZERO( _base_ , _size_ )
147 //-----------------------------------------------------------------------------
148 // Global control of Instruction cache
150 // Enable the instruction cache
151 #define HAL_ICACHE_ENABLE()
153 // Disable the instruction cache
154 #define HAL_ICACHE_DISABLE()
156 // Invalidate the entire cache
157 #define HAL_ICACHE_INVALIDATE_ALL()
159 // Synchronize the contents of the cache with memory.
160 #define HAL_ICACHE_SYNC()
162 // Query the state of the instruction cache (does not affect the caching)
163 #define HAL_ICACHE_IS_ENABLED(_state_) \
168 // Set the instruction cache refill burst size
169 //#define HAL_ICACHE_BURST_SIZE(_size_)
171 // Load the contents of the given address range into the instruction cache
172 // and then lock the cache so that it stays there.
173 //#define HAL_ICACHE_LOCK(_base_, _size_)
175 // Undo a previous lock operation
176 //#define HAL_ICACHE_UNLOCK(_base_, _size_)
178 // Unlock entire cache
179 //#define HAL_ICACHE_UNLOCK_ALL()
181 //-----------------------------------------------------------------------------
182 // Instruction cache line control
184 // Invalidate cache lines in the given range without writing to memory.
185 //#define HAL_ICACHE_INVALIDATE( _base_ , _size_ )
187 //-----------------------------------------------------------------------------
188 #endif // ifndef CYGONCE_HAL_CACHE_H
189 // End of hal_cache.h