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1 #ifndef CYGONCE_KARO_TX25_H
2 #define CYGONCE_KARO_TX25_H
3
4 //=============================================================================
5 //
6 //      Platform specific support (register layout, etc)
7 //
8 //=============================================================================
9 //####ECOSGPLCOPYRIGHTBEGIN####
10 // -------------------------------------------
11 // This file is part of eCos, the Embedded Configurable Operating System.
12 // Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
13 //
14 // eCos is free software; you can redistribute it and/or modify it under
15 // the terms of the GNU General Public License as published by the Free
16 // Software Foundation; either version 2 or (at your option) any later version.
17 //
18 // eCos is distributed in the hope that it will be useful, but WITHOUT ANY
19 // WARRANTY; without even the implied warranty of MERCHANTABILITY or
20 // FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
21 // for more details.
22 //
23 // You should have received a copy of the GNU General Public License along
24 // with eCos; if not, write to the Free Software Foundation, Inc.,
25 // 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
26 //
27 // As a special exception, if other files instantiate templates or use macros
28 // or inline functions from this file, or you compile this file and link it
29 // with other works to produce a work based on this file, this file does not
30 // by itself cause the resulting work to be covered by the GNU General Public
31 // License. However the source code for this file must still be made available
32 // in accordance with section (3) of the GNU General Public License.
33 //
34 // This exception does not invalidate any other reasons why a work based on
35 // this file might be covered by the GNU General Public License.
36 //
37 // Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
38 // at http://sources.redhat.com/ecos/ecos-license/
39 // -------------------------------------------
40 //####ECOSGPLCOPYRIGHTEND####
41 //===========================================================================
42
43 #include <cyg/hal/hal_soc.h>    // Hardware definitions
44
45 #include CYGHWR_MEMORY_LAYOUT_H
46
47 #define SZ_1K                           0x00000400
48 #define SZ_2K                           0x00000800
49 #define SZ_4K                           0x00001000
50 #define SZ_8K                           0x00002000
51 #define SZ_16K                          0x00004000
52 #define SZ_32K                          0x00008000
53 #define SZ_64K                          0x00010000
54 #define SZ_128K                         0x00020000
55 #define SZ_256K                         0x00040000
56 #define SZ_512K                         0x00080000
57 #define SZ_1M                           0x00100000
58 #define SZ_2M                           0x00200000
59 #define SZ_4M                           0x00400000
60 #define SZ_8M                           0x00800000
61 #define SZ_16M                          0x01000000
62 #define SZ_32M                          0x02000000
63 #define SZ_64M                          0x04000000
64 #define SZ_128M                         0x08000000
65 #define SZ_256M                         0x10000000
66 #define SZ_512M                         0x20000000
67 #define SZ_1G                           0x40000000
68
69 #define TX25_LED_MASK           (1 << 7)
70 #define TX25_LED_REG_ADDR       (GPIO2_BASE_ADDR + GPIO_DR)
71
72 #define LED_MAX_NUM             1
73
74 #define LED_IS_ON(n) ({                                                 \
75         CYG_WORD32 __val;                                                       \
76         HAL_READ_UINT32(TX25_LED_REG_ADDR, __val);      \
77         __val & TX25_LED_MASK;                                          \
78 })
79
80 #define TURN_LED_ON(n)                                                  \
81         CYG_MACRO_START                                                         \
82         CYG_WORD32 __val;                                                       \
83         HAL_READ_UINT32(TX25_LED_REG_ADDR, __val);      \
84         __val |= TX25_LED_MASK;                                         \
85         HAL_WRITE_UINT32(TX25_LED_REG_ADDR, __val);     \
86         CYG_MACRO_END
87
88 #define TURN_LED_OFF(n)                                                 \
89         CYG_MACRO_START                                                         \
90         CYG_WORD32 __val;                                                       \
91         HAL_READ_UINT32(TX25_LED_REG_ADDR, __val);      \
92         __val &= ~TX25_LED_MASK;                                        \
93         HAL_WRITE_UINT32(TX25_LED_REG_ADDR, __val);     \
94         CYG_MACRO_END
95
96 #define BOARD_DEBUG_LED(n)                                              \
97         CYG_MACRO_START                                                         \
98         if (n >= 0 && n < LED_MAX_NUM) {                        \
99                 if (LED_IS_ON(n))                                               \
100                         TURN_LED_OFF(n);                                        \
101                 else                                                                    \
102                         TURN_LED_ON(n);                                         \
103         }                                                                                       \
104         CYG_MACRO_END
105
106 #define BLINK_LED(l, n)                                                 \
107         CYG_MACRO_START                                                         \
108         int _i;                                                                         \
109         for (_i = 0; _i < (n); _i++) {                          \
110                 BOARD_DEBUG_LED(l);                                             \
111                 HAL_DELAY_US(200000);                                   \
112                 BOARD_DEBUG_LED(l);                                             \
113                 HAL_DELAY_US(300000);                                   \
114         }                                                                                       \
115         HAL_DELAY_US(1000000);                                          \
116         CYG_MACRO_END
117
118 #if !defined(__ASSEMBLER__)
119 enum {
120         BOARD_TYPE_TX25KARO,
121 };
122
123 #define gpio_tst_bit(grp, gpio)         _gpio_tst_bit(grp, gpio, __FUNCTION__, __LINE__)
124 static inline int _gpio_tst_bit(int grp, int gpio, const char *func, int line)
125 {
126         unsigned long val;
127         CYG_ADDRESS reg;
128
129         switch (grp) {
130         case 1:
131                 reg = GPIO1_BASE_ADDR;
132                 break;
133         case 2:
134                 reg = GPIO2_BASE_ADDR;
135                 break;
136         case 3:
137                 reg = GPIO3_BASE_ADDR;
138                 break;
139         case 4:
140                 reg = GPIO4_BASE_ADDR;
141                 break;
142         default:
143                 return 0;
144         }
145
146         if (gpio < 0 || gpio > 31) {
147                 return 0;
148         }
149         val = readl(reg + GPIO_PSR0);
150         return !!(val & (1 << gpio));
151 }
152
153 static inline void gpio_set_bit(int grp, int gpio)
154 {
155         unsigned long val;
156         CYG_ADDRESS reg;
157
158         switch (grp) {
159         case 1:
160                 reg = GPIO1_BASE_ADDR;
161                 break;
162         case 2:
163                 reg = GPIO2_BASE_ADDR;
164                 break;
165         case 3:
166                 reg = GPIO3_BASE_ADDR;
167                 break;
168         case 4:
169                 reg = GPIO4_BASE_ADDR;
170                 break;
171         default:
172                 return;
173         }
174
175         if (gpio < 0 || gpio > 31) {
176                 return;
177         }
178         val = readl(reg + GPIO_DR);
179         writel(val | (1 << gpio), reg + GPIO_DR);
180 }
181
182 static inline void gpio_clr_bit(int grp, int gpio)
183 {
184         unsigned long val;
185         CYG_ADDRESS reg;
186
187         switch (grp) {
188         case 1:
189                 reg = GPIO1_BASE_ADDR;
190                 break;
191         case 2:
192                 reg = GPIO2_BASE_ADDR;
193                 break;
194         case 3:
195                 reg = GPIO3_BASE_ADDR;
196                 break;
197         case 4:
198                 reg = GPIO4_BASE_ADDR;
199                 break;
200         default:
201                 return;
202         }
203
204         if (gpio < 0 || gpio > 31) {
205                 return;
206         }
207         val = readl(reg + GPIO_DR);
208         writel(val & ~(1 << gpio), reg + GPIO_DR);
209 }
210 #endif
211
212 #endif /* CYGONCE_KARO_TX25_H */